X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fnew_dynarec.c;h=a736d565cccb1c36fd7bb884d2aa64820fcde440;hp=b6af4c4b54df79c0570a28e834500f915746775d;hb=a327ad27099341fb6eed61aa0419dff418429f96;hpb=7a518516f8c04644e4ca4bb6bf38a8886e4ae42e

diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index b6af4c4b..a736d565 100644
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -141,6 +141,11 @@ struct ll_entry
   int new_dynarec_did_compile;
   int new_dynarec_hacks;
   u_int stop_after_jal;
+#ifndef RAM_FIXED
+  static u_int ram_offset;
+#else
+  static const u_int ram_offset=0;
+#endif
   extern u_char restore_candidate[512];
   extern int cycle_count;
 
@@ -2917,6 +2922,10 @@ void load_assemble(int i,struct regstat *i_regs)
         jaddr=emit_fastpath_cmp_jump(i,addr,&fastload_reg_override);
       }
     }
+    else if(ram_offset&&memtarget) {
+      emit_addimm(addr,ram_offset,HOST_TEMPREG);
+      fastload_reg_override=HOST_TEMPREG;
+    }
   }else{ // using tlb
     int x=0;
     if (opcode[i]==0x20||opcode[i]==0x24) x=3; // LB/LBU
@@ -2982,7 +2991,7 @@ void load_assemble(int i,struct regstat *i_regs)
             gen_tlb_addr_r(a,map);
             emit_movswl_indexed(x,a,tl);
           }else{
-            #ifdef RAM_OFFSET
+            #if 1 //def RAM_OFFSET
             emit_movswl_indexed(x,a,tl);
             #else
             emit_movswl_indexed((int)rdram-0x80000000+x,a,tl);
@@ -3069,7 +3078,7 @@ void load_assemble(int i,struct regstat *i_regs)
             gen_tlb_addr_r(a,map);
             emit_movzwl_indexed(x,a,tl);
           }else{
-            #ifdef RAM_OFFSET
+            #if 1 //def RAM_OFFSET
             emit_movzwl_indexed(x,a,tl);
             #else
             emit_movzwl_indexed((int)rdram-0x80000000+x,a,tl);
@@ -3226,6 +3235,10 @@ void store_assemble(int i,struct regstat *i_regs)
         jaddr=emit_fastpath_cmp_jump(i,addr,&faststore_reg_override);
       #endif
     }
+    else if(ram_offset&&memtarget) {
+      emit_addimm(addr,ram_offset,HOST_TEMPREG);
+      faststore_reg_override=HOST_TEMPREG;
+    }
   }else{ // using tlb
     int x=0;
     if (opcode[i]==0x28) x=3; // SB
@@ -3270,7 +3283,8 @@ void store_assemble(int i,struct regstat *i_regs)
         gen_tlb_addr_w(a,map);
         emit_writehword_indexed(tl,x,a);
       }else
-        emit_writehword_indexed(tl,(int)rdram-0x80000000+x,a);
+        //emit_writehword_indexed(tl,(int)rdram-0x80000000+x,a);
+        emit_writehword_indexed(tl,x,a);
     }
     type=STOREH_STUB;
   }
@@ -3874,6 +3888,10 @@ void c2ls_assemble(int i,struct regstat *i_regs)
     if(!c) {
       jaddr2=emit_fastpath_cmp_jump(i,ar,&fastio_reg_override);
     }
+    else if(ram_offset&&memtarget) {
+      emit_addimm(ar,ram_offset,HOST_TEMPREG);
+      fastio_reg_override=HOST_TEMPREG;
+    }
     if (opcode[i]==0x32) { // LWC2
       #ifdef HOST_IMM_ADDR32
       if(c) emit_readword_tlb(constmap[i][s]+offset,-1,tl);
@@ -7993,10 +8011,16 @@ void new_dynarec_init()
 {
   printf("Init new dynarec\n");
   out=(u_char *)BASE_ADDR;
+#if BASE_ADDR_FIXED
   if (mmap (out, 1<<TARGET_SIZE_2,
             PROT_READ | PROT_WRITE | PROT_EXEC,
             MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS,
             -1, 0) <= 0) {printf("mmap() failed\n");}
+#else
+  // not all systems allow execute in data segment by default
+  if (mprotect(out, 1<<TARGET_SIZE_2, PROT_READ | PROT_WRITE | PROT_EXEC) != 0)
+    printf("mprotect() failed\n");
+#endif
 #ifdef MUPEN64
   rdword=&readmem_dword;
   fake_pc.f.r.rs=&readmem_dword;
@@ -8050,12 +8074,17 @@ void new_dynarec_init()
 #endif
   tlb_hacks();
   arch_init();
+#ifndef RAM_FIXED
+  ram_offset=(u_int)rdram-0x80000000;
+#endif
 }
 
 void new_dynarec_cleanup()
 {
   int n;
+  #if BASE_ADDR_FIXED
   if (munmap ((void *)BASE_ADDR, 1<<TARGET_SIZE_2) < 0) {printf("munmap() failed\n");}
+  #endif
   for(n=0;n<4096;n++) ll_clear(jump_in+n);
   for(n=0;n<4096;n++) ll_clear(jump_out+n);
   for(n=0;n<4096;n++) ll_clear(jump_dirty+n);
@@ -11543,7 +11572,7 @@ int new_recompile_block(int addr)
   
   // If we're within 256K of the end of the buffer,
   // start over from the beginning. (Is 256K enough?)
-  if((int)out>BASE_ADDR+(1<<TARGET_SIZE_2)-MAX_OUTPUT_BLOCK_SIZE) out=(u_char *)BASE_ADDR;
+  if((u_int)out>(u_int)BASE_ADDR+(1<<TARGET_SIZE_2)-MAX_OUTPUT_BLOCK_SIZE) out=(u_char *)BASE_ADDR;
   
   // Trap writes to any of the pages we compiled
   for(i=start>>12;i<=(start+slen*4)>>12;i++) {
@@ -11571,11 +11600,11 @@ int new_recompile_block(int addr)
   
   /* Pass 10 - Free memory by expiring oldest blocks */
   
-  int end=((((int)out-BASE_ADDR)>>(TARGET_SIZE_2-16))+16384)&65535;
+  int end=((((int)out-(int)BASE_ADDR)>>(TARGET_SIZE_2-16))+16384)&65535;
   while(expirep!=end)
   {
     int shift=TARGET_SIZE_2-3; // Divide into 8 blocks
-    int base=BASE_ADDR+((expirep>>13)<<shift); // Base address of this block
+    int base=(int)BASE_ADDR+((expirep>>13)<<shift); // Base address of this block
     inv_debug("EXP: Phase %d\n",expirep);
     switch((expirep>>11)&3)
     {