X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fnew_dynarec.c;h=f1a0def673a2ceb459e7a47e06bac9786256eeea;hp=8d3688b1dc12d8fa5ad01c9cdb8113b648b1d087;hb=b1f390b38ff77b8229e33968d768eabdad433082;hpb=df894a3a5000bf0f1460767f64c3b78a79f3a457 diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 8d3688b1..f1a0def6 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -408,7 +408,7 @@ void *get_addr_32(u_int vaddr,u_int flags) { #ifdef FORCE32 return get_addr(vaddr); -#endif +#else //printf("TRACE: count=%d next=%d (get_addr_32 %x,flags %x)\n",Count,next_interupt,vaddr,flags); int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF]; if(ht_bin[0]==vaddr) return (void *)ht_bin[1]; @@ -488,6 +488,7 @@ void *get_addr_32(u_int vaddr,u_int flags) Context=(Context&0xFF80000F)|((BadVAddr>>9)&0x007FFFF0); EntryHi=BadVAddr&0xFFFFE000; return get_addr_ht(0x80000000); +#endif } void clear_all_regs(signed char regmap[]) @@ -2753,17 +2754,17 @@ void load_assemble(int i,struct regstat *i_regs) //if(c) printf("load_assemble: const=%x\n",(int)constmap[i][s]+offset); // FIXME: Even if the load is a NOP, we should check for pagefaults... #ifdef PCSX - if(tl<0) { - if(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80) { + if(tl<0&&(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80) + ||rt1[i]==0) { // could be FIFO, must perform the read + // ||dummy read assem_debug("(forced read)\n"); tl=get_reg(i_regs->regmap,-1); assert(tl>=0); - } } +#endif if(offset||s<0||c) addr=tl; else addr=s; -#endif if(tl>=0) { //assert(tl>=0); //assert(rt1[i]); @@ -3598,7 +3599,7 @@ void c2ls_assemble(int i,struct regstat *i_regs) int s,tl; int ar; int offset; - int c=0; + int memtarget=0,c=0; int jaddr,jaddr2=0,jaddr3,type; int agr=AGEN1+(i&1); u_int hr,reglist=0; @@ -3624,36 +3625,41 @@ void c2ls_assemble(int i,struct regstat *i_regs) } else { // LWC2 ar=tl; } + if(s>=0) c=(i_regs->wasconst>>s)&1; + memtarget=c&&(((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE); if (!offset&&!c&&s>=0) ar=s; assert(ar>=0); if (opcode[i]==0x3a) { // SWC2 cop2_get_dreg(copr,tl,HOST_TEMPREG); + type=STOREW_STUB; } - if(s>=0) c=(i_regs->wasconst>>s)&1; - if(!c) { - emit_cmpimm(offset||c||s<0?ar:s,RAM_SIZE); - jaddr2=(int)out; - emit_jno(0); - } - else if(((signed int)(constmap[i][s]+offset))>=(signed int)0x80000000+RAM_SIZE) { - jaddr2=(int)out; - emit_jmp(0); // inline_readstub/inline_writestub? Very rare case - } - if (opcode[i]==0x32) { // LWC2 - #ifdef HOST_IMM_ADDR32 - if(c) emit_readword_tlb(constmap[i][s]+offset,-1,tl); - else - #endif - emit_readword_indexed(0,ar,tl); + else type=LOADW_STUB; + + if(c&&!memtarget) { + jaddr2=(int)out; + emit_jmp(0); // inline_readstub/inline_writestub? } - if (opcode[i]==0x3a) { // SWC2 -#ifdef DESTRUCTIVE_SHIFT - if(!offset&&!c&&s>=0) emit_mov(s,ar); -#endif - emit_writeword_indexed(tl,0,ar); - type=STOREW_STUB; + else { + if(!c) { + emit_cmpimm(offset||c||s<0?ar:s,RAM_SIZE); + jaddr2=(int)out; + emit_jno(0); + } + if (opcode[i]==0x32) { // LWC2 + #ifdef HOST_IMM_ADDR32 + if(c) emit_readword_tlb(constmap[i][s]+offset,-1,tl); + else + #endif + emit_readword_indexed(0,ar,tl); + } + if (opcode[i]==0x3a) { // SWC2 + #ifdef DESTRUCTIVE_SHIFT + if(!offset&&!c&&s>=0) emit_mov(s,ar); + #endif + emit_writeword_indexed(tl,0,ar); + } } if(jaddr2) add_stub(type,jaddr2,(int)out,i,ar,(int)i_regs,ccadj[i],reglist); @@ -3686,7 +3692,7 @@ void mov_assemble(int i,struct regstat *i_regs) { //if(opcode2[i]==0x10||opcode2[i]==0x12) { // MFHI/MFLO //if(opcode2[i]==0x11||opcode2[i]==0x13) { // MTHI/MTLO - assert(rt1[i]>0); + //assert(rt1[i]>0); if(rt1[i]) { signed char sh,sl,th,tl; th=get_reg(i_regs->regmap,rt1[i]|64); @@ -3964,7 +3970,7 @@ void address_generation(int i,struct regstat *i_regs,signed char entry[]) if(itype[i]==C1LS||itype[i]==C2LS) { if ((opcode[i]&0x3b)==0x31||(opcode[i]&0x3b)==0x32) // LWC1/LDC1/LWC2/LDC2 ra=get_reg(i_regs->regmap,FTEMP); - else { // SWC1/SDC1 + else { // SWC1/SDC1/SWC2/SDC2 ra=get_reg(i_regs->regmap,agr); if(ra<0) ra=get_reg(i_regs->regmap,-1); } @@ -7549,7 +7555,7 @@ void disassemble_inst(int i) case FJUMP: printf (" %x: %s %8x\n",start+i*4,insn[i],ba[i]);break; case RJUMP: - if (rt1[i]!=31) + if (opcode[i]==0x9&&rt1[i]!=31) printf (" %x: %s r%d,r%d\n",start+i*4,insn[i],rt1[i],rs1[i]); else printf (" %x: %s r%d\n",start+i*4,insn[i],rs1[i]); @@ -7737,11 +7743,11 @@ int new_recompile_block(int addr) start = (u_int)addr&~3; //assert(((u_int)addr&1)==0); #ifdef PCSX - if (Config.HLE && start == 0x80001000) { + if (Config.HLE && start == 0x80001000) // hlecall + { // XXX: is this enough? Maybe check hleSoftCall? u_int beginning=(u_int)out; u_int page=get_page(start); - ll_add(jump_in+page,start,out); invalid_code[start>>12]=0; emit_movimm(start,0); emit_writeword(0,(int)&pcaddr); @@ -7749,12 +7755,21 @@ int new_recompile_block(int addr) #ifdef __arm__ __clear_cache((void *)beginning,out); #endif + ll_add(jump_in+page,start,(void *)beginning); return 0; } - else if ((u_int)addr < 0x00200000) { + else if ((u_int)addr < 0x00200000 || + (0xa0000000 <= addr && addr < 0xa0200000)) { // used for BIOS calls mostly? - source = (u_int *)((u_int)rdram+start-0); - pagelimit = 0x00200000; + source = (u_int *)((u_int)rdram+(start&0x1fffff)); + pagelimit = (addr&0xa0000000)|0x00200000; + } + else if (!Config.HLE && ( +/* (0x9fc00000 <= addr && addr < 0x9fc80000) ||*/ + (0xbfc00000 <= addr && addr < 0xbfc80000))) { + // BIOS + source = (u_int *)((u_int)psxR+(start&0x7ffff)); + pagelimit = (addr&0xfff00000)|0x80000; } else #endif @@ -7789,7 +7804,7 @@ int new_recompile_block(int addr) else { assem_debug("Compile at unmapped memory address: %x \n", (int)addr); //assem_debug("start: %x next: %x\n",memory_map[start>>12],memory_map[(start+4096)>>12]); - return 1; // Caller will invoke exception handler + return -1; // Caller will invoke exception handler } //printf("source= %x\n",(int)source); } @@ -7928,7 +7943,11 @@ int new_recompile_block(int addr) case 0x02: strcpy(insn[i],"TLBWI"); type=COP0; break; case 0x06: strcpy(insn[i],"TLBWR"); type=COP0; break; case 0x08: strcpy(insn[i],"TLBP"); type=COP0; break; +#ifdef PCSX + case 0x10: strcpy(insn[i],"RFE"); type=COP0; break; +#else case 0x18: strcpy(insn[i],"ERET"); type=COP0; break; +#endif } } break; @@ -8669,7 +8688,8 @@ int new_recompile_block(int addr) if (rt1[i]==31) { alloc_reg(¤t,i,31); dirty_reg(¤t,31); - assert(rs1[i+1]!=31&&rs2[i+1]!=31); + //assert(rs1[i+1]!=31&&rs2[i+1]!=31); + assert(rt1[i+1]!=rt1[i]); #ifdef REG_PREFETCH alloc_reg(¤t,i,PTEMP); #endif @@ -8693,7 +8713,8 @@ int new_recompile_block(int addr) if (rt1[i]!=0) { alloc_reg(¤t,i,rt1[i]); dirty_reg(¤t,rt1[i]); - assert(rs1[i+1]!=31&&rs2[i+1]!=31); + //assert(rs1[i+1]!=31&&rs2[i+1]!=31); + assert(rt1[i+1]!=rt1[i]); #ifdef REG_PREFETCH alloc_reg(¤t,i,PTEMP); #endif @@ -10488,6 +10509,19 @@ int new_recompile_block(int addr) ds=1; pagespan_ds(); } + u_int instr_addr0_override=0; + +#ifdef PCSX + if (start == 0x80030000) { + // nasty hack for fastbios thing + instr_addr0_override=(u_int)out; + emit_movimm(start,0); + emit_readword((int)&pcaddr,1); + emit_writeword(0,(int)&pcaddr); + emit_cmp(0,1); + emit_jne((int)new_dyna_leave); + } +#endif for(i=0;i