X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fpcsxmem.c;h=046402109a985e862d32250eec79fd56f912b5d4;hp=4e22230894cf6ad27300e8aff083fdd600429a47;hb=0486fdc9bd313ce2f01dafa4d3c151f40e2c729b;hpb=59fb0bb456b51f5385a2e0b8b4cd8c043595b15d

diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
index 4e222308..04640210 100644
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -10,6 +10,7 @@
 #include "../psxhw.h"
 #include "../cdrom.h"
 #include "../mdec.h"
+#include "../gpu.h"
 #include "emu_if.h"
 #include "pcsxmem.h"
 
@@ -77,6 +78,8 @@ static void io_write_sio32(u32 value)
 	sioWrite8((unsigned char)(value >> 24));
 }
 
+#ifndef DRC_DBG
+
 static void map_rcnt_rcount0(u32 mode)
 {
 	if (mode & 0x100) { // pixel clock
@@ -117,6 +120,12 @@ static void map_rcnt_rcount2(u32 mode)
 	}
 }
 
+#else
+#define map_rcnt_rcount0(mode)
+#define map_rcnt_rcount1(mode)
+#define map_rcnt_rcount2(mode)
+#endif
+
 #define make_rcnt_funcs(i) \
 static u32 io_rcnt_read_count##i()  { return psxRcntRcount(i); } \
 static u32 io_rcnt_read_mode##i()   { return psxRcntRmode(i); } \
@@ -201,6 +210,27 @@ static void io_spu_write32(u32 value)
 	wfunc(a + 2, value >> 16);
 }
 
+static u32 io_gpu_read_status(void)
+{
+	u32 v;
+
+	// meh2, syncing for img bit, might want to avoid it..
+	gpuSyncPluginSR();
+	v = HW_GPU_STATUS;
+
+	// XXX: because of large timeslices can't use hSyncCount, using rough
+	// approximization instead. Perhaps better use hcounter code here or something.
+	if (hSyncCount < 240 && (HW_GPU_STATUS & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
+		v |= PSXGPU_LCF & (psxRegs.cycle << 20);
+	return v;
+}
+
+static void io_gpu_write_status(u32 value)
+{
+	GPU_writeStatus(value);
+	gpuSyncPluginSR();
+}
+
 static void map_ram_write(void)
 {
 	int i;
@@ -338,7 +368,7 @@ void new_dyna_pcsx_mem_init(void)
 	map_item(&mem_iortab[IOMEM32(0x1124)], io_rcnt_read_mode2, 1);
 	map_item(&mem_iortab[IOMEM32(0x1128)], io_rcnt_read_target2, 1);
 //	map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1);
-//	map_item(&mem_iortab[IOMEM32(0x1814)], GPU_readStatus, 1);
+	map_item(&mem_iortab[IOMEM32(0x1814)], io_gpu_read_status, 1);
 	map_item(&mem_iortab[IOMEM32(0x1820)], mdecRead0, 1);
 	map_item(&mem_iortab[IOMEM32(0x1824)], mdecRead1, 1);
 
@@ -384,7 +414,7 @@ void new_dyna_pcsx_mem_init(void)
 	map_item(&mem_iowtab[IOMEM32(0x1124)], io_rcnt_write_mode2, 1);
 	map_item(&mem_iowtab[IOMEM32(0x1128)], io_rcnt_write_target2, 1);
 //	map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1);
-//	map_item(&mem_iowtab[IOMEM32(0x1814)], GPU_writeStatus, 1);
+	map_item(&mem_iowtab[IOMEM32(0x1814)], io_gpu_write_status, 1);
 	map_item(&mem_iowtab[IOMEM32(0x1820)], mdecWrite0, 1);
 	map_item(&mem_iowtab[IOMEM32(0x1824)], mdecWrite1, 1);
 
@@ -433,11 +463,9 @@ void new_dyna_pcsx_mem_reset(void)
 
 	// plugins might change so update the pointers
 	map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1);
-	map_item(&mem_iortab[IOMEM32(0x1814)], GPU_readStatus, 1);
 
 	for (i = 0x1c00; i < 0x1e00; i += 2)
 		map_item(&mem_iortab[IOMEM16(i)], SPU_readRegister, 1);
 
 	map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1);
-	map_item(&mem_iowtab[IOMEM32(0x1814)], GPU_writeStatus, 1);
 }