X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fpcsxmem.c;h=4d83452d3d7b84ea9292a056da2226fb78f6dd81;hp=c9fb5a8e6a953e5fb60a5dfbb091e6b7572e1bc5;hb=92879b62c06f6c1d363a138f77f7727d0fc7721e;hpb=19776aef6da17a49e95e1bc924b26bcf49713c75 diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c index c9fb5a8e..4d83452d 100644 --- a/libpcsxcore/new_dynarec/pcsxmem.c +++ b/libpcsxcore/new_dynarec/pcsxmem.c @@ -6,13 +6,19 @@ */ #include -#include #include "../psxhw.h" #include "../cdrom.h" #include "../mdec.h" +#include "../gpu.h" +#include "../psxmem_map.h" #include "emu_if.h" #include "pcsxmem.h" +#ifdef __thumb__ +#error the dynarec is incompatible with Thumb functions, +#error please add -marm to compile flags +#endif + //#define memprintf printf #define memprintf(...) @@ -27,8 +33,10 @@ static u32 mem_unmwtab[(1+2+4) * 0x1000 / 4]; static void map_item(u32 *out, const void *h, u32 flag) { u32 hv = (u32)h; - if (hv & 1) - fprintf(stderr, "%p has LSB set\n", h); + if (hv & 1) { + SysPrintf("FATAL: %p has LSB set\n", h); + abort(); + } *out = (hv >> 1) | (flag << 31); } @@ -209,6 +217,27 @@ static void io_spu_write32(u32 value) wfunc(a + 2, value >> 16); } +static u32 io_gpu_read_status(void) +{ + u32 v; + + // meh2, syncing for img bit, might want to avoid it.. + gpuSyncPluginSR(); + v = HW_GPU_STATUS; + + // XXX: because of large timeslices can't use hSyncCount, using rough + // approximization instead. Perhaps better use hcounter code here or something. + if (hSyncCount < 240 && (HW_GPU_STATUS & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS) + v |= PSXGPU_LCF & (psxRegs.cycle << 20); + return v; +} + +static void io_gpu_write_status(u32 value) +{ + GPU_writeStatus(value); + gpuSyncPluginSR(); +} + static void map_ram_write(void) { int i; @@ -272,10 +301,9 @@ void new_dyna_pcsx_mem_init(void) int i; // have to map these further to keep tcache close to .text - mem_readtab = mmap((void *)0x08000000, 0x200000 * 4, PROT_READ | PROT_WRITE, - MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); - if (mem_readtab == MAP_FAILED) { - fprintf(stderr, "failed to map mem tables\n"); + mem_readtab = psxMap(0x08000000, 0x200000 * 4, 0, MAP_TAG_LUTS); + if (mem_readtab == NULL) { + SysPrintf("failed to map mem tables\n"); exit(1); } mem_writetab = mem_readtab + 0x100000; @@ -346,7 +374,7 @@ void new_dyna_pcsx_mem_init(void) map_item(&mem_iortab[IOMEM32(0x1124)], io_rcnt_read_mode2, 1); map_item(&mem_iortab[IOMEM32(0x1128)], io_rcnt_read_target2, 1); // map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1); -// map_item(&mem_iortab[IOMEM32(0x1814)], GPU_readStatus, 1); + map_item(&mem_iortab[IOMEM32(0x1814)], io_gpu_read_status, 1); map_item(&mem_iortab[IOMEM32(0x1820)], mdecRead0, 1); map_item(&mem_iortab[IOMEM32(0x1824)], mdecRead1, 1); @@ -392,7 +420,7 @@ void new_dyna_pcsx_mem_init(void) map_item(&mem_iowtab[IOMEM32(0x1124)], io_rcnt_write_mode2, 1); map_item(&mem_iowtab[IOMEM32(0x1128)], io_rcnt_write_target2, 1); // map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1); -// map_item(&mem_iowtab[IOMEM32(0x1814)], GPU_writeStatus, 1); + map_item(&mem_iowtab[IOMEM32(0x1814)], io_gpu_write_status, 1); map_item(&mem_iowtab[IOMEM32(0x1820)], mdecWrite0, 1); map_item(&mem_iowtab[IOMEM32(0x1824)], mdecWrite1, 1); @@ -441,11 +469,15 @@ void new_dyna_pcsx_mem_reset(void) // plugins might change so update the pointers map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1); - map_item(&mem_iortab[IOMEM32(0x1814)], GPU_readStatus, 1); for (i = 0x1c00; i < 0x1e00; i += 2) map_item(&mem_iortab[IOMEM16(i)], SPU_readRegister, 1); map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1); - map_item(&mem_iowtab[IOMEM32(0x1814)], GPU_writeStatus, 1); +} + +void new_dyna_pcsx_mem_shutdown(void) +{ + psxUnmap(mem_readtab, 0x200000 * 4, MAP_TAG_LUTS); + mem_writetab = mem_readtab = NULL; }