X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fpcsxmem.c;h=9376ff47acdcd145301f730968a6db12a7f31845;hp=4d83452d3d7b84ea9292a056da2226fb78f6dd81;hb=c2502333b2e56e520bb9ecc2f931a639eee415d7;hpb=92879b62c06f6c1d363a138f77f7727d0fc7721e

diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
index 4d83452d..9376ff47 100644
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -30,7 +30,12 @@ static u32 mem_ffwtab[(1+2+4) * 0x1000 / 4];
 //static u32 mem_unmrtab[(1+2+4) * 0x1000 / 4];
 static u32 mem_unmwtab[(1+2+4) * 0x1000 / 4];
 
+// When this is called in a loop, and 'h' is a function pointer, clang will crash.
+#ifdef __clang__
+static __attribute__ ((noinline)) void map_item(u32 *out, const void *h, u32 flag)
+#else
 static void map_item(u32 *out, const void *h, u32 flag)
+#endif
 {
 	u32 hv = (u32)h;
 	if (hv & 1) {
@@ -147,9 +152,9 @@ make_rcnt_funcs(2)
 
 static void io_write_ireg16(u32 value)
 {
-	if (Config.Sio) psxHu16ref(0x1070) |= 0x80;
+	//if (Config.Sio) psxHu16ref(0x1070) |= 0x80;
 	if (Config.SpuIrq) psxHu16ref(0x1070) |= 0x200;
-	psxHu16ref(0x1070) &= psxHu16(0x1074) & value;
+	psxHu16ref(0x1070) &= value;
 }
 
 static void io_write_imask16(u32 value)
@@ -161,9 +166,9 @@ static void io_write_imask16(u32 value)
 
 static void io_write_ireg32(u32 value)
 {
-	if (Config.Sio) psxHu32ref(0x1070) |= 0x80;
+	//if (Config.Sio) psxHu32ref(0x1070) |= 0x80;
 	if (Config.SpuIrq) psxHu32ref(0x1070) |= 0x200;
-	psxHu32ref(0x1070) &= psxHu32(0x1074) & value;
+	psxHu32ref(0x1070) &= value;
 }
 
 static void io_write_imask32(u32 value)
@@ -205,7 +210,7 @@ make_dma_func(6)
 static void io_spu_write16(u32 value)
 {
 	// meh
-	SPU_writeRegister(address, value);
+	SPU_writeRegister(address, value, psxRegs.cycle);
 }
 
 static void io_spu_write32(u32 value)
@@ -213,8 +218,8 @@ static void io_spu_write32(u32 value)
 	SPUwriteRegister wfunc = SPU_writeRegister;
 	u32 a = address;
 
-	wfunc(a, value & 0xffff);
-	wfunc(a + 2, value >> 16);
+	wfunc(a, value & 0xffff, psxRegs.cycle);
+	wfunc(a + 2, value >> 16, psxRegs.cycle);
 }
 
 static u32 io_gpu_read_status(void)
@@ -287,7 +292,7 @@ void new_dyna_pcsx_mem_load_state(void)
 	map_rcnt_rcount2(rcnts[2].mode);
 }
 
-int pcsxmem_is_handler_dynamic(u_int addr)
+int pcsxmem_is_handler_dynamic(unsigned int addr)
 {
 	if ((addr & 0xfffff000) != 0x1f801000)
 		return 0;
@@ -338,11 +343,17 @@ void new_dyna_pcsx_mem_init(void)
 
 	// scratchpad
 	map_l1_mem(mem_readtab, 0, 0x1f800000, 0x1000, psxH);
+	map_l1_mem(mem_readtab, 0, 0x9f800000, 0x1000, psxH);
 	map_l1_mem(mem_writetab, 0, 0x1f800000, 0x1000, psxH);
+	map_l1_mem(mem_writetab, 0, 0x9f800000, 0x1000, psxH);
 
 	// I/O
 	map_item(&mem_readtab[0x1f801000 >> 12], mem_iortab, 1);
+	map_item(&mem_readtab[0x9f801000 >> 12], mem_iortab, 1);
+	map_item(&mem_readtab[0xbf801000 >> 12], mem_iortab, 1);
 	map_item(&mem_writetab[0x1f801000 >> 12], mem_iowtab, 1);
+	map_item(&mem_writetab[0x9f801000 >> 12], mem_iowtab, 1);
+	map_item(&mem_writetab[0xbf801000 >> 12], mem_iowtab, 1);
 
 	// L2
 	// unmapped tables