X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fpsxcounters.c;h=3e6d417e91fabb67b2447ec0d660190c7b0ff581;hp=5056c70980ca7008d2b19e725156822a1d8c5229;hb=a29f182fb4cf03fb74ec809746cee757f6d47715;hpb=0486fdc9bd313ce2f01dafa4d3c151f40e2c729b diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c index 5056c709..3e6d417e 100644 --- a/libpcsxcore/psxcounters.c +++ b/libpcsxcore/psxcounters.c @@ -128,7 +128,7 @@ void _psxRcntWcount( u32 index, u32 value ) } else { - rcnts[index].cycle = 0xffff * rcnts[index].rate; + rcnts[index].cycle = 0x10000 * rcnts[index].rate; rcnts[index].counterState = CountToOverflow; } } @@ -143,15 +143,61 @@ u32 _psxRcntRcount( u32 index ) if (rcnts[index].rate > 1) count /= rcnts[index].rate; - if( count > 0xffff ) + if( count > 0x10000 ) { - verboseLog( 1, "[RCNT %i] rcount > 0xffff: %x\n", index, count ); - count &= 0xffff; + verboseLog( 1, "[RCNT %i] rcount > 0x10000: %x\n", index, count ); } + count &= 0xffff; return count; } +static +void _psxRcntWmode( u32 index, u32 value ) +{ + rcnts[index].mode = value; + + switch( index ) + { + case 0: + if( value & Rc0PixelClock ) + { + rcnts[index].rate = 5; + } + else + { + rcnts[index].rate = 1; + } + break; + case 1: + if( value & Rc1HSyncClock ) + { + rcnts[index].rate = (PSXCLK / (FrameRate[Config.PsxType] * HSyncTotal[Config.PsxType])); + } + else + { + rcnts[index].rate = 1; + } + break; + case 2: + if( value & Rc2OneEighthClock ) + { + rcnts[index].rate = 8; + } + else + { + rcnts[index].rate = 1; + } + + // TODO: wcount must work. + if( value & Rc2Disable ) + { + rcnts[index].rate = 0xffffffff; + } + break; + } +} + /******************************************************************************/ static @@ -188,26 +234,29 @@ void psxRcntSet() static void psxRcntReset( u32 index ) { - u32 count; + u32 rcycles; rcnts[index].mode |= RcUnknown10; if( rcnts[index].counterState == CountToTarget ) { - count = psxRegs.cycle; - count -= rcnts[index].cycleStart; - if( rcnts[index].rate > 1 ) - count /= rcnts[index].rate; + rcycles = psxRegs.cycle - rcnts[index].cycleStart; if( rcnts[index].mode & RcCountToTarget ) - count -= rcnts[index].target; - - _psxRcntWcount( index, count ); + { + rcycles -= rcnts[index].target * rcnts[index].rate; + rcnts[index].cycleStart = psxRegs.cycle - rcycles; + } + else + { + rcnts[index].cycle = 0x10000 * rcnts[index].rate; + rcnts[index].counterState = CountToOverflow; + } if( rcnts[index].mode & RcIrqOnTarget ) { if( (rcnts[index].mode & RcIrqRegenerate) || (!rcnts[index].irqState) ) { - verboseLog( 3, "[RCNT %i] irq: %x\n", index, count ); + verboseLog( 3, "[RCNT %i] irq\n", index ); setIrq( rcnts[index].irq ); rcnts[index].irqState = 1; } @@ -215,25 +264,28 @@ void psxRcntReset( u32 index ) rcnts[index].mode |= RcCountEqTarget; - if( count < 0xffff ) // special case, overflow too? + if( rcycles < 0x10000 * rcnts[index].rate ) return; } if( rcnts[index].counterState == CountToOverflow ) { - count = psxRegs.cycle; - count -= rcnts[index].cycleStart; - if (rcnts[index].rate > 1) - count /= rcnts[index].rate; - count -= 0xffff; + rcycles = psxRegs.cycle - rcnts[index].cycleStart; + rcycles -= 0x10000 * rcnts[index].rate; + + rcnts[index].cycleStart = psxRegs.cycle - rcycles; - _psxRcntWcount( index, count ); + if( rcycles < rcnts[index].target * rcnts[index].rate ) + { + rcnts[index].cycle = rcnts[index].target * rcnts[index].rate; + rcnts[index].counterState = CountToTarget; + } if( rcnts[index].mode & RcIrqOnOverflow ) { if( (rcnts[index].mode & RcIrqRegenerate) || (!rcnts[index].irqState) ) { - verboseLog( 3, "[RCNT %i] irq: %x\n", index, count ); + verboseLog( 3, "[RCNT %i] irq\n", index ); setIrq( rcnts[index].irq ); rcnts[index].irqState = 1; } @@ -291,7 +343,7 @@ void psxRcntUpdate() if( hSyncCount == VBlankStart ) { HW_GPU_STATUS &= ~PSXGPU_LCF; - + GPU_vBlank( 1, 0 ); setIrq( 0x01 ); EmuUpdate(); @@ -307,6 +359,7 @@ void psxRcntUpdate() gpuSyncPluginSR(); if( (HW_GPU_STATUS & PSXGPU_ILACE_BITS) == PSXGPU_ILACE_BITS ) HW_GPU_STATUS |= frame_counter << 31; + GPU_vBlank( 0, HW_GPU_STATUS >> 31 ); } // Schedule next call, in hsyncs @@ -350,50 +403,10 @@ void psxRcntWmode( u32 index, u32 value ) { verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value ); - rcnts[index].mode = value; - rcnts[index].irqState = 0; - - switch( index ) - { - case 0: - if( value & Rc0PixelClock ) - { - rcnts[index].rate = 5; - } - else - { - rcnts[index].rate = 1; - } - break; - case 1: - if( value & Rc1HSyncClock ) - { - rcnts[index].rate = (PSXCLK / (FrameRate[Config.PsxType] * HSyncTotal[Config.PsxType])); - } - else - { - rcnts[index].rate = 1; - } - break; - case 2: - if( value & Rc2OneEighthClock ) - { - rcnts[index].rate = 8; - } - else - { - rcnts[index].rate = 1; - } - - // TODO: wcount must work. - if( value & Rc2Disable ) - { - rcnts[index].rate = 0xffffffff; - } - break; - } - + _psxRcntWmode( index, value ); _psxRcntWcount( index, 0 ); + + rcnts[index].irqState = 0; psxRcntSet(); } @@ -490,6 +503,9 @@ void psxRcntInit() s32 psxRcntFreeze( gzFile f, s32 Mode ) { + u32 count; + s32 i; + gzfreeze( &rcnts, sizeof(rcnts) ); gzfreeze( &hSyncCount, sizeof(hSyncCount) ); gzfreeze( &spuSyncCount, sizeof(spuSyncCount) ); @@ -497,9 +513,19 @@ s32 psxRcntFreeze( gzFile f, s32 Mode ) gzfreeze( &psxNextsCounter, sizeof(psxNextsCounter) ); if (Mode == 0) + { + // don't trust things from a savestate + for( i = 0; i < CounterQuantity; ++i ) + { + _psxRcntWmode( i, rcnts[i].mode ); + count = (psxRegs.cycle - rcnts[i].cycleStart) / rcnts[i].rate; + _psxRcntWcount( i, count ); + } hsync_steps = (psxRegs.cycle - rcnts[3].cycleStart) / rcnts[3].target; + psxRcntSet(); - base_cycle = 0; + base_cycle = 0; + } return 0; }