X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fpsxdma.c;h=03ee563913ad9402a1b62af612b218b0d7689dc6;hp=e15f0185da12aae99c12485ed7ec8561e1536d0e;hb=HEAD;hpb=b4d5a91d406bde3c317893c62f3daf42d4dc64eb diff --git a/libpcsxcore/psxdma.c b/libpcsxcore/psxdma.c index e15f0185..55d2a0a7 100644 --- a/libpcsxcore/psxdma.c +++ b/libpcsxcore/psxdma.c @@ -27,6 +27,9 @@ #ifndef min #define min(a, b) ((b) < (a) ? (b) : (a)) #endif +#ifndef PSXDMA_LOG +#define PSXDMA_LOG(...) +#endif // Dma0/1 in Mdec.c // Dma3 in CdRom.c @@ -40,46 +43,42 @@ void spuInterrupt() { } void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU - u32 words, words_max, size; + u32 words, words_max = 0, words_copy; u16 *ptr; + madr &= ~3; + ptr = getDmaRam(madr, &words_max); + if (ptr == INVALID_PTR) + log_unhandled("bad dma4 madr %x\n", madr); + + words = words_copy = (bcr >> 16) * (bcr & 0xffff); + if (words_copy > words_max) { + log_unhandled("bad dma4 madr %x bcr %x\n", madr, bcr); + words_copy = words_max; + } + switch (chcr) { case 0x01000201: //cpu to spu transfer -#ifdef PSXDMA_LOG PSXDMA_LOG("*** DMA4 SPU - mem2spu *** %x addr = %x size = %x\n", chcr, madr, bcr); -#endif - ptr = getDmaRam(madr, &words_max); - if (ptr == INVALID_PTR) { -#ifdef CPU_LOG - CPU_LOG("*** DMA4 SPU - mem2spu *** NULL Pointer!!!\n"); -#endif + if (ptr == INVALID_PTR) break; - } - words = (bcr >> 16) * (bcr & 0xffff); - size = min(words, words_max) * 2; - SPU_writeDMAMem(ptr, size, psxRegs.cycle); - HW_DMA4_MADR = SWAPu32((madr & ~3) + words * 4); - SPUDMA_INT(words * 4); + SPU_writeDMAMem(ptr, words_copy * 2, psxRegs.cycle); + HW_DMA4_MADR = SWAPu32(madr + words_copy * 2); + // This should be much slower, like 12+ cycles/byte, it's like + // that because the CPU runs too fast and fifo is not emulated. + // See also set_dma_end(). + set_event(PSXINT_SPUDMA, words * 4 * 4); return; case 0x01000200: //spu to cpu transfer -#ifdef PSXDMA_LOG PSXDMA_LOG("*** DMA4 SPU - spu2mem *** %x addr = %x size = %x\n", chcr, madr, bcr); -#endif - ptr = getDmaRam(madr, &words_max); - if (ptr == INVALID_PTR) { -#ifdef CPU_LOG - CPU_LOG("*** DMA4 SPU - spu2mem *** NULL Pointer!!!\n"); -#endif + if (ptr == INVALID_PTR) break; - } - words = (bcr >> 16) * (bcr & 0xffff); - size = min(words, words_max) * 2; - SPU_readDMAMem(ptr, size, psxRegs.cycle); - psxCpu->Clear(madr, words); + SPU_readDMAMem(ptr, words_copy * 2, psxRegs.cycle); + psxCpu->Clear(madr, words_copy); - HW_DMA4_MADR = SWAPu32(madr + words * 4); - SPUDMA_INT(words * 4); + HW_DMA4_MADR = SWAPu32(madr + words_copy * 4); + set_event(PSXINT_SPUDMA, words * 4 * 4); return; default: @@ -91,6 +90,7 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU DMA_INTERRUPT(4); } +#if 0 // Taken from PEOPS SOFTGPU static inline boolean CheckForEndlessLoop(u32 laddr, u32 *lUsedAddr) { if (laddr == lUsedAddr[1]) return TRUE; @@ -131,81 +131,85 @@ static u32 gpuDmaChainSize(u32 addr) { return size; } +#endif void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU - u32 *ptr, madr_next, *madr_next_p, size; - u32 words, words_max, words_copy; - int do_walking; + u32 *ptr, madr_next, *madr_next_p; + u32 words, words_left, words_max, words_copy; + int cycles_sum, cycles_last_cmd = 0, do_walking; + madr &= ~3; switch (chcr) { case 0x01000200: // vram2mem -#ifdef PSXDMA_LOG PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); -#endif ptr = getDmaRam(madr, &words_max); if (ptr == INVALID_PTR) { -#ifdef CPU_LOG - CPU_LOG("*** DMA2 GPU - vram2mem *** NULL Pointer!!!\n"); -#endif + log_unhandled("bad dma2 madr %x\n", madr); break; } // BA blocks * BS words (word = 32-bits) - words = (bcr >> 16) * (bcr & 0xffff); - words_copy = min(words, words_max); + words = words_copy = (bcr >> 16) * (bcr & 0xffff); + if (words > words_max) { + log_unhandled("bad dma2 madr %x bcr %x\n", madr, bcr); + words_copy = words_max; + } GPU_readDataMem(ptr, words_copy); psxCpu->Clear(madr, words_copy); - HW_DMA2_MADR = SWAPu32((madr & ~3) + words * 4); + HW_DMA2_MADR = SWAPu32(madr + words_copy * 4); + // careful: gpu_state_change() also messes with this + psxRegs.gpuIdleAfter = psxRegs.cycle + words / 4 + 16; // already 32-bit word size ((size * 4) / 4) - GPUDMA_INT(words / 4); + set_event(PSXINT_GPUDMA, words / 4); return; case 0x01000201: // mem2vram -#ifdef PSXDMA_LOG PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); -#endif - ptr = getDmaRam(madr, &words_max); - if (ptr == INVALID_PTR) { -#ifdef CPU_LOG - CPU_LOG("*** DMA2 GPU - mem2vram *** NULL Pointer!!!\n"); -#endif - break; + words = words_left = (bcr >> 16) * (bcr & 0xffff); + while (words_left > 0) { + ptr = getDmaRam(madr, &words_max); + if (ptr == INVALID_PTR) { + log_unhandled("bad2 dma madr %x\n", madr); + break; + } + words_copy = min(words_left, words_max); + GPU_writeDataMem(ptr, words_copy); + words_left -= words_copy; + madr += words_copy * 4; } - // BA blocks * BS words (word = 32-bits) - words = (bcr >> 16) * (bcr & 0xffff); - GPU_writeDataMem(ptr, min(words, words_max)); - HW_DMA2_MADR = SWAPu32((madr & ~3) + words * 4); + HW_DMA2_MADR = SWAPu32(madr); + // careful: gpu_state_change() also messes with this + psxRegs.gpuIdleAfter = psxRegs.cycle + words / 4 + 16; // already 32-bit word size ((size * 4) / 4) - GPUDMA_INT(words / 4); + set_event(PSXINT_GPUDMA, words / 4); return; case 0x01000401: // dma chain -#ifdef PSXDMA_LOG PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); -#endif // when not emulating walking progress, end immediately madr_next = 0xffffff; do_walking = Config.GpuListWalking; - if (do_walking < 0) + if (do_walking < 0 || Config.hacks.gpu_timing1024) do_walking = Config.hacks.gpu_slow_list_walking; madr_next_p = do_walking ? &madr_next : NULL; - size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff, madr_next_p); - if ((int)size <= 0) - size = gpuDmaChainSize(madr); + cycles_sum = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff, + madr_next_p, &cycles_last_cmd); - HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY); HW_DMA2_MADR = SWAPu32(madr_next); - // Tekken 3 = use 1.0 only (not 1.5x) + // a hack for Judge Dredd which is annoyingly sensitive to timing + if (Config.hacks.gpu_timing1024) + cycles_sum = 1024; - // Einhander = parse linked list in pieces (todo) - // Rebel Assault 2 = parse linked list in pieces (todo) - GPUDMA_INT(size); + psxRegs.gpuIdleAfter = psxRegs.cycle + cycles_sum + cycles_last_cmd; + set_event(PSXINT_GPUDMA, cycles_sum); + //printf("%u dma2cf: %6d,%4d %08x %08x %08x %08x\n", psxRegs.cycle, + // cycles_sum, cycles_last_cmd, madr, bcr, chcr, HW_DMA2_MADR); return; default: @@ -220,10 +224,17 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU void gpuInterrupt() { if (HW_DMA2_CHCR == SWAP32(0x01000401) && !(HW_DMA2_MADR & SWAP32(0x800000))) { - u32 size, madr_next = 0xffffff; - size = GPU_dmaChain((u32 *)psxM, HW_DMA2_MADR & 0x1fffff, &madr_next); + u32 madr_next = 0xffffff, madr = SWAPu32(HW_DMA2_MADR); + int cycles_sum, cycles_last_cmd = 0; + cycles_sum = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff, + &madr_next, &cycles_last_cmd); HW_DMA2_MADR = SWAPu32(madr_next); - GPUDMA_INT(size); + if ((s32)(psxRegs.gpuIdleAfter - psxRegs.cycle) > 0) + cycles_sum += psxRegs.gpuIdleAfter - psxRegs.cycle; + psxRegs.gpuIdleAfter = psxRegs.cycle + cycles_sum + cycles_last_cmd; + set_event(PSXINT_GPUDMA, cycles_sum); + //printf("%u dma2cn: %6d,%4d %08x\n", psxRegs.cycle, cycles_sum, + // cycles_last_cmd, HW_DMA2_MADR); return; } if (HW_DMA2_CHCR & SWAP32(0x01000000)) @@ -231,23 +242,24 @@ void gpuInterrupt() { HW_DMA2_CHCR &= SWAP32(~0x01000000); DMA_INTERRUPT(2); } - HW_GPU_STATUS |= SWAP32(PSXGPU_nBUSY); // GPU no longer busy +} + +void psxAbortDma2() { + psxRegs.gpuIdleAfter = psxRegs.cycle + 32; } void psxDma6(u32 madr, u32 bcr, u32 chcr) { - u32 words; - u32 *mem = (u32 *)PSXM(madr); + u32 words, words_max; + u32 *mem; -#ifdef PSXDMA_LOG PSXDMA_LOG("*** DMA6 OT *** %x addr = %x size = %x\n", chcr, madr, bcr); -#endif if (chcr == 0x11000002) { + madr &= ~3; + mem = getDmaRam(madr, &words_max); if (mem == INVALID_PTR) { -#ifdef CPU_LOG - CPU_LOG("*** DMA6 OT *** NULL Pointer!!!\n"); -#endif - HW_DMA6_CHCR &= SWAP32(~0x01000000); + log_unhandled("bad6 dma madr %x\n", madr); + HW_DMA6_CHCR &= SWAP32(~0x11000000); DMA_INTERRUPT(6); return; } @@ -255,16 +267,15 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) { // already 32-bit size words = bcr; - while (bcr--) { + while (bcr-- && mem > (u32 *)psxM) { *mem-- = SWAP32((madr - 4) & 0xffffff); madr -= 4; } *++mem = SWAP32(0xffffff); - //GPUOTCDMA_INT(size); // halted psxRegs.cycle += words; - GPUOTCDMA_INT(16); + set_event(PSXINT_GPUOTCDMA, 16); return; } else { @@ -272,7 +283,7 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) { log_unhandled("*** DMA6 OT - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr); } - HW_DMA6_CHCR &= SWAP32(~0x01000000); + HW_DMA6_CHCR &= SWAP32(~0x11000000); DMA_INTERRUPT(6); } @@ -280,7 +291,7 @@ void gpuotcInterrupt() { if (HW_DMA6_CHCR & SWAP32(0x01000000)) { - HW_DMA6_CHCR &= SWAP32(~0x01000000); + HW_DMA6_CHCR &= SWAP32(~0x11000000); DMA_INTERRUPT(6); } }