X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fpsxdma.c;h=ff7d6a3be2a4a9ebbae42482d79f735d0edfc5b6;hp=df79b6d3f953a953266bae8ca880d8494f6e6468;hb=bdd050c3ed792381df2e744fee5b7ee80b93fd68;hpb=b03e0caf5e153551cb71065ffaa4361b7f7e492b diff --git a/libpcsxcore/psxdma.c b/libpcsxcore/psxdma.c index df79b6d3..ff7d6a3b 100644 --- a/libpcsxcore/psxdma.c +++ b/libpcsxcore/psxdma.c @@ -22,13 +22,17 @@ */ #include "psxdma.h" +#include "gpu.h" // Dma0/1 in Mdec.c // Dma3 in CdRom.c void spuInterrupt() { - HW_DMA4_CHCR &= SWAP32(~0x01000000); - DMA_INTERRUPT(4); + if (HW_DMA4_CHCR & SWAP32(0x01000000)) + { + HW_DMA4_CHCR &= SWAP32(~0x01000000); + DMA_INTERRUPT(4); + } } void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU @@ -47,7 +51,7 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU #endif break; } - SPU_writeDMAMem(ptr, (bcr >> 16) * (bcr & 0xffff) * 2); + SPU_writeDMAMem(ptr, (bcr >> 16) * (bcr & 0xffff) * 2, psxRegs.cycle); SPUDMA_INT((bcr >> 16) * (bcr & 0xffff) / 2); return; @@ -63,7 +67,7 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU break; } size = (bcr >> 16) * (bcr & 0xffff) * 2; - SPU_readDMAMem(ptr, size); + SPU_readDMAMem(ptr, size, psxRegs.cycle); psxCpu->Clear(madr, size); break; @@ -170,6 +174,7 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff); if ((int)size <= 0) size = gpuDmaChainSize(madr); + HW_GPU_STATUS &= ~PSXGPU_nBUSY; // Tekken 3 = use 1.0 only (not 1.5x) @@ -192,8 +197,12 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU } void gpuInterrupt() { - HW_DMA2_CHCR &= SWAP32(~0x01000000); - DMA_INTERRUPT(2); + if (HW_DMA2_CHCR & SWAP32(0x01000000)) + { + HW_DMA2_CHCR &= SWAP32(~0x01000000); + DMA_INTERRUPT(2); + } + HW_GPU_STATUS |= PSXGPU_nBUSY; // GPU no longer busy } void psxDma6(u32 madr, u32 bcr, u32 chcr) { @@ -239,6 +248,9 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) { void gpuotcInterrupt() { - HW_DMA6_CHCR &= SWAP32(~0x01000000); - DMA_INTERRUPT(6); + if (HW_DMA6_CHCR & SWAP32(0x01000000)) + { + HW_DMA6_CHCR &= SWAP32(~0x01000000); + DMA_INTERRUPT(6); + } }