X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fpsxhw.c;h=dbcb9892f4255ad0f2a35d5be6265e00d4808273;hp=0c5320ad88562b396f385b5fea5c3472f92f837e;hb=c979e8c288de90834ceecfd7a37543a44cdd9402;hpb=d28b54b1d1d161b3f3acc3299c43106a022451e6 diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c index 0c5320ad..dbcb9892 100644 --- a/libpcsxcore/psxhw.c +++ b/libpcsxcore/psxhw.c @@ -24,6 +24,10 @@ #include "psxhw.h" #include "mdec.h" #include "cdrom.h" +#include "gpu.h" + +//#undef PSXHW_LOG +//#define PSXHW_LOG printf void psxHwReset() { if (Config.Sio) psxHu32ref(0x1070) |= SWAP32(0x80); @@ -34,12 +38,13 @@ void psxHwReset() { mdecInit(); // initialize mdec decoder cdrReset(); psxRcntInit(); + HW_GPU_STATUS = 0x14802000; } u8 psxHwRead8(u32 add) { unsigned char hard; - switch (add) { + switch (add & 0x1fffffff) { case 0x1f801040: hard = sioRead8();break; #ifdef ENABLE_SIO1API case 0x1f801050: hard = SIO1_readData8(); break; @@ -65,7 +70,7 @@ u8 psxHwRead8(u32 add) { u16 psxHwRead16(u32 add) { unsigned short hard; - switch (add) { + switch (add & 0x1fffffff) { #ifdef PSXHW_LOG case 0x1f801070: PSXHW_LOG("IREG 16bit read %x\n", psxHu16(0x1070)); return psxHu16(0x1070); @@ -118,7 +123,14 @@ u16 psxHwRead16(u32 add) { return hard; case 0x1f80105e: hard = SIO1_readBaud16(); - return hard; + return hard; +#else + /* Fixes Armored Core misdetecting the Link cable being detected. + * We want to turn that thing off and force it to do local multiplayer instead. + * Thanks Sony for the fix, they fixed it in their PS Classic fork. + */ + case 0x1f801054: + return 0x80; #endif case 0x1f801100: hard = psxRcntRcount(0); @@ -199,7 +211,7 @@ u16 psxHwRead16(u32 add) { u32 psxHwRead32(u32 add) { u32 hard; - switch (add) { + switch (add & 0x1fffffff) { case 0x1f801040: hard = sioRead8(); hard |= sioRead8() << 8; @@ -235,7 +247,10 @@ u32 psxHwRead32(u32 add) { #endif return hard; case 0x1f801814: - hard = GPU_readStatus(); + gpuSyncPluginSR(); + hard = HW_GPU_STATUS; + if (hSyncCount < 240 && (HW_GPU_STATUS & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS) + hard |= PSXGPU_LCF & (psxRegs.cycle << 20); #ifdef PSXHW_LOG PSXHW_LOG("GPU STATUS 32bit read %x\n", hard); #endif @@ -347,7 +362,7 @@ u32 psxHwRead32(u32 add) { } void psxHwWrite8(u32 add, u8 value) { - switch (add) { + switch (add & 0x1fffffff) { case 0x1f801040: sioWrite8(value); break; #ifdef ENABLE_SIO1API case 0x1f801050: SIO1_writeData8(value); break; @@ -371,7 +386,7 @@ void psxHwWrite8(u32 add, u8 value) { } void psxHwWrite16(u32 add, u16 value) { - switch (add) { + switch (add & 0x1fffffff) { case 0x1f801040: sioWrite8((unsigned char)value); sioWrite8((unsigned char)(value>>8)); @@ -423,7 +438,7 @@ void psxHwWrite16(u32 add, u16 value) { #endif if (Config.Sio) psxHu16ref(0x1070) |= SWAPu16(0x80); if (Config.SpuIrq) psxHu16ref(0x1070) |= SWAPu16(0x200); - psxHu16ref(0x1070) &= SWAPu16((psxHu16(0x1074) & value)); + psxHu16ref(0x1070) &= SWAPu16(value); return; case 0x1f801074: @@ -485,7 +500,7 @@ void psxHwWrite16(u32 add, u16 value) { default: if (add>=0x1f801c00 && add<0x1f801e00) { - SPU_writeRegister(add, value); + SPU_writeRegister(add, value, psxRegs.cycle); return; } @@ -510,7 +525,7 @@ void psxHwWrite16(u32 add, u16 value) { } void psxHwWrite32(u32 add, u32 value) { - switch (add) { + switch (add & 0x1fffffff) { case 0x1f801040: sioWrite8((unsigned char)value); sioWrite8((unsigned char)((value&0xff) >> 8)); @@ -538,7 +553,7 @@ void psxHwWrite32(u32 add, u32 value) { #endif if (Config.Sio) psxHu32ref(0x1070) |= SWAPu32(0x80); if (Config.SpuIrq) psxHu32ref(0x1070) |= SWAPu32(0x200); - psxHu32ref(0x1070) &= SWAPu32((psxHu32(0x1074) & value)); + psxHu32ref(0x1070) &= SWAPu32(value); return; case 0x1f801074: #ifdef PSXHW_LOG @@ -658,8 +673,15 @@ void psxHwWrite32(u32 add, u32 value) { PSXHW_LOG("DMA ICR 32bit write %x\n", value); #endif { - u32 tmp = (~value) & SWAPu32(HW_DMA_ICR); - HW_DMA_ICR = SWAPu32(((tmp ^ value) & 0xffffff) ^ tmp); + u32 tmp = value & 0x00ff803f; + tmp |= (SWAPu32(HW_DMA_ICR) & ~value) & 0x7f000000; + if ((tmp & HW_DMA_ICR_GLOBAL_ENABLE && tmp & 0x7f000000) + || tmp & HW_DMA_ICR_BUS_ERROR) { + if (!(SWAPu32(HW_DMA_ICR) & HW_DMA_ICR_IRQ_SENT)) + psxHu32ref(0x1070) |= SWAP32(8); + tmp |= HW_DMA_ICR_IRQ_SENT; + } + HW_DMA_ICR = SWAPu32(tmp); return; } @@ -672,7 +694,9 @@ void psxHwWrite32(u32 add, u32 value) { #ifdef PSXHW_LOG PSXHW_LOG("GPU STATUS 32bit write %x\n", value); #endif - GPU_writeStatus(value); return; + GPU_writeStatus(value); + gpuSyncPluginSR(); + return; case 0x1f801820: mdecWrite0(value); break; @@ -728,6 +752,13 @@ void psxHwWrite32(u32 add, u32 value) { psxRcntWtarget(2, value & 0xffff); return; default: + // Dukes of Hazard 2 - car engine noise + if (add>=0x1f801c00 && add<0x1f801e00) { + SPU_writeRegister(add, value&0xffff, psxRegs.cycle); + SPU_writeRegister(add + 2, value>>16, psxRegs.cycle); + return; + } + psxHu32ref(add) = SWAPu32(value); #ifdef PSXHW_LOG PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value); @@ -740,6 +771,6 @@ void psxHwWrite32(u32 add, u32 value) { #endif } -int psxHwFreeze(gzFile f, int Mode) { +int psxHwFreeze(void *f, int Mode) { return 0; }