X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fpsxhw.c;h=ebdff87ce7eaa828e2806935d0911a12ca8ec9fd;hp=f265e196ee76ecfd275c1f6979eb5bb1c31f31ed;hb=8ad120c9c4dca424feac32098cb4af6a2c8f641f;hpb=28bc5688589e5f2d6cfa86bb22441e763de468cd

diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
index f265e196..ebdff87c 100644
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
@@ -24,6 +24,10 @@
 #include "psxhw.h"
 #include "mdec.h"
 #include "cdrom.h"
+#include "gpu.h"
+
+//#undef PSXHW_LOG
+//#define PSXHW_LOG printf
 
 void psxHwReset() {
 	if (Config.Sio) psxHu32ref(0x1070) |= SWAP32(0x80);
@@ -34,6 +38,7 @@ void psxHwReset() {
 	mdecInit(); // initialize mdec decoder
 	cdrReset();
 	psxRcntInit();
+	HW_GPU_STATUS = 0x14802000;
 }
 
 u8 psxHwRead8(u32 add) {
@@ -235,7 +240,10 @@ u32 psxHwRead32(u32 add) {
 #endif
 			return hard;
 		case 0x1f801814:
-			hard = GPU_readStatus();
+			gpuSyncPluginSR();
+			hard = HW_GPU_STATUS;
+			if (hSyncCount < 240 && (HW_GPU_STATUS & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
+				hard |= PSXGPU_LCF & (psxRegs.cycle << 20);
 #ifdef PSXHW_LOG
 			PSXHW_LOG("GPU STATUS 32bit read %x\n", hard);
 #endif
@@ -432,7 +440,7 @@ void psxHwWrite16(u32 add, u16 value) {
 #endif
 			psxHu16ref(0x1074) = SWAPu16(value);
 			if (psxHu16ref(0x1070) & value)
-				new_dyna_set_event(6, 1);
+				new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
 			return;
 
 		case 0x1f801100:
@@ -546,7 +554,7 @@ void psxHwWrite32(u32 add, u32 value) {
 #endif
 			psxHu32ref(0x1074) = SWAPu32(value);
 			if (psxHu32ref(0x1070) & value)
-				new_dyna_set_event(6, 1);
+				new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
 			return;
 
 #ifdef PSXHW_LOG
@@ -658,8 +666,15 @@ void psxHwWrite32(u32 add, u32 value) {
 			PSXHW_LOG("DMA ICR 32bit write %x\n", value);
 #endif
 		{
-			u32 tmp = (~value) & SWAPu32(HW_DMA_ICR);
-			HW_DMA_ICR = SWAPu32(((tmp ^ value) & 0xffffff) ^ tmp);
+			u32 tmp = value & 0x00ff803f;
+			tmp |= (SWAPu32(HW_DMA_ICR) & ~value) & 0x7f000000;
+			if ((tmp & HW_DMA_ICR_GLOBAL_ENABLE && tmp & 0x7f000000)
+			    || tmp & HW_DMA_ICR_BUS_ERROR) {
+				if (!(SWAPu32(HW_DMA_ICR) & HW_DMA_ICR_IRQ_SENT))
+					psxHu32ref(0x1070) |= SWAP32(8);
+				tmp |= HW_DMA_ICR_IRQ_SENT;
+			}
+			HW_DMA_ICR = SWAPu32(tmp);
 			return;
 		}
 
@@ -672,7 +687,9 @@ void psxHwWrite32(u32 add, u32 value) {
 #ifdef PSXHW_LOG
 			PSXHW_LOG("GPU STATUS 32bit write %x\n", value);
 #endif
-			GPU_writeStatus(value); return;
+			GPU_writeStatus(value);
+			gpuSyncPluginSR();
+			return;
 
 		case 0x1f801820:
 			mdecWrite0(value); break;
@@ -728,6 +745,13 @@ void psxHwWrite32(u32 add, u32 value) {
 			psxRcntWtarget(2, value & 0xffff); return;
 
 		default:
+			// Dukes of Hazard 2 - car engine noise
+			if (add>=0x1f801c00 && add<0x1f801e00) {
+				SPU_writeRegister(add, value&0xffff);
+				SPU_writeRegister(add + 2, value>>16);
+				return;
+			}
+
 			psxHu32ref(add) = SWAPu32(value);
 #ifdef PSXHW_LOG
 			PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);