X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fpsxinterpreter.c;h=cf3de7985a3df639a4644e02bfdcd2151a31edf0;hp=3258743b4a17fd5b08e4e3da89a602c42f6c1113;hb=b1ba08510c208685fda8a0a2d0e2b72d98db23b1;hpb=862bfc0d6da5d83c8af5bf3a1fdd189474d25812 diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c index 3258743b..cf3de798 100644 --- a/libpcsxcore/psxinterpreter.c +++ b/libpcsxcore/psxinterpreter.c @@ -25,6 +25,7 @@ #include "r3000a.h" #include "gte.h" #include "psxhle.h" +#include "debug.h" static int branch = 0; static int branch2 = 0; @@ -38,14 +39,14 @@ static u32 branchPC; #define debugI() #endif -inline void execI(); +void execI(); // Subsets void (*psxBSC[64])(); void (*psxSPC[64])(); void (*psxREG[32])(); void (*psxCP0[32])(); -void (*psxCP2[64])(); +void (*psxCP2[64])(struct psxCP2Regs *regs); void (*psxCP2BSC[32])(); static void delayRead(int reg, u32 bpc) { @@ -59,13 +60,13 @@ static void delayRead(int reg, u32 bpc) { psxRegs.pc = bpc; - psxBranchTest(); + branch = 0; psxRegs.GPR.r[reg] = rold; execI(); // first branch opcode psxRegs.GPR.r[reg] = rnew; - branch = 0; + psxBranchTest(); } static void delayWrite(int reg, u32 bpc) { @@ -407,7 +408,7 @@ static int psxDelayBranchTest(u32 tar1) { return psxDelayBranchExec(tmp2); } -__inline void doBranch(u32 tar) { +static void doBranch(u32 tar) { u32 *code; u32 tmp; @@ -504,6 +505,10 @@ void psxDIV() { _i32(_rLo_) = _i32(_rRs_) / _i32(_rRt_); _i32(_rHi_) = _i32(_rRs_) % _i32(_rRt_); } + else { + _i32(_rLo_) = _i32(_rRs_) >= 0 ? 0xffffffff : 1; + _i32(_rHi_) = _i32(_rRs_); + } } void psxDIVU() { @@ -511,6 +516,10 @@ void psxDIVU() { _rLo_ = _rRs_ / _rRt_; _rHi_ = _rRs_ % _rRt_; } + else { + _i32(_rLo_) = 0xffffffff; + _i32(_rHi_) = _i32(_rRs_); + } } void psxMULT() { @@ -718,9 +727,9 @@ void psxLWR() { */ } -void psxSB() { psxMemWrite8 (_oB_, _u8 (_rRt_)); } -void psxSH() { psxMemWrite16(_oB_, _u16(_rRt_)); } -void psxSW() { psxMemWrite32(_oB_, _u32(_rRt_)); } +void psxSB() { psxMemWrite8 (_oB_, _rRt_ & 0xff); } +void psxSH() { psxMemWrite16(_oB_, _rRt_ & 0xffff); } +void psxSW() { psxMemWrite32(_oB_, _rRt_); } u32 SWL_MASK[4] = { 0xffffff00, 0xffff0000, 0xff000000, 0 }; u32 SWL_SHIFT[4] = { 24, 16, 8, 0 }; @@ -771,15 +780,14 @@ void psxMFC0() { if (!_Rt_) return; _i32(_rRt_) = (int)_rFs_; } void psxCFC0() { if (!_Rt_) return; _i32(_rRt_) = (int)_rFs_; } void psxTestSWInts() { - // the next code is untested, if u know please - // tell me if it works ok or not (linuzappz) if (psxRegs.CP0.n.Cause & psxRegs.CP0.n.Status & 0x0300 && - psxRegs.CP0.n.Status & 0x1) { + psxRegs.CP0.n.Status & 0x1) { + psxRegs.CP0.n.Cause &= ~0x7c; psxException(psxRegs.CP0.n.Cause, branch); } } -__inline void MTC0(int reg, u32 val) { +void MTC0(int reg, u32 val) { // SysPrintf("MTC0 %d: %x\n", reg, val); switch (reg) { case 12: // Status @@ -788,7 +796,8 @@ __inline void MTC0(int reg, u32 val) { break; case 13: // Cause - psxRegs.CP0.n.Cause = val & ~(0xfc00); + psxRegs.CP0.n.Cause &= ~0x0300; + psxRegs.CP0.n.Cause |= val & 0x0300; psxTestSWInts(); break; @@ -824,10 +833,10 @@ void psxCOP0() { } void psxCOP2() { - psxCP2[_Funct_](); + psxCP2[_Funct_]((struct psxCP2Regs *)&psxRegs.CP2D); } -void psxBASIC() { +void psxBASIC(struct psxCP2Regs *regs) { psxCP2BSC[_Rs_](); } @@ -873,7 +882,7 @@ void (*psxCP0[32])() = { psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL }; -void (*psxCP2[64])() = { +void (*psxCP2[64])(struct psxCP2Regs *regs) = { psxBASIC, gteRTPS , psxNULL , psxNULL, psxNULL, psxNULL , gteNCLIP, psxNULL, // 00 psxNULL , psxNULL , psxNULL , psxNULL, gteOP , psxNULL , psxNULL , psxNULL, // 08 gteDPCS , gteINTPL, gteMVMVA, gteNCDS, gteCDP , psxNULL , gteNCDT , psxNULL, // 10 @@ -919,7 +928,7 @@ static void intShutdown() { } // interpreter execution -inline void execI() { +void execI() { u32 *code = (u32 *)PSXM(psxRegs.pc); psxRegs.code = ((code == NULL) ? 0 : SWAP32(*code));