X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fpsxmem.c;h=fb48f77bf28be897895fd24b4798e23b5be0ab1a;hp=37a0efd0d2bb13a4571366bd5224adf423860a0a;hb=679d5ee3c46235923a99391922de1df0239e9ff3;hpb=d75460620efa21df695967c72a92265dac04001f diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c index 37a0efd0..fb48f77b 100644 --- a/libpcsxcore/psxmem.c +++ b/libpcsxcore/psxmem.c @@ -195,8 +195,8 @@ int psxMemInit(void) return -1; } - memset(psxMemRLUT, (uintptr_t)INVALID_PTR, 0x10000 * sizeof(void *)); - memset(psxMemWLUT, (uintptr_t)INVALID_PTR, 0x10000 * sizeof(void *)); + memset(psxMemRLUT, (int)(uintptr_t)INVALID_PTR, 0x10000 * sizeof(void *)); + memset(psxMemWLUT, (int)(uintptr_t)INVALID_PTR, 0x10000 * sizeof(void *)); // MemR for (i = 0; i < 0x80; i++) psxMemRLUT[i + 0x0000] = (u8 *)&psxM[(i & 0x1f) << 16]; @@ -265,7 +265,22 @@ void psxMemShutdown() { free(psxMemWLUT); psxMemWLUT = NULL; } -static int writeok = 1; +void psxMemOnIsolate(int enable) +{ + if (enable) { + memset(psxMemWLUT + 0x0000, (int)(uintptr_t)INVALID_PTR, 0x80 * sizeof(void *)); + memset(psxMemWLUT + 0x8000, (int)(uintptr_t)INVALID_PTR, 0x80 * sizeof(void *)); + //memset(psxMemWLUT + 0xa000, (int)(uintptr_t)INVALID_PTR, 0x80 * sizeof(void *)); + } else { + int i; + for (i = 0; i < 0x80; i++) + psxMemWLUT[i + 0x0000] = (void *)&psxM[(i & 0x1f) << 16]; + memcpy(psxMemWLUT + 0x8000, psxMemWLUT, 0x80 * sizeof(void *)); + memcpy(psxMemWLUT + 0xa000, psxMemWLUT, 0x80 * sizeof(void *)); + } + psxCpu->Notify(enable ? R3000ACPU_NOTIFY_CACHE_ISOLATED + : R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL); +} u8 psxMemRead8(u32 mem) { char *p; @@ -334,8 +349,10 @@ u32 psxMemRead32(u32 mem) { DebugCheckBP((mem & 0xffffff) | 0x80000000, R4); return SWAPu32(*(u32 *)(p + (mem & 0xffff))); } else { + if (mem == 0xfffe0130) + return psxRegs.biuReg; #ifdef PSXMEM_LOG - if (writeok) { PSXMEM_LOG("err lw %8.8lx\n", mem); } + PSXMEM_LOG("err lw %8.8lx\n", mem); #endif return 0xFFFFFFFF; } @@ -417,44 +434,13 @@ void psxMemWrite32(u32 mem, u32 value) { psxCpu->Clear(mem, 1); #endif } else { - if (mem != 0xfffe0130) { -#ifndef DRC_DISABLE - if (!writeok) - psxCpu->Clear(mem, 1); -#endif - -#ifdef PSXMEM_LOG - if (writeok) { PSXMEM_LOG("err sw %8.8lx\n", mem); } -#endif - } else { - int i; - - switch (value) { - case 0x800: case 0x804: - if (writeok == 0) break; - writeok = 0; - memset(psxMemWLUT + 0x0000, (uintptr_t)INVALID_PTR, 0x80 * sizeof(void *)); - memset(psxMemWLUT + 0x8000, (uintptr_t)INVALID_PTR, 0x80 * sizeof(void *)); - memset(psxMemWLUT + 0xa000, (uintptr_t)INVALID_PTR, 0x80 * sizeof(void *)); - /* Required for icache interpreter otherwise Armored Core won't boot on icache interpreter */ - psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_ISOLATED, NULL); - break; - case 0x00: case 0x1e988: - if (writeok == 1) break; - writeok = 1; - for (i = 0; i < 0x80; i++) psxMemWLUT[i + 0x0000] = (void *)&psxM[(i & 0x1f) << 16]; - memcpy(psxMemWLUT + 0x8000, psxMemWLUT, 0x80 * sizeof(void *)); - memcpy(psxMemWLUT + 0xa000, psxMemWLUT, 0x80 * sizeof(void *)); - /* Dynarecs might take this opportunity to flush their code cache */ - psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL); - break; - default: + if (mem == 0xfffe0130) { + psxRegs.biuReg = value; + return; + } #ifdef PSXMEM_LOG - PSXMEM_LOG("unk %8.8lx = %x\n", mem, value); + PSXMEM_LOG("err sw %8.8lx\n", mem); #endif - break; - } - } } } }