X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fr3000a.h;h=13aaa59562fb6f1418545634a22411070ba7ea29;hp=51cd37ccc5ad2d607d71293ecbe21303d4f45b1d;hb=8ad120c9c4dca424feac32098cb4af6a2c8f641f;hpb=ef79bbde537d6b9c745a7d86cb9df1d04c35590d

diff --git a/libpcsxcore/r3000a.h b/libpcsxcore/r3000a.h
index 51cd37cc..13aaa595 100644
--- a/libpcsxcore/r3000a.h
+++ b/libpcsxcore/r3000a.h
@@ -40,7 +40,7 @@ typedef struct {
 
 extern R3000Acpu *psxCpu;
 extern R3000Acpu psxInt;
-#if (defined(__x86_64__) || defined(__i386__) || defined(__sh__) || defined(__ppc__)) && !defined(NOPSXREC)
+#if (defined(__x86_64__) || defined(__i386__) || defined(__sh__) || defined(__ppc__) || defined(__arm__)) && !defined(NOPSXREC)
 extern R3000Acpu psxRec;
 #define PSXREC
 #endif
@@ -145,20 +145,67 @@ typedef union {
 	PAIR p[32];
 } psxCP2Ctrl;
 
+enum {
+	PSXINT_SIO = 0,
+	PSXINT_CDR,
+	PSXINT_CDREAD,
+	PSXINT_GPUDMA,
+	PSXINT_MDECOUTDMA,
+	PSXINT_SPUDMA,
+	PSXINT_GPUBUSY,
+	PSXINT_MDECINDMA,
+	PSXINT_GPUOTCDMA,
+	PSXINT_CDRDMA,
+	PSXINT_NEWDRC_CHECK,
+	PSXINT_RCNT,
+	PSXINT_CDRLID,
+	PSXINT_CDRPLAY,
+	PSXINT_COUNT
+};
+
+typedef struct psxCP2Regs {
+	psxCP2Data CP2D; 	/* Cop2 data registers */
+	psxCP2Ctrl CP2C; 	/* Cop2 control registers */
+} psxCP2Regs;
+
 typedef struct {
 	psxGPRRegs GPR;		/* General Purpose Registers */
 	psxCP0Regs CP0;		/* Coprocessor0 Registers */
-	psxCP2Data CP2D; 	/* Cop2 data registers */
-	psxCP2Ctrl CP2C; 	/* Cop2 control registers */
+	union {
+		struct {
+			psxCP2Data CP2D; 	/* Cop2 data registers */
+			psxCP2Ctrl CP2C; 	/* Cop2 control registers */
+		};
+		psxCP2Regs CP2;
+	};
     u32 pc;				/* Program counter */
     u32 code;			/* The instruction */
 	u32 cycle;
 	u32 interrupt;
-	u32 intCycle[32];
+	struct { u32 sCycle, cycle; } intCycle[32];
 } psxRegisters;
 
 extern psxRegisters psxRegs;
 
+/* new_dynarec stuff */
+extern u32 event_cycles[PSXINT_COUNT];
+extern u32 next_interupt;
+
+void new_dyna_save(void);
+void new_dyna_after_save(void);
+void new_dyna_restore(void);
+
+#define new_dyna_set_event(e, c) { \
+	s32 c_ = c; \
+	u32 abs_ = psxRegs.cycle + c_; \
+	s32 odi_ = next_interupt - psxRegs.cycle; \
+	event_cycles[e] = abs_; \
+	if (c_ < odi_) { \
+		/*printf("%u: next_interupt %d -> %d (%u)\n", psxRegs.cycle, odi_, c_, abs_);*/ \
+		next_interupt = abs_; \
+	} \
+}
+
 #if defined(__BIGENDIAN__)
 
 #define _i32(x) *(s32 *)&x