X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=plugins%2Fgpu_neon%2Fgpu.c;h=990fc520d86977fcecdc2c1c75000d476b2597ed;hp=7f5a8a92a24172d29b135414c472c1ea41b56f5d;hb=956f312925948e46da9c3596efadc4babc666a4d;hpb=3ece2f0c51ef6b679cd5765900b567ef47dde1e8

diff --git a/plugins/gpu_neon/gpu.c b/plugins/gpu_neon/gpu.c
index 7f5a8a92..990fc520 100644
--- a/plugins/gpu_neon/gpu.c
+++ b/plugins/gpu_neon/gpu.c
@@ -132,8 +132,10 @@ void GPUwriteStatus(uint32_t data)
     case 0x05:
       gpu.screen.x = data & 0x3ff;
       gpu.screen.y = (data >> 10) & 0x3ff;
-      if (gpu.frameskip.set)
+      if (gpu.frameskip.set && gpu.frameskip.last_flip_frame != *gpu.state.frame_count) {
         decide_frameskip();
+        gpu.frameskip.last_flip_frame = *gpu.state.frame_count;
+      }
       break;
     case 0x06:
       gpu.screen.x1 = data & 0xfff;
@@ -283,24 +285,23 @@ static int check_cmd(uint32_t *data, int count)
       //printf("  %3d: %02x %d\n", pos, cmd, len);
       if ((cmd & 0xf4) == 0x24) {
         // flat textured prim
-        gpu.status.reg &= ~0x1ff;
-        gpu.status.reg |= list[4] & 0x1ff;
+        gpu.ex_regs[1] &= ~0x1ff;
+        gpu.ex_regs[1] |= list[4] & 0x1ff;
       }
       else if ((cmd & 0xf4) == 0x34) {
         // shaded textured prim
-        gpu.status.reg &= ~0x1ff;
-        gpu.status.reg |= list[5] & 0x1ff;
+        gpu.ex_regs[1] &= ~0x1ff;
+        gpu.ex_regs[1] |= list[5] & 0x1ff;
       }
-      else switch (cmd)
+      else if (cmd == 0xe3)
       {
-        case 0xe1:
-          gpu.status.reg &= ~0x7ff;
-          gpu.status.reg |= list[0] & 0x7ff;
-          break;
-        case 0xe6:
-          gpu.status.reg &= ~0x1800;
-          gpu.status.reg |= (list[0] & 3) << 11;
-          break;
+        // no frameskip if it decides to draw to display area,
+        // but not for interlace since it'll most likely always do that
+        uint32_t x = list[0] & 0x3ff;
+        uint32_t y = (list[0] >> 10) & 0x3ff;
+        gpu.frameskip.allow = gpu.status.interlace ||
+          (uint32_t)(x - gpu.screen.x) >= (uint32_t)gpu.screen.w ||
+          (uint32_t)(y - gpu.screen.y) >= (uint32_t)gpu.screen.h;
       }
       if (2 <= cmd && cmd < 0xc0)
         vram_dirty = 1;
@@ -317,7 +318,7 @@ static int check_cmd(uint32_t *data, int count)
     }
 
     if (pos - start > 0) {
-      if (!gpu.frameskip.active)
+      if (!gpu.frameskip.active || !gpu.frameskip.allow)
         do_cmd_list(data + start, pos - start);
       start = pos;
     }
@@ -331,6 +332,10 @@ static int check_cmd(uint32_t *data, int count)
       break;
   }
 
+  gpu.status.reg &= ~0x1fff;
+  gpu.status.reg |= gpu.ex_regs[1] & 0x7ff;
+  gpu.status.reg |= (gpu.ex_regs[6] & 3) << 11;
+
   if (gpu.frameskip.active)
     renderer_sync_ecmds(gpu.ex_regs);
   gpu.state.fb_dirty |= vram_dirty;
@@ -467,15 +472,15 @@ uint32_t GPUreadStatus(void)
   return ret;
 }
 
-typedef struct GPUFREEZETAG
+struct GPUFreeze
 {
   uint32_t ulFreezeVersion;      // should be always 1 for now (set by main emu)
   uint32_t ulStatus;             // current gpu status
   uint32_t ulControl[256];       // latest control register values
   unsigned char psxVRam[1024*1024*2]; // current VRam image (full 2 MB for ZN)
-} GPUFreeze_t;
+};
 
-long GPUfreeze(uint32_t type, GPUFreeze_t *freeze)
+long GPUfreeze(uint32_t type, struct GPUFreeze *freeze)
 {
   int i;