X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=plugins%2Fgpu_unai%2Fgpu.cpp;h=f9f7c4147cc73cefcda42fc3c71a181ecfe8102a;hp=991610cf9cf5cc6eb788d906f09b579e39368bf0;hb=ad6b70be1fa93d6639afb76a9a047eafc5455519;hpb=7c49c8a2a0cd00c453425b0f88c7b117223c92f4

diff --git a/plugins/gpu_unai/gpu.cpp b/plugins/gpu_unai/gpu.cpp
index 991610cf..f9f7c414 100644
--- a/plugins/gpu_unai/gpu.cpp
+++ b/plugins/gpu_unai/gpu.cpp
@@ -40,6 +40,8 @@ bool frameLimit = false; /* frames to wait */
 bool light = true; /* lighting */
 bool blend = true; /* blending */
 
+bool fb_dirty = false;
+
 bool enableAbbeyHack = false; /* Abe's Odyssey hack */
 u8 BLEND_MODE;
 u8 TEXT_MODE;
@@ -180,6 +182,10 @@ long  GPU_freeze(unsigned int bWrite, GPUFreeze_t* p2)
 	if (bWrite)
 	{
 		p2->GPU_gp1 = GPU_GP1;
+		memset(p2->Control, 0, sizeof(p2->Control));
+		p2->Control[5] = DisplayArea[0] | (DisplayArea[1] << 10);
+		p2->Control[7] = DisplayArea[4] | (DisplayArea[5] << 10);
+		p2->Control[8] = ((GPU_GP1 >> 17) & 0x3f) | ((GPU_GP1 >> 10) & 0x40);
 		memcpy(p2->FrameBuffer, (u16*)GPU_FrameBuffer, FRAME_BUFFER_SIZE);
 		return (1);
 	}
@@ -187,6 +193,10 @@ long  GPU_freeze(unsigned int bWrite, GPUFreeze_t* p2)
 	{
 		GPU_GP1 = p2->GPU_gp1;
 		memcpy((u16*)GPU_FrameBuffer, p2->FrameBuffer, FRAME_BUFFER_SIZE);
+		GPU_writeStatus((5 << 24) | p2->Control[5]);
+		GPU_writeStatus((7 << 24) | p2->Control[7]);
+		GPU_writeStatus((8 << 24) | p2->Control[8]);
+		gpuSetTexture(GPU_GP1);
 		return (1);
 	}
 	return (0);
@@ -298,6 +308,7 @@ void  GPU_writeDataMem(u32* dmaAddress, s32 dmaCount)
 	}
 
 	GPU_GP1 = (GPU_GP1 | 0x14000000) & ~0x60000000;
+	fb_dirty = true;
 	pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
 	pcsx4all_prof_resume(PCSX4ALL_PROF_CPU);
 }
@@ -390,6 +401,7 @@ void  GPU_writeData(u32 data)
 		gpuCheckPacket(data);
 	}
 	GPU_GP1 |= 0x14000000;
+	fb_dirty = true;
 	pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
 	pcsx4all_prof_resume(PCSX4ALL_PROF_CPU);
 
@@ -529,10 +541,12 @@ void  GPU_writeStatus(u32 data)
 	case 0x05:
 		DisplayArea[0] = (data & 0x000003FF); //(short)(data & 0x3ff);
 		DisplayArea[1] = ((data & 0x0007FC00)>>10); //(data & 0x000FFC00) >> 10; //(short)((data>>10)&0x1ff);
+		fb_dirty = true;
 		break;
 	case 0x07:
 		DisplayArea[4] = data & 0x000003FF; //(short)(data & 0x3ff);
 		DisplayArea[5] = (data & 0x000FFC00) >> 10; //(short)((data>>10) & 0x3ff);
+		fb_dirty = true;
 		break;
 	case 0x08:
 		{
@@ -543,6 +557,7 @@ void  GPU_writeStatus(u32 data)
 			DisplayArea[3] = VerticalResolution[(GPU_GP1 >> 19) & 3];
 			isPAL = (data & 0x08) ? true : false; // if 1 - PAL mode, else NTSC
 		}
+		fb_dirty = true;
 		break;
 	case 0x10:
 		switch (data & 0xffff) {
@@ -857,8 +872,8 @@ static void blit(void)
 	static s16 old_res_horz, old_res_vert, old_rgb24;
 	s16 isRGB24 = (GPU_GP1 & 0x00200000) ? 1 : 0;
 	s16 h0, x0, y0, w0, h1;
-	u8  *dest = (u8 *)screen_buf;
 	u16 *srcs;
+	u8  *dest;
 
 	x0 = DisplayArea[0] & ~3; // alignment needed by blitter
 	y0 = DisplayArea[1];
@@ -870,13 +885,17 @@ static void blit(void)
 	h1 = DisplayArea[5] - DisplayArea[4]; // display needed
 	if (h0 == 480) h1 = Min2(h1*2,480);
 
+	if (h1 <= 0)
+		return;
+
 	if (w0 != old_res_horz || h1 != old_res_vert || isRGB24 != old_rgb24)
 	{
 		old_res_horz = w0;
 		old_res_vert = h1;
 		old_rgb24 = (s16)isRGB24;
-		cbs->pl_fbdev_set_mode(w0, h1, isRGB24 ? 24 : 16);
+		screen_buf = cbs->pl_fbdev_set_mode(w0, h1, isRGB24 ? 24 : 16);
 	}
+	dest = (u8 *)screen_buf;
 
 	if (isRGB24)
 	{
@@ -901,8 +920,18 @@ void GPU_updateLace(void)
 	// Interlace bit toggle
 	GPU_GP1 ^= 0x80000000;
 
-	if (!((GPU_GP1&0x08000000) || (GPU_GP1&0x00800000)))
+	if (!fb_dirty || (GPU_GP1&0x08800000))
+		return;
+
+	if (!isSkip) {
 		blit();
+
+		fb_dirty = false;
+		if (*cbs->fskip_option)
+			isSkip = true;
+	}
+	else
+		isSkip = false;
 }
 
 long GPUopen(unsigned long *, char *, char *)