X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=plugins%2Fgpulib%2Fgpu.c;h=b444dcf5200b578c8b4d951947dcc3d19ac3cf31;hp=6751ec7bc69fe450cce3bb86743e6efc41db0852;hb=HEAD;hpb=cb245e568086e132cd73ae52620cabe314cdade6 diff --git a/plugins/gpulib/gpu.c b/plugins/gpulib/gpu.c index 6751ec7b..b444dcf5 100644 --- a/plugins/gpulib/gpu.c +++ b/plugins/gpulib/gpu.c @@ -12,8 +12,13 @@ #include #include #include "gpu.h" +#include "gpu_timing.h" +#include "../../libpcsxcore/gpu.h" // meh +#include "../../frontend/plugin_lib.h" +#ifndef ARRAY_SIZE #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#endif #ifdef __GNUC__ #define unlikely(x) __builtin_expect((x), 0) #define preload __builtin_prefetch @@ -29,13 +34,15 @@ struct psx_gpu gpu; -static noinline int do_cmd_buffer(uint32_t *data, int count); +static noinline int do_cmd_buffer(uint32_t *data, int count, + int *cycles_sum, int *cycles_last); static void finish_vram_transfer(int is_read); static noinline void do_cmd_reset(void) { + int dummy = 0; if (unlikely(gpu.cmd_len > 0)) - do_cmd_buffer(gpu.cmd_buffer, gpu.cmd_len); + do_cmd_buffer(gpu.cmd_buffer, gpu.cmd_len, &dummy, &dummy); gpu.cmd_len = 0; if (unlikely(gpu.dma.h > 0)) @@ -58,6 +65,7 @@ static noinline void do_reset(void) gpu.screen.hres = gpu.screen.w = 256; gpu.screen.vres = gpu.screen.h = 240; gpu.screen.x = gpu.screen.y = 0; + renderer_sync_ecmds(gpu.ex_regs); renderer_notify_res_change(); } @@ -69,7 +77,10 @@ static noinline void update_width(void) int hres = hres_all[(gpu.status >> 16) & 7]; int pal = gpu.status & PSX_GPU_STATUS_PAL; int sw = gpu.screen.x2 - gpu.screen.x1; + int type = gpu.state.screen_centering_type; int x = 0, x_auto; + if (type == C_AUTO) + type = gpu.state.screen_centering_type_default; if (sw <= 0) /* nothing displayed? */; else { @@ -78,10 +89,10 @@ static noinline void update_width(void) x = (x + 1) & ~1; // blitter limitation sw /= hdiv; sw = (sw + 2) & ~3; // according to nocash - switch (gpu.state.screen_centering_type) { - case 1: + switch (type) { + case C_INGAME: break; - case 2: + case C_MANUAL: x = gpu.state.screen_centering_x; break; default: @@ -123,9 +134,12 @@ static noinline void update_height(void) /* nothing displayed? */; else { switch (gpu.state.screen_centering_type) { - case 1: + case C_INGAME: break; - case 2: + case C_BORDERLESS: + y = 0; + break; + case C_MANUAL: y = gpu.state.screen_centering_y; break; default: @@ -161,8 +175,8 @@ static noinline void decide_frameskip(void) gpu.frameskip.active = 0; if (!gpu.frameskip.active && gpu.frameskip.pending_fill[0] != 0) { - int dummy; - do_cmd_list(gpu.frameskip.pending_fill, 3, &dummy); + int dummy = 0; + do_cmd_list(gpu.frameskip.pending_fill, 3, &dummy, &dummy, &dummy); gpu.frameskip.pending_fill[0] = 0; } } @@ -179,8 +193,12 @@ static noinline int decide_frameskip_allow(uint32_t cmd_e3) return gpu.frameskip.allow; } +static void flush_cmd_buffer(void); + static noinline void get_gpu_info(uint32_t data) { + if (unlikely(gpu.cmd_len > 0)) + flush_cmd_buffer(); switch (data & 0x0f) { case 0x02: case 0x03: @@ -254,6 +272,7 @@ long GPUshutdown(void) void GPUwriteStatus(uint32_t data) { uint32_t cmd = data >> 24; + int src_x, src_y; if (cmd < ARRAY_SIZE(gpu.regs)) { if (cmd > 1 && cmd != 5 && gpu.regs[cmd] == data) @@ -283,14 +302,17 @@ void GPUwriteStatus(uint32_t data) gpu.status |= PSX_GPU_STATUS_DMA(data & 3); break; case 0x05: - gpu.screen.src_x = data & 0x3ff; - gpu.screen.src_y = (data >> 10) & 0x1ff; - renderer_notify_scanout_x_change(gpu.screen.src_x, gpu.screen.hres); - if (gpu.frameskip.set) { - decide_frameskip_allow(gpu.ex_regs[3]); - if (gpu.frameskip.last_flip_frame != *gpu.state.frame_count) { - decide_frameskip(); - gpu.frameskip.last_flip_frame = *gpu.state.frame_count; + src_x = data & 0x3ff; src_y = (data >> 10) & 0x1ff; + if (src_x != gpu.screen.src_x || src_y != gpu.screen.src_y) { + gpu.screen.src_x = src_x; + gpu.screen.src_y = src_y; + renderer_notify_scanout_change(src_x, src_y); + if (gpu.frameskip.set) { + decide_frameskip_allow(gpu.ex_regs[3]); + if (gpu.frameskip.last_flip_frame != *gpu.state.frame_count) { + decide_frameskip(); + gpu.frameskip.last_flip_frame = *gpu.state.frame_count; + } } } break; @@ -331,23 +353,33 @@ const unsigned char cmd_lengths[256] = 3, 3, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 1, 1, 0, 0, 0, 0, // 60 1, 1, 1, 1, 2, 2, 2, 2, 1, 1, 1, 1, 2, 2, 2, 2, - 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 80 - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // a0 - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // c0 - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, // 80 + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, // a0 + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, // c0 + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // e0 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; #define VRAM_MEM_XY(x, y) &gpu.vram[(y) * 1024 + (x)] -static inline void do_vram_line(int x, int y, uint16_t *mem, int l, int is_read) +static void cpy_msb(uint16_t *dst, const uint16_t *src, int l, uint16_t msb) +{ + int i; + for (i = 0; i < l; i++) + dst[i] = src[i] | msb; +} + +static inline void do_vram_line(int x, int y, uint16_t *mem, int l, + int is_read, uint16_t msb) { uint16_t *vram = VRAM_MEM_XY(x, y); - if (is_read) + if (unlikely(is_read)) memcpy(mem, vram, l * 2); + else if (unlikely(msb)) + cpy_msb(vram, mem, l, msb); else memcpy(vram, mem, l * 2); } @@ -355,6 +387,7 @@ static inline void do_vram_line(int x, int y, uint16_t *mem, int l, int is_read) static int do_vram_io(uint32_t *data, int count, int is_read) { int count_initial = count; + uint16_t msb = gpu.ex_regs[6] << 15; uint16_t *sdata = (uint16_t *)data; int x = gpu.dma.x, y = gpu.dma.y; int w = gpu.dma.w, h = gpu.dma.h; @@ -367,7 +400,7 @@ static int do_vram_io(uint32_t *data, int count, int is_read) if (count < l) l = count; - do_vram_line(x + o, y, sdata, l, is_read); + do_vram_line(x + o, y, sdata, l, is_read, msb); if (o + l < w) o += l; @@ -382,13 +415,13 @@ static int do_vram_io(uint32_t *data, int count, int is_read) for (; h > 0 && count >= w; sdata += w, count -= w, y++, h--) { y &= 511; - do_vram_line(x, y, sdata, w, is_read); + do_vram_line(x, y, sdata, w, is_read, msb); } if (h > 0) { if (count > 0) { y &= 511; - do_vram_line(x, y, sdata, count, is_read); + do_vram_line(x, y, sdata, count, is_read, msb); o = count; count = 0; } @@ -425,20 +458,72 @@ static void start_vram_transfer(uint32_t pos_word, uint32_t size_word, int is_re log_io("start_vram_transfer %c (%d, %d) %dx%d\n", is_read ? 'r' : 'w', gpu.dma.x, gpu.dma.y, gpu.dma.w, gpu.dma.h); + if (gpu.gpu_state_change) + gpu.gpu_state_change(PGS_VRAM_TRANSFER_START); } static void finish_vram_transfer(int is_read) { if (is_read) gpu.status &= ~PSX_GPU_STATUS_IMG; - else + else { + gpu.state.fb_dirty = 1; renderer_update_caches(gpu.dma_start.x, gpu.dma_start.y, gpu.dma_start.w, gpu.dma_start.h, 0); + } + if (gpu.gpu_state_change) + gpu.gpu_state_change(PGS_VRAM_TRANSFER_END); +} + +static void do_vram_copy(const uint32_t *params, int *cpu_cycles) +{ + const uint32_t sx = LE32TOH(params[0]) & 0x3FF; + const uint32_t sy = (LE32TOH(params[0]) >> 16) & 0x1FF; + const uint32_t dx = LE32TOH(params[1]) & 0x3FF; + const uint32_t dy = (LE32TOH(params[1]) >> 16) & 0x1FF; + uint32_t w = ((LE32TOH(params[2]) - 1) & 0x3FF) + 1; + uint32_t h = (((LE32TOH(params[2]) >> 16) - 1) & 0x1FF) + 1; + uint16_t msb = gpu.ex_regs[6] << 15; + uint16_t lbuf[128]; + uint32_t x, y; + + *cpu_cycles += gput_copy(w, h); + if (sx == dx && sy == dy && msb == 0) + return; + + renderer_flush_queues(); + + if (unlikely((sx < dx && dx < sx + w) || sx + w > 1024 || dx + w > 1024 || msb)) + { + for (y = 0; y < h; y++) + { + const uint16_t *src = VRAM_MEM_XY(0, (sy + y) & 0x1ff); + uint16_t *dst = VRAM_MEM_XY(0, (dy + y) & 0x1ff); + for (x = 0; x < w; x += ARRAY_SIZE(lbuf)) + { + uint32_t x1, w1 = w - x; + if (w1 > ARRAY_SIZE(lbuf)) + w1 = ARRAY_SIZE(lbuf); + for (x1 = 0; x1 < w1; x1++) + lbuf[x1] = src[(sx + x + x1) & 0x3ff]; + for (x1 = 0; x1 < w1; x1++) + dst[(dx + x + x1) & 0x3ff] = lbuf[x1] | msb; + } + } + } + else + { + uint32_t sy1 = sy, dy1 = dy; + for (y = 0; y < h; y++, sy1++, dy1++) + memcpy(VRAM_MEM_XY(dx, dy1 & 0x1ff), VRAM_MEM_XY(sx, sy1 & 0x1ff), w * 2); + } + + renderer_update_caches(dx, dy, w, h, 0); } static noinline int do_cmd_list_skip(uint32_t *data, int count, int *last_cmd) { - int cmd = 0, pos = 0, len, dummy, v; + int cmd = 0, pos = 0, len, dummy = 0, v; int skip = 1; gpu.frameskip.pending_fill[0] = 0; @@ -447,12 +532,16 @@ static noinline int do_cmd_list_skip(uint32_t *data, int count, int *last_cmd) uint32_t *list = data + pos; cmd = LE32TOH(list[0]) >> 24; len = 1 + cmd_lengths[cmd]; + if (pos + len > count) { + cmd = -1; + break; // incomplete cmd + } switch (cmd) { case 0x02: if ((LE32TOH(list[2]) & 0x3ff) > gpu.screen.w || ((LE32TOH(list[2]) >> 16) & 0x1ff) > gpu.screen.h) // clearing something large, don't skip - do_cmd_list(list, 3, &dummy); + do_cmd_list(list, 3, &dummy, &dummy, &dummy); else memcpy(gpu.frameskip.pending_fill, list, 3 * 4); break; @@ -486,12 +575,7 @@ static noinline int do_cmd_list_skip(uint32_t *data, int count, int *last_cmd) gpu.ex_regs[cmd & 7] = LE32TOH(list[0]); break; } - - if (pos + len > count) { - cmd = -1; - break; // incomplete cmd - } - if (0xa0 <= cmd && cmd <= 0xdf) + if (0x80 <= cmd && cmd <= 0xdf) break; // image i/o pos += len; @@ -502,7 +586,8 @@ static noinline int do_cmd_list_skip(uint32_t *data, int count, int *last_cmd) return pos; } -static noinline int do_cmd_buffer(uint32_t *data, int count) +static noinline int do_cmd_buffer(uint32_t *data, int count, + int *cycles_sum, int *cycles_last) { int cmd, pos; uint32_t old_e3 = gpu.ex_regs[3]; @@ -531,12 +616,29 @@ static noinline int do_cmd_buffer(uint32_t *data, int count) pos += 3; continue; } + else if ((cmd & 0xe0) == 0x80) { + if (unlikely((pos+3) >= count)) { + cmd = -1; // incomplete cmd, can't consume yet + break; + } + *cycles_sum += *cycles_last; + *cycles_last = 0; + do_vram_copy(data + pos + 1, cycles_last); + vram_dirty = 1; + pos += 4; + continue; + } + else if (cmd == 0x1f) { + log_anomaly("irq1?\n"); + pos++; + continue; + } // 0xex cmds might affect frameskip.allow, so pass to do_cmd_list_skip if (gpu.frameskip.active && (gpu.frameskip.allow || ((LE32TOH(data[pos]) >> 24) & 0xf0) == 0xe0)) pos += do_cmd_list_skip(data + pos, count - pos, &cmd); else { - pos += do_cmd_list(data + pos, count - pos, &cmd); + pos += do_cmd_list(data + pos, count - pos, cycles_sum, cycles_last, &cmd); vram_dirty = 1; } @@ -557,24 +659,29 @@ static noinline int do_cmd_buffer(uint32_t *data, int count) return count - pos; } -static void flush_cmd_buffer(void) +static noinline void flush_cmd_buffer(void) { - int left = do_cmd_buffer(gpu.cmd_buffer, gpu.cmd_len); + int dummy = 0, left; + left = do_cmd_buffer(gpu.cmd_buffer, gpu.cmd_len, &dummy, &dummy); if (left > 0) memmove(gpu.cmd_buffer, gpu.cmd_buffer + gpu.cmd_len - left, left * 4); - gpu.cmd_len = left; + if (left != gpu.cmd_len) { + if (!gpu.dma.h && gpu.gpu_state_change) + gpu.gpu_state_change(PGS_PRIMITIVE_START); + gpu.cmd_len = left; + } } void GPUwriteDataMem(uint32_t *mem, int count) { - int left; + int dummy = 0, left; log_io("gpu_dma_write %p %d\n", mem, count); if (unlikely(gpu.cmd_len > 0)) flush_cmd_buffer(); - left = do_cmd_buffer(mem, count); + left = do_cmd_buffer(mem, count, &dummy, &dummy); if (left) log_anomaly("GPUwriteDataMem: discarded %d/%d words\n", left, count); } @@ -587,11 +694,13 @@ void GPUwriteData(uint32_t data) flush_cmd_buffer(); } -long GPUdmaChain(uint32_t *rambase, uint32_t start_addr, uint32_t *progress_addr) +long GPUdmaChain(uint32_t *rambase, uint32_t start_addr, + uint32_t *progress_addr, int32_t *cycles_last_cmd) { - uint32_t addr, *list, ld_addr = 0; - int len, left, count; - long cpu_cycles = 0; + uint32_t addr, *list, ld_addr; + int len, left, count, ld_count = 32; + int cpu_cycles_sum = 0; + int cpu_cycles_last = 0; preload(rambase + (start_addr & 0x1fffff) / 4); @@ -599,7 +708,7 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr, uint32_t *progress_addr flush_cmd_buffer(); log_io("gpu_dma_chain\n"); - addr = start_addr & 0xffffff; + addr = ld_addr = start_addr & 0xffffff; for (count = 0; (addr & 0x800000) == 0; count++) { list = rambase + (addr & 0x1fffff) / 4; @@ -607,12 +716,12 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr, uint32_t *progress_addr addr = LE32TOH(list[0]) & 0xffffff; preload(rambase + (addr & 0x1fffff) / 4); - cpu_cycles += 10; + cpu_cycles_sum += 10; if (len > 0) - cpu_cycles += 5 + len; + cpu_cycles_sum += 5 + len; - log_io(".chain %08lx #%d+%d\n", - (long)(list - rambase) * 4, len, gpu.cmd_len); + log_io(".chain %08lx #%d+%d %u+%u\n", + (long)(list - rambase) * 4, len, gpu.cmd_len, cpu_cycles_sum, cpu_cycles_last); if (unlikely(gpu.cmd_len > 0)) { if (gpu.cmd_len + len > ARRAY_SIZE(gpu.cmd_buffer)) { log_anomaly("cmd_buffer overflow, likely garbage commands\n"); @@ -625,7 +734,7 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr, uint32_t *progress_addr } if (len) { - left = do_cmd_buffer(list + 1, len); + left = do_cmd_buffer(list + 1, len, &cpu_cycles_sum, &cpu_cycles_last); if (left) { memcpy(gpu.cmd_buffer, list + 1 + len - left, left * 4); gpu.cmd_len = left; @@ -637,37 +746,24 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr, uint32_t *progress_addr *progress_addr = addr; break; } - #define LD_THRESHOLD (8*1024) - if (count >= LD_THRESHOLD) { - if (count == LD_THRESHOLD) { - ld_addr = addr; - continue; - } - - // loop detection marker - // (bit23 set causes DMA error on real machine, so - // unlikely to be ever set by the game) - list[0] |= HTOLE32(0x800000); + if (addr == ld_addr) { + log_anomaly("GPUdmaChain: loop @ %08x, cnt=%u\n", addr, count); + break; } - } - - if (ld_addr != 0) { - // remove loop detection markers - count -= LD_THRESHOLD + 2; - addr = ld_addr & 0x1fffff; - while (count-- > 0) { - list = rambase + addr / 4; - addr = LE32TOH(list[0]) & 0x1fffff; - list[0] &= HTOLE32(~0x800000); + if (count == ld_count) { + ld_addr = addr; + ld_count *= 2; } } + //printf(" -> %d %d\n", cpu_cycles_sum, cpu_cycles_last); gpu.state.last_list.frame = *gpu.state.frame_count; gpu.state.last_list.hcnt = *gpu.state.hcnt; - gpu.state.last_list.cycles = cpu_cycles; + gpu.state.last_list.cycles = cpu_cycles_sum + cpu_cycles_last; gpu.state.last_list.addr = start_addr; - return cpu_cycles; + *cycles_last_cmd = cpu_cycles_last; + return cpu_cycles_sum; } void GPUreadDataMem(uint32_t *mem, int count) @@ -743,7 +839,7 @@ long GPUfreeze(uint32_t type, struct GPUFreeze *freeze) GPUwriteStatus((i << 24) | (gpu.regs[i] ^ 1)); } renderer_sync_ecmds(gpu.ex_regs); - renderer_update_caches(0, 0, 1024, 512, 1); + renderer_update_caches(0, 0, 1024, 512, 0); break; } @@ -809,7 +905,13 @@ void GPUvBlank(int is_vblank, int lcf) } } -#include "../../frontend/plugin_lib.h" +void GPUgetScreenInfo(int *y, int *base_hres) +{ + *y = gpu.screen.y; + *base_hres = gpu.screen.vres; + if (gpu.status & PSX_GPU_STATUS_DHEIGHT) + *base_hres >>= 1; +} void GPUrearmedCallbacks(const struct rearmed_cbs *cbs) { @@ -821,6 +923,7 @@ void GPUrearmedCallbacks(const struct rearmed_cbs *cbs) gpu.state.frame_count = cbs->gpu_frame_count; gpu.state.allow_interlace = cbs->gpu_neon.allow_interlace; gpu.state.enhancement_enable = cbs->gpu_neon.enhancement_enable; + gpu.state.screen_centering_type_default = cbs->screen_centering_type_default; if (gpu.state.screen_centering_type != cbs->screen_centering_type || gpu.state.screen_centering_x != cbs->screen_centering_x || gpu.state.screen_centering_y != cbs->screen_centering_y) { @@ -833,6 +936,7 @@ void GPUrearmedCallbacks(const struct rearmed_cbs *cbs) gpu.mmap = cbs->mmap; gpu.munmap = cbs->munmap; + gpu.gpu_state_change = cbs->gpu_state_change; // delayed vram mmap if (gpu.vram == NULL)