X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=plugins%2Fgpulib%2Fgpu.h;h=96a81837009b3a6d25d4e953bd8f56cdf5fba45d;hp=5ad2a46163c7e98c8de15724700011a326ddf404;hb=HEAD;hpb=e929dec505f8d3692248fe0d42c84a37c994ad39 diff --git a/plugins/gpulib/gpu.h b/plugins/gpulib/gpu.h index 5ad2a461..96a81837 100644 --- a/plugins/gpulib/gpu.h +++ b/plugins/gpulib/gpu.h @@ -8,46 +8,53 @@ * See the COPYING file in the top-level directory. */ +#ifndef __GPULIB_GPU_H__ +#define __GPULIB_GPU_H__ + #include +//#define RAW_FB_DISPLAY + +#define gpu_log(fmt, ...) \ + printf("%d:%03d: " fmt, *gpu.state.frame_count, *gpu.state.hcnt, ##__VA_ARGS__) + +//#define log_anomaly gpu_log +#define log_anomaly(...) + #ifdef __cplusplus extern "C" { #endif #define CMD_BUFFER_LEN 1024 +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ +#define HTOLE32(x) __builtin_bswap32(x) +#define HTOLE16(x) __builtin_bswap16(x) +#define LE32TOH(x) __builtin_bswap32(x) +#define LE16TOH(x) __builtin_bswap16(x) +#else +#define HTOLE32(x) (x) +#define HTOLE16(x) (x) +#define LE32TOH(x) (x) +#define LE16TOH(x) (x) +#endif + +#define BIT(x) (1 << (x)) + +#define PSX_GPU_STATUS_DHEIGHT BIT(19) +#define PSX_GPU_STATUS_PAL BIT(20) +#define PSX_GPU_STATUS_RGB24 BIT(21) +#define PSX_GPU_STATUS_INTERLACE BIT(22) +#define PSX_GPU_STATUS_BLANKING BIT(23) +#define PSX_GPU_STATUS_IMG BIT(27) +#define PSX_GPU_STATUS_DMA(x) ((x) << 29) +#define PSX_GPU_STATUS_DMA_MASK (BIT(29) | BIT(30)) + struct psx_gpu { - uint16_t vram[1024 * 512]; - uint16_t guard[1024 * 512]; // overdraw guard uint32_t cmd_buffer[CMD_BUFFER_LEN]; uint32_t regs[16]; - union { - uint32_t reg; - struct { - uint32_t tx:4; // 0 texture page - uint32_t ty:1; - uint32_t abr:2; - uint32_t tp:2; // 7 t.p. mode (4,8,15bpp) - uint32_t dtd:1; // 9 dither - uint32_t dfe:1; - uint32_t md:1; // 11 set mask bit when drawing - uint32_t me:1; // 12 no draw on mask - uint32_t unkn:3; - uint32_t width1:1; // 16 - uint32_t width0:2; - uint32_t dheight:1; // 19 double height - uint32_t video:1; // 20 NTSC,PAL - uint32_t rgb24:1; - uint32_t interlace:1; // 22 interlace on - uint32_t blanking:1; // 23 display not enabled - uint32_t unkn2:2; - uint32_t busy:1; // 26 !busy drawing - uint32_t img:1; // 27 ready to DMA image data - uint32_t com:1; // 28 ready for commands - uint32_t dma:2; // 29 off, ?, to vram, from vram - uint32_t lcf:1; // 31 - }; - } status; + uint16_t *vram; + uint32_t status; uint32_t gp0; uint32_t ex_regs[8]; struct { @@ -55,6 +62,7 @@ struct psx_gpu { int x, y, w, h; int x1, x2; int y1, y2; + int src_x, src_y; } screen; struct { int x, y, w, h; @@ -69,6 +77,10 @@ struct psx_gpu { uint32_t blanked:1; uint32_t enhancement_enable:1; uint32_t enhancement_active:1; + uint32_t enhancement_was_active:1; + uint32_t downscale_enable:1; + uint32_t downscale_active:1; + uint32_t dims_changed:1; uint32_t *frame_count; uint32_t *hcnt; /* hsync count */ struct { @@ -78,6 +90,11 @@ struct psx_gpu { uint32_t hcnt; } last_list; uint32_t last_vram_read_frame; + uint32_t w_out_old, h_out_old, status_vo_old; + short screen_centering_type; + short screen_centering_type_default; + int screen_centering_x; + int screen_centering_y; } state; struct { int32_t set:3; /* -1 auto, 0 off, 1-3 fixed */ @@ -89,25 +106,33 @@ struct psx_gpu { uint32_t last_flip_frame; uint32_t pending_fill[3]; } frameskip; - uint16_t *enhancement_bufer; + void *(*get_enhancement_bufer) + (int *x, int *y, int *w, int *h, int *vram_h); + uint16_t *(*get_downscale_buffer) + (int *x, int *y, int *w, int *h, int *vram_h); + void *(*mmap)(unsigned int size); + void (*munmap)(void *ptr, unsigned int size); + void (*gpu_state_change)(int what); // psx_gpu_state }; extern struct psx_gpu gpu; extern const unsigned char cmd_lengths[256]; -int do_cmd_list(uint32_t *list, int count, int *last_cmd); +int do_cmd_list(uint32_t *list, int count, + int *cycles_sum, int *cycles_last, int *last_cmd); struct rearmed_cbs; int renderer_init(void); void renderer_finish(void); void renderer_sync_ecmds(uint32_t * ecmds); -void renderer_update_caches(int x, int y, int w, int h); +void renderer_update_caches(int x, int y, int w, int h, int state_changed); void renderer_flush_queues(void); void renderer_set_interlace(int enable, int is_odd); void renderer_set_config(const struct rearmed_cbs *config); void renderer_notify_res_change(void); +void renderer_notify_scanout_change(int x, int y); int vout_init(void); int vout_finish(void); @@ -121,7 +146,8 @@ struct GPUFreeze; long GPUinit(void); long GPUshutdown(void); void GPUwriteDataMem(uint32_t *mem, int count); -long GPUdmaChain(uint32_t *rambase, uint32_t addr); +long GPUdmaChain(uint32_t *rambase, uint32_t addr, + uint32_t *progress_addr, int32_t *cycles_last_cmd); void GPUwriteData(uint32_t data); void GPUreadDataMem(uint32_t *mem, int count); uint32_t GPUreadData(void); @@ -129,11 +155,14 @@ uint32_t GPUreadStatus(void); void GPUwriteStatus(uint32_t data); long GPUfreeze(uint32_t type, struct GPUFreeze *freeze); void GPUupdateLace(void); -long GPUopen(void **dpy); +long GPUopen(unsigned long *disp, char *cap, char *cfg); long GPUclose(void); void GPUvBlank(int is_vblank, int lcf); +void GPUgetScreenInfo(int *y, int *base_hres); void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_); #ifdef __cplusplus } #endif + +#endif /* __GPULIB_GPU_H__ */