support emulated RAM mapped at offset

Thanks to CatalystG for some initial code and testing.

diff --git a/Makefile b/Makefile
index 5f65f38..f08d9d7 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -11,6 +11,7 @@ ARM926 ?= 0
 ARM_CORTEXA8 ?= 1
 PLATFORM ?= pandora
 USE_OSS ?= 1
+RAM_FIXED ?= 1
 #USE_ALSA = 1
 #DRC_DBG = 1
 #PCNT = 1
@@ -75,6 +76,9 @@ ifdef DRC_DBG
 libpcsxcore/new_dynarec/emu_if.o: CFLAGS += -D_FILE_OFFSET_BITS=64
 CFLAGS += -DDRC_DBG
 endif
+ifeq "$(RAM_FIXED)" "1"
+CFLAGS += -DRAM_FIXED
+endif
 
 # spu
 OBJS += plugins/dfsound/dma.o plugins/dfsound/freeze.o \

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 0b7cee8..a88b396 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -29,7 +29,7 @@
 #include "pcnt.h"
 #endif
 
-#ifndef BASE_ADDR_FIXED
+#if !BASE_ADDR_FIXED
 char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
 #endif
 
@@ -4001,6 +4001,10 @@ static int emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override)
     else
     #endif
       emit_jno(0);
+    if(ram_offset!=0) {
+      emit_addimm(addr,ram_offset,HOST_TEMPREG);
+      addr=*addr_reg_override=HOST_TEMPREG;
+    }
   }
 
   return jaddr;
@@ -4052,6 +4056,10 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
       jaddr=emit_fastpath_cmp_jump(i,temp2,&fastload_reg_override);
     }
     else {
+      if(ram_offset&&memtarget) {
+        emit_addimm(temp2,ram_offset,HOST_TEMPREG);
+        fastload_reg_override=HOST_TEMPREG;
+      }
       if (opcode[i]==0x22||opcode[i]==0x26) {
         emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR
       }else{

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index 7ed8caf..0148a95 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -22,8 +22,12 @@
 //#undef USE_MINI_HT
 #endif
 
+#ifndef BASE_ADDR_FIXED
 #ifndef __ANDROID__
 #define BASE_ADDR_FIXED 1
+#else
+#define BASE_ADDR_FIXED 0
+#endif
 #endif
 
 #ifdef FORCE32
@@ -61,13 +65,10 @@ extern char *invc_ptr;
 #define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
 
 // Code generator target address
-#ifdef BASE_ADDR_FIXED
+#if BASE_ADDR_FIXED
 // "round" address helpful for debug
 #define BASE_ADDR 0x1000000
 #else
 extern char translation_cache[1 << TARGET_SIZE_2];
 #define BASE_ADDR translation_cache
 #endif
-
-// This is defined in linkage_arm.s, but gcc -O3 likes this better
-#define rdram ((unsigned int *)0x80000000)

diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h
index 6b6305c..72f6c27 100644 (file)
--- a/libpcsxcore/new_dynarec/emu_if.h
+++ b/libpcsxcore/new_dynarec/emu_if.h
@@ -97,3 +97,9 @@ void pcsx_mtc0_ds(u32 reg, u32 val);
 
 /* misc */
 extern void (*psxHLEt[])();
+
+#ifdef RAM_FIXED
+#define rdram ((u_int)0x80000000)
+#else
+#define rdram ((u_int)psxM)
+#endif

diff --git a/libpcsxcore/new_dynarec/linkage_arm.s b/libpcsxcore/new_dynarec/linkage_arm.s
index 5c1adc9..bd5a03d 100644 (file)
--- a/libpcsxcore/new_dynarec/linkage_arm.s
+++ b/libpcsxcore/new_dynarec/linkage_arm.s
@@ -21,8 +21,6 @@
 
 /* .equiv HAVE_ARMV7, 1 */
 
-       .global rdram
-rdram = 0x80000000
        .global dynarec_local
        .global reg
        .global hi

diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index cafa4a4..a736d56 100644 (file)
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -141,6 +141,11 @@ struct ll_entry
   int new_dynarec_did_compile;
   int new_dynarec_hacks;
   u_int stop_after_jal;
+#ifndef RAM_FIXED
+  static u_int ram_offset;
+#else
+  static const u_int ram_offset=0;
+#endif
   extern u_char restore_candidate[512];
   extern int cycle_count;
 
@@ -2917,6 +2922,10 @@ void load_assemble(int i,struct regstat *i_regs)
         jaddr=emit_fastpath_cmp_jump(i,addr,&fastload_reg_override);
       }
     }
+    else if(ram_offset&&memtarget) {
+      emit_addimm(addr,ram_offset,HOST_TEMPREG);
+      fastload_reg_override=HOST_TEMPREG;
+    }
   }else{ // using tlb
     int x=0;
     if (opcode[i]==0x20||opcode[i]==0x24) x=3; // LB/LBU
@@ -2982,7 +2991,7 @@ void load_assemble(int i,struct regstat *i_regs)
             gen_tlb_addr_r(a,map);
             emit_movswl_indexed(x,a,tl);
           }else{
-            #ifdef RAM_OFFSET
+            #if 1 //def RAM_OFFSET
             emit_movswl_indexed(x,a,tl);
             #else
             emit_movswl_indexed((int)rdram-0x80000000+x,a,tl);
@@ -3069,7 +3078,7 @@ void load_assemble(int i,struct regstat *i_regs)
             gen_tlb_addr_r(a,map);
             emit_movzwl_indexed(x,a,tl);
           }else{
-            #ifdef RAM_OFFSET
+            #if 1 //def RAM_OFFSET
             emit_movzwl_indexed(x,a,tl);
             #else
             emit_movzwl_indexed((int)rdram-0x80000000+x,a,tl);
@@ -3226,6 +3235,10 @@ void store_assemble(int i,struct regstat *i_regs)
         jaddr=emit_fastpath_cmp_jump(i,addr,&faststore_reg_override);
       #endif
     }
+    else if(ram_offset&&memtarget) {
+      emit_addimm(addr,ram_offset,HOST_TEMPREG);
+      faststore_reg_override=HOST_TEMPREG;
+    }
   }else{ // using tlb
     int x=0;
     if (opcode[i]==0x28) x=3; // SB
@@ -3270,7 +3283,8 @@ void store_assemble(int i,struct regstat *i_regs)
         gen_tlb_addr_w(a,map);
         emit_writehword_indexed(tl,x,a);
       }else
-        emit_writehword_indexed(tl,(int)rdram-0x80000000+x,a);
+        //emit_writehword_indexed(tl,(int)rdram-0x80000000+x,a);
+        emit_writehword_indexed(tl,x,a);
     }
     type=STOREH_STUB;
   }
@@ -3874,6 +3888,10 @@ void c2ls_assemble(int i,struct regstat *i_regs)
     if(!c) {
       jaddr2=emit_fastpath_cmp_jump(i,ar,&fastio_reg_override);
     }
+    else if(ram_offset&&memtarget) {
+      emit_addimm(ar,ram_offset,HOST_TEMPREG);
+      fastio_reg_override=HOST_TEMPREG;
+    }
     if (opcode[i]==0x32) { // LWC2
       #ifdef HOST_IMM_ADDR32
       if(c) emit_readword_tlb(constmap[i][s]+offset,-1,tl);
@@ -7993,7 +8011,7 @@ void new_dynarec_init()
 {
   printf("Init new dynarec\n");
   out=(u_char *)BASE_ADDR;
-#ifdef BASE_ADDR_FIXED
+#if BASE_ADDR_FIXED
   if (mmap (out, 1<<TARGET_SIZE_2,
             PROT_READ | PROT_WRITE | PROT_EXEC,
             MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS,
@@ -8056,12 +8074,15 @@ void new_dynarec_init()
 #endif
   tlb_hacks();
   arch_init();
+#ifndef RAM_FIXED
+  ram_offset=(u_int)rdram-0x80000000;
+#endif
 }
 
 void new_dynarec_cleanup()
 {
   int n;
-  #ifdef BASE_ADDR_FIXED
+  #if BASE_ADDR_FIXED
   if (munmap ((void *)BASE_ADDR, 1<<TARGET_SIZE_2) < 0) {printf("munmap() failed\n");}
   #endif
   for(n=0;n<4096;n++) ll_clear(jump_in+n);

diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
index 498246c..1cabd53 100644 (file)
--- a/libpcsxcore/psxmem.c
+++ b/libpcsxcore/psxmem.c
@@ -70,6 +70,15 @@ int psxMemInit() {
 
        psxM = mmap((void *)0x80000000, 0x00210000,
                PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0);
+#ifndef RAM_FIXED
+       if (psxM == MAP_FAILED)
+               psxM = mmap((void *)0x70000000, 0x00210000,
+                       PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0);
+#endif
+       if (psxM == MAP_FAILED) {
+               SysMessage(_("mapping main RAM failed"));
+               return -1;
+       }
 
        psxP = &psxM[0x200000];
        psxH = mmap((void *)0x1f800000, 0x00010000,
@@ -79,7 +88,7 @@ int psxMemInit() {
                PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
 
        if (psxMemRLUT == NULL || psxMemWLUT == NULL || 
-               psxM != (void *)0x80000000 || psxR == MAP_FAILED ||
+               psxR == MAP_FAILED ||
                psxP == NULL || psxH != (void *)0x1f800000) {
                SysMessage(_("Error allocating memory!"));
                return -1;