drc: adjust bogus looking check
authornotaz <notasas@gmail.com>
Wed, 10 Nov 2021 21:44:25 +0000 (23:44 +0200)
committernotaz <notasas@gmail.com>
Sun, 14 Nov 2021 00:05:06 +0000 (02:05 +0200)
not really sure what's going on, but at the start of
"Pass 3 - Register allocation" zero reg allocations are removed,
so "regmap_pre[i+1][hr] != regs[i].regmap[hr]" assert will not hold.

libpcsxcore/new_dynarec/new_dynarec.c

index 0815329..f2dbb86 100644 (file)
@@ -166,7 +166,7 @@ struct link_entry
   static char ooo[MAXBLOCK];
   static uint64_t unneeded_reg[MAXBLOCK];
   static uint64_t branch_unneeded_reg[MAXBLOCK];
   static char ooo[MAXBLOCK];
   static uint64_t unneeded_reg[MAXBLOCK];
   static uint64_t branch_unneeded_reg[MAXBLOCK];
-  static signed char regmap_pre[MAXBLOCK][HOST_REGS];
+  static signed char regmap_pre[MAXBLOCK][HOST_REGS]; // pre-instruction i?
   static uint64_t current_constmap[HOST_REGS];
   static uint64_t constmap[MAXBLOCK][HOST_REGS];
   static struct regstat regs[MAXBLOCK];
   static uint64_t current_constmap[HOST_REGS];
   static uint64_t constmap[MAXBLOCK][HOST_REGS];
   static struct regstat regs[MAXBLOCK];
@@ -7891,7 +7891,7 @@ int new_recompile_block(int addr)
             {
               if(i<slen-1&&!is_ds[i]) {
                 assert(regs[i].regmap[hr]<64);
             {
               if(i<slen-1&&!is_ds[i]) {
                 assert(regs[i].regmap[hr]<64);
-                if(regmap_pre[i+1][hr]!=-1 || regs[i].regmap[hr]!=-1)
+                if(regmap_pre[i+1][hr]!=-1 || regs[i].regmap[hr]>0)
                 if(regmap_pre[i+1][hr]!=regs[i].regmap[hr])
                 {
                   SysPrintf("fail: %x (%d %d!=%d)\n",start+i*4,hr,regmap_pre[i+1][hr],regs[i].regmap[hr]);
                 if(regmap_pre[i+1][hr]!=regs[i].regmap[hr])
                 {
                   SysPrintf("fail: %x (%d %d!=%d)\n",start+i*4,hr,regmap_pre[i+1][hr],regs[i].regmap[hr]);