gte_neon: access scratch_buf through drc context

diff --git a/libpcsxcore/gte_neon.S b/libpcsxcore/gte_neon.S
index 3c71f55..fe153e2 100644 (file)
--- a/libpcsxcore/gte_neon.S
+++ b/libpcsxcore/gte_neon.S
@@ -6,29 +6,12 @@
  */
 
 #include "arm_features.h"
  */
 
 #include "arm_features.h"

+#include "new_dynarec/linkage_offsets.h"

 
 .syntax unified
 
 .syntax unified

-
-.bss
-.align 6 @ cacheline
-
-scratch:
-.rept 8*8*2/4
-    .word 0
-.endr
-

 .text
 .align 2
 
 .text
 .align 2
 

-.macro ldr_scratch rd
-#ifndef __PIC__
-    movw        \rd, #:lower16:scratch
-    movt        \rd, #:upper16:scratch
-#else
-    ldr         \rd, =scratch
-#endif
-.endm
-

 @ XXX: gteMAC calc shouldn't be saturating, but it is here
 
 @ approximate gteMAC|123 flags
 @ XXX: gteMAC calc shouldn't be saturating, but it is here
 
 @ approximate gteMAC|123 flags


@@ -150,7 +133,7 @@ FUNCTION(gteRTPS_neon): @ r0=CP2 (d,c),
     push        {r4-r6,lr}
 
 @    fmrx        r4, fpscr      @ vmrs? at least 40 cycle hit
     push        {r4-r6,lr}
 
 @    fmrx        r4, fpscr      @ vmrs? at least 40 cycle hit

-    ldr_scratch r1
+    ldr                r1, [r0, #LO_cop2_to_scratch_buf]

     mov         r12, #0
 
     vldmia      r0, {d8}       @ VXYZ(0)
     mov         r12, #0
 
     vldmia      r0, {d8}       @ VXYZ(0)


@@ -302,7 +285,7 @@ FUNCTION(gteRTPS_neon): @ r0=CP2 (d,c),
 FUNCTION(gteRTPT_neon): @ r0=CP2 (d,c),
     push        {r4-r11,lr}
 
 FUNCTION(gteRTPT_neon): @ r0=CP2 (d,c),
     push        {r4-r11,lr}
 

-    ldr_scratch r1
+    ldr                r1, [r0, #LO_cop2_to_scratch_buf]

     mov         r12, #0
 
     rtpx_preload
     mov         r12, #0
 
     rtpx_preload

diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
index 02e108f..324071d 100644 (file)
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
@@ -25,6 +25,7 @@
 #define evprintf(...)
 
 char invalid_code[0x100000];
 #define evprintf(...)
 
 char invalid_code[0x100000];

+static u32 scratch_buf[8*8*2] __attribute__((aligned(64)));

 u32 event_cycles[PSXINT_COUNT];
 
 static void schedule_timeslice(void)
 u32 event_cycles[PSXINT_COUNT];
 
 static void schedule_timeslice(void)


@@ -286,6 +287,7 @@ static int ari64_init()
 #endif
        psxH_ptr = psxH;
        zeromem_ptr = zero_mem;
 #endif
        psxH_ptr = psxH;
        zeromem_ptr = zero_mem;

+       scratch_buf_ptr = scratch_buf;

 
        return 0;
 }
 
        return 0;
 }


@@ -386,6 +388,7 @@ int new_dynarec_hacks;
 void *psxH_ptr;
 void *zeromem_ptr;
 u8 zero_mem[0x1000];
 void *psxH_ptr;
 void *zeromem_ptr;
 u8 zero_mem[0x1000];

+void *scratch_buf_ptr;

 void new_dynarec_init() { (void)ari64_execute; }
 void new_dyna_start() {}
 void new_dynarec_cleanup() {}
 void new_dynarec_init() { (void)ari64_execute; }
 void new_dyna_start() {}
 void new_dynarec_cleanup() {}

diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h
index 72f6c27..94ff8de 100644 (file)
--- a/libpcsxcore/new_dynarec/emu_if.h
+++ b/libpcsxcore/new_dynarec/emu_if.h
@@ -83,6 +83,7 @@ void rcnt2_read_count_m1(u32 addr, u32, u32 cycles);
 extern unsigned int address;
 extern void *psxH_ptr;
 extern void *zeromem_ptr;
 extern unsigned int address;
 extern void *psxH_ptr;
 extern void *zeromem_ptr;

+extern void *scratch_buf_ptr;

 
 // same as invalid_code, just a region for ram write checks (inclusive)
 extern u32 inv_code_start, inv_code_end;
 
 // same as invalid_code, just a region for ram write checks (inclusive)
 extern u32 inv_code_start, inv_code_end;

diff --git a/libpcsxcore/new_dynarec/linkage_arm.S b/libpcsxcore/new_dynarec/linkage_arm.S
index e31b9b4..b48ec30 100644 (file)
--- a/libpcsxcore/new_dynarec/linkage_arm.S
+++ b/libpcsxcore/new_dynarec/linkage_arm.S
@@ -83,7 +83,8 @@ DRC_VAR(zeromem_ptr, 4)
 DRC_VAR(inv_code_start, 4)
 DRC_VAR(inv_code_end, 4)
 DRC_VAR(branch_target, 4)
 DRC_VAR(inv_code_start, 4)
 DRC_VAR(inv_code_end, 4)
 DRC_VAR(branch_target, 4)

-@DRC_VAR(align0, 16) /* unused/alignment */
+DRC_VAR(scratch_buf_ptr, 4)
+@DRC_VAR(align0, 12) /* unused/alignment */

 DRC_VAR(mini_ht, 256)
 DRC_VAR(restore_candidate, 512)
 
 DRC_VAR(mini_ht, 256)
 DRC_VAR(restore_candidate, 512)
 

diff --git a/libpcsxcore/new_dynarec/linkage_offsets.h b/libpcsxcore/new_dynarec/linkage_offsets.h
index 55ceb42..f7e1911 100644 (file)
--- a/libpcsxcore/new_dynarec/linkage_offsets.h
+++ b/libpcsxcore/new_dynarec/linkage_offsets.h
@@ -29,10 +29,13 @@
 #define LO_inv_code_start      (LO_zeromem_ptr + 4)
 #define LO_inv_code_end                (LO_inv_code_start + 4)
 #define LO_branch_target       (LO_inv_code_end + 4)
 #define LO_inv_code_start      (LO_zeromem_ptr + 4)
 #define LO_inv_code_end                (LO_inv_code_start + 4)
 #define LO_branch_target       (LO_inv_code_end + 4)

-#define LO_align0              (LO_branch_target + 4)
-#define LO_mini_ht             (LO_align0 + 16)
+#define LO_scratch_buf_ptr     (LO_branch_target + 4)
+#define LO_align0              (LO_scratch_buf_ptr + 4)
+#define LO_mini_ht             (LO_align0 + 12)

 #define LO_restore_candidate   (LO_mini_ht + 256)
 #define LO_dynarec_local_size  (LO_restore_candidate + 512)
 
 #define LO_FCR0                        (LO_align0)
 #define LO_FCR31               (LO_align0)
 #define LO_restore_candidate   (LO_mini_ht + 256)
 #define LO_dynarec_local_size  (LO_restore_candidate + 512)
 
 #define LO_FCR0                        (LO_align0)
 #define LO_FCR31               (LO_align0)

+
+#define LO_cop2_to_scratch_buf (LO_scratch_buf_ptr - LO_reg_cop2d)