From: notaz <notasas@gmail.com>
Date: Sun, 18 Sep 2016 20:43:04 +0000 (+0300)
Subject: drc: mark things static
X-Git-Tag: r23~170
X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=commitdiff_plain;h=e2b5e7aa45f75cd13ef238fa4ff9516891dabef5

drc: mark things static
---

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 592cc88f..6bd9e498 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -38,6 +38,8 @@ char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
 #define CALLER_SAVE_REGS 0x120f
 #endif
 
+#define unused __attribute__((unused))
+
 extern int cycle_count;
 extern int last_count;
 extern int pcaddr;
@@ -112,11 +114,11 @@ const u_int invalidate_addr_reg[16] = {
   0,
   0};
 
-unsigned int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
+static unsigned int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
 
 /* Linker */
 
-void set_jump_target(int addr,u_int target)
+static void set_jump_target(int addr,u_int target)
 {
   u_char *ptr=(u_char *)addr;
   u_int *ptr2=(u_int *)ptr;
@@ -150,7 +152,8 @@ void set_jump_target(int addr,u_int target)
 // This optionally copies the instruction from the target of the branch into
 // the space before the branch.  Works, but the difference in speed is
 // usually insignificant.
-void set_jump_target_fillslot(int addr,u_int target,int copy)
+#if 0
+static void set_jump_target_fillslot(int addr,u_int target,int copy)
 {
   u_char *ptr=(u_char *)addr;
   u_int *ptr2=(u_int *)ptr;
@@ -179,9 +182,10 @@ void set_jump_target_fillslot(int addr,u_int target,int copy)
     *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
   }
 }
+#endif
 
 /* Literal pool */
-add_literal(int addr,int val)
+static void add_literal(int addr,int val)
 {
   assert(literalcount<sizeof(literals)/sizeof(literals[0]));
   literals[literalcount][0]=addr;
@@ -189,7 +193,7 @@ add_literal(int addr,int val)
   literalcount++;
 }
 
-void *kill_pointer(void *stub)
+static void *kill_pointer(void *stub)
 {
   int *ptr=(int *)(stub+4);
   assert((*ptr&0x0ff00000)==0x05900000);
@@ -204,7 +208,7 @@ void *kill_pointer(void *stub)
 // get address that insn one after stub loads (dyna_linker arg1),
 // treat it as a pointer to branch insn,
 // return addr where that branch jumps to
-int get_pointer(void *stub)
+static int get_pointer(void *stub)
 {
   //printf("get_pointer(%x)\n",(int)stub);
   int *ptr=(int *)(stub+4);
@@ -218,7 +222,7 @@ int get_pointer(void *stub)
 
 // Find the "clean" entry point from a "dirty" entry point
 // by skipping past the call to verify_code
-u_int get_clean_addr(int addr)
+static u_int get_clean_addr(int addr)
 {
   int *ptr=(int *)addr;
   #ifndef HAVE_ARMV7
@@ -235,7 +239,7 @@ u_int get_clean_addr(int addr)
   return (u_int)ptr;
 }
 
-int verify_dirty(int addr)
+static int verify_dirty(u_int *ptr)
 {
   u_int *ptr=(u_int *)addr;
   #ifndef HAVE_ARMV7
@@ -263,7 +267,7 @@ int verify_dirty(int addr)
 
 // This doesn't necessarily find all clean entry points, just
 // guarantees that it's not dirty
-int isclean(int addr)
+static int isclean(int addr)
 {
   #ifndef HAVE_ARMV7
   int *ptr=((u_int *)addr)+4;
@@ -279,7 +283,7 @@ int isclean(int addr)
 }
 
 // get source that block at addr was compiled from (host pointers)
-void get_bounds(int addr,u_int *start,u_int *end)
+static void get_bounds(int addr,u_int *start,u_int *end)
 {
   u_int *ptr=(u_int *)addr;
   #ifndef HAVE_ARMV7
@@ -309,7 +313,7 @@ void get_bounds(int addr,u_int *start,u_int *end)
 
 // Note: registers are allocated clean (unmodified state)
 // if you intend to modify the register, you must call dirty_reg().
-void alloc_reg(struct regstat *cur,int i,signed char reg)
+static void alloc_reg(struct regstat *cur,int i,signed char reg)
 {
   int r,hr;
   int preferred_reg = (reg&7);
@@ -474,7 +478,7 @@ void alloc_reg(struct regstat *cur,int i,signed char reg)
   SysPrintf("This shouldn't happen (alloc_reg)");exit(1);
 }
 
-void alloc_reg64(struct regstat *cur,int i,signed char reg)
+static void alloc_reg64(struct regstat *cur,int i,signed char reg)
 {
   int preferred_reg = 8+(reg&1);
   int r,hr;
@@ -643,7 +647,7 @@ void alloc_reg64(struct regstat *cur,int i,signed char reg)
 // Allocate a temporary register.  This is done without regard to
 // dirty status or whether the register we request is on the unneeded list
 // Note: This will only allocate one register, even if called multiple times
-void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
+static void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
 {
   int r,hr;
   int preferred_reg = -1;
@@ -762,8 +766,9 @@ void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
   }
   SysPrintf("This shouldn't happen");exit(1);
 }
+
 // Allocate a specific ARM register.
-void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr)
+static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
 {
   int n;
   int dirty=0;
@@ -784,7 +789,7 @@ void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr)
 }
 
 // Alloc cycle count into dedicated register
-alloc_cc(struct regstat *cur,int i)
+static void alloc_cc(struct regstat *cur,int i)
 {
   alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
 }
@@ -794,7 +799,7 @@ alloc_cc(struct regstat *cur,int i)
 
 /* Assembler */
 
-char regname[16][4] = {
+static unused char regname[16][4] = {
  "r0",
  "r1",
  "r2",
@@ -812,19 +817,21 @@ char regname[16][4] = {
  "lr",
  "pc"};
 
-void output_w32(u_int word)
+static void output_w32(u_int word)
 {
   *((u_int *)out)=word;
   out+=4;
 }
-u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
+
+static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
 {
   assert(rd<16);
   assert(rn<16);
   assert(rm<16);
   return((rn<<16)|(rd<<12)|rm);
 }
-u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
+
+static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
 {
   assert(rd<16);
   assert(rn<16);
@@ -832,7 +839,8 @@ u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
   assert((shift&1)==0);
   return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
 }
-u_int genimm(u_int imm,u_int *encoded)
+
+static u_int genimm(u_int imm,u_int *encoded)
 {
   *encoded=0;
   if(imm==0) return 1;
@@ -847,12 +855,14 @@ u_int genimm(u_int imm,u_int *encoded)
   }
   return 0;
 }
-void genimm_checked(u_int imm,u_int *encoded)
+
+static void genimm_checked(u_int imm,u_int *encoded)
 {
   u_int ret=genimm(imm,encoded);
   assert(ret);
 }
-u_int genjmp(u_int addr)
+
+static u_int genjmp(u_int addr)
 {
   int offset=addr-(int)out-8;
   if(offset<-33554432||offset>=33554432) {
@@ -865,96 +875,99 @@ u_int genjmp(u_int addr)
   return ((u_int)offset>>2)&0xffffff;
 }
 
-void emit_mov(int rs,int rt)
+static void emit_mov(int rs,int rt)
 {
   assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
 }
 
-void emit_movs(int rs,int rt)
+static void emit_movs(int rs,int rt)
 {
   assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
 }
 
-void emit_add(int rs1,int rs2,int rt)
+static void emit_add(int rs1,int rs2,int rt)
 {
   assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_adds(int rs1,int rs2,int rt)
+static void emit_adds(int rs1,int rs2,int rt)
 {
   assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_adcs(int rs1,int rs2,int rt)
+static void emit_adcs(int rs1,int rs2,int rt)
 {
   assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_sbc(int rs1,int rs2,int rt)
+static void emit_sbc(int rs1,int rs2,int rt)
 {
   assem_debug("sbc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0c00000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_sbcs(int rs1,int rs2,int rt)
+static void emit_sbcs(int rs1,int rs2,int rt)
 {
   assem_debug("sbcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0d00000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_neg(int rs, int rt)
+static void emit_neg(int rs, int rt)
 {
   assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
 }
 
-void emit_negs(int rs, int rt)
+static void emit_negs(int rs, int rt)
 {
   assem_debug("rsbs %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0xe2700000|rd_rn_rm(rt,rs,0));
 }
 
-void emit_sub(int rs1,int rs2,int rt)
+static void emit_sub(int rs1,int rs2,int rt)
 {
   assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_subs(int rs1,int rs2,int rt)
+static void emit_subs(int rs1,int rs2,int rt)
 {
   assem_debug("subs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0500000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_zeroreg(int rt)
+static void emit_zeroreg(int rt)
 {
   assem_debug("mov %s,#0\n",regname[rt]);
   output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
 }
 
-void emit_loadlp(u_int imm,u_int rt)
+static void emit_loadlp(u_int imm,u_int rt)
 {
   add_literal((int)out,imm);
   assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
   output_w32(0xe5900000|rd_rn_rm(rt,15,0));
 }
-void emit_movw(u_int imm,u_int rt)
+
+static void emit_movw(u_int imm,u_int rt)
 {
   assert(imm<65536);
   assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
   output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
 }
-void emit_movt(u_int imm,u_int rt)
+
+static void emit_movt(u_int imm,u_int rt)
 {
   assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
   output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
 }
-void emit_movimm(u_int imm,u_int rt)
+
+static void emit_movimm(u_int imm,u_int rt)
 {
   u_int armval;
   if(genimm(imm,&armval)) {
@@ -981,13 +994,14 @@ void emit_movimm(u_int imm,u_int rt)
     #endif
   }
 }
-void emit_pcreladdr(u_int rt)
+
+static void emit_pcreladdr(u_int rt)
 {
   assem_debug("add %s,pc,#?\n",regname[rt]);
   output_w32(0xe2800000|rd_rn_rm(rt,15,0));
 }
 
-void emit_loadreg(int r, int hr)
+static void emit_loadreg(int r, int hr)
 {
   if(r&64) {
     SysPrintf("64bit load in 32bit mode!\n");
@@ -1010,7 +1024,8 @@ void emit_loadreg(int r, int hr)
     output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
   }
 }
-void emit_storereg(int r, int hr)
+
+static void emit_storereg(int r, int hr)
 {
   if(r&64) {
     SysPrintf("64bit store in 32bit mode!\n");
@@ -1028,13 +1043,13 @@ void emit_storereg(int r, int hr)
   output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
 }
 
-void emit_test(int rs, int rt)
+static void emit_test(int rs, int rt)
 {
   assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
 }
 
-void emit_testimm(int rs,int imm)
+static void emit_testimm(int rs,int imm)
 {
   u_int armval;
   assem_debug("tst %s,#%d\n",regname[rs],imm);
@@ -1042,7 +1057,7 @@ void emit_testimm(int rs,int imm)
   output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
 }
 
-void emit_testeqimm(int rs,int imm)
+static void emit_testeqimm(int rs,int imm)
 {
   u_int armval;
   assem_debug("tsteq %s,$%d\n",regname[rs],imm);
@@ -1050,36 +1065,37 @@ void emit_testeqimm(int rs,int imm)
   output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
 }
 
-void emit_not(int rs,int rt)
+static void emit_not(int rs,int rt)
 {
   assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
 }
 
-void emit_mvnmi(int rs,int rt)
+static void emit_mvnmi(int rs,int rt)
 {
   assem_debug("mvnmi %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x41e00000|rd_rn_rm(rt,0,rs));
 }
 
-void emit_and(u_int rs1,u_int rs2,u_int rt)
+static void emit_and(u_int rs1,u_int rs2,u_int rt)
 {
   assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_or(u_int rs1,u_int rs2,u_int rt)
+static void emit_or(u_int rs1,u_int rs2,u_int rt)
 {
   assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_or_and_set_flags(int rs1,int rs2,int rt)
+
+static void emit_or_and_set_flags(int rs1,int rs2,int rt)
 {
   assem_debug("orrs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe1900000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
+static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1088,7 +1104,7 @@ void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
 }
 
-void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
+static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1097,13 +1113,13 @@ void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
   output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
 }
 
-void emit_xor(u_int rs1,u_int rs2,u_int rt)
+static void emit_xor(u_int rs1,u_int rs2,u_int rt)
 {
   assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_addimm(u_int rs,int imm,u_int rt)
+static void emit_addimm(u_int rs,int imm,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1144,7 +1160,7 @@ void emit_addimm(u_int rs,int imm,u_int rt)
   else if(rs!=rt) emit_mov(rs,rt);
 }
 
-void emit_addimm_and_set_flags(int imm,int rt)
+static void emit_addimm_and_set_flags(int imm,int rt)
 {
   assert(imm>-65536&&imm<65536);
   u_int armval;
@@ -1166,19 +1182,20 @@ void emit_addimm_and_set_flags(int imm,int rt)
     output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
   }
 }
-void emit_addimm_no_flags(u_int imm,u_int rt)
+
+static void emit_addimm_no_flags(u_int imm,u_int rt)
 {
   emit_addimm(rt,imm,rt);
 }
 
-void emit_addnop(u_int r)
+static void emit_addnop(u_int r)
 {
   assert(r<16);
   assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
   output_w32(0xe2800000|rd_rn_rm(r,r,0));
 }
 
-void emit_adcimm(u_int rs,int imm,u_int rt)
+static void emit_adcimm(u_int rs,int imm,u_int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -1186,7 +1203,7 @@ void emit_adcimm(u_int rs,int imm,u_int rt)
   output_w32(0xe2a00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_rscimm(int rs,int imm,u_int rt)
+static void emit_rscimm(int rs,int imm,u_int rt)
 {
   assert(0);
   u_int armval;
@@ -1195,7 +1212,7 @@ void emit_rscimm(int rs,int imm,u_int rt)
   output_w32(0xe2e00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
+static void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
 {
   // TODO: if(genimm(imm,&armval)) ...
   // else
@@ -1204,7 +1221,7 @@ void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
   emit_adcimm(rsh,0,rth);
 }
 
-void emit_andimm(int rs,int imm,int rt)
+static void emit_andimm(int rs,int imm,int rt)
 {
   u_int armval;
   if(imm==0) {
@@ -1240,7 +1257,7 @@ void emit_andimm(int rs,int imm,int rt)
   }
 }
 
-void emit_orimm(int rs,int imm,int rt)
+static void emit_orimm(int rs,int imm,int rt)
 {
   u_int armval;
   if(imm==0) {
@@ -1257,7 +1274,7 @@ void emit_orimm(int rs,int imm,int rt)
   }
 }
 
-void emit_xorimm(int rs,int imm,int rt)
+static void emit_xorimm(int rs,int imm,int rt)
 {
   u_int armval;
   if(imm==0) {
@@ -1274,7 +1291,7 @@ void emit_xorimm(int rs,int imm,int rt)
   }
 }
 
-void emit_shlimm(int rs,u_int imm,int rt)
+static void emit_shlimm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1283,7 +1300,7 @@ void emit_shlimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 
-void emit_lsls_imm(int rs,int imm,int rt)
+static void emit_lsls_imm(int rs,int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1291,7 +1308,7 @@ void emit_lsls_imm(int rs,int imm,int rt)
   output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 
-void emit_lslpls_imm(int rs,int imm,int rt)
+static unused void emit_lslpls_imm(int rs,int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1299,7 +1316,7 @@ void emit_lslpls_imm(int rs,int imm,int rt)
   output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 
-void emit_shrimm(int rs,u_int imm,int rt)
+static void emit_shrimm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1307,7 +1324,7 @@ void emit_shrimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 
-void emit_sarimm(int rs,u_int imm,int rt)
+static void emit_sarimm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1315,7 +1332,7 @@ void emit_sarimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
 }
 
-void emit_rorimm(int rs,u_int imm,int rt)
+static void emit_rorimm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1323,7 +1340,7 @@ void emit_rorimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
 }
 
-void emit_shldimm(int rs,int rs2,u_int imm,int rt)
+static void emit_shldimm(int rs,int rs2,u_int imm,int rt)
 {
   assem_debug("shld %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
   assert(imm>0);
@@ -1335,7 +1352,7 @@ void emit_shldimm(int rs,int rs2,u_int imm,int rt)
   output_w32(0xe1800020|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
 }
 
-void emit_shrdimm(int rs,int rs2,u_int imm,int rt)
+static void emit_shrdimm(int rs,int rs2,u_int imm,int rt)
 {
   assem_debug("shrd %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
   assert(imm>0);
@@ -1347,7 +1364,7 @@ void emit_shrdimm(int rs,int rs2,u_int imm,int rt)
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
 }
 
-void emit_signextend16(int rs,int rt)
+static void emit_signextend16(int rs,int rt)
 {
   #ifndef HAVE_ARMV6
   emit_shlimm(rs,16,rt);
@@ -1358,7 +1375,7 @@ void emit_signextend16(int rs,int rt)
   #endif
 }
 
-void emit_signextend8(int rs,int rt)
+static void emit_signextend8(int rs,int rt)
 {
   #ifndef HAVE_ARMV6
   emit_shlimm(rs,24,rt);
@@ -1369,7 +1386,7 @@ void emit_signextend8(int rs,int rt)
   #endif
 }
 
-void emit_shl(u_int rs,u_int shift,u_int rt)
+static void emit_shl(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1378,7 +1395,8 @@ void emit_shl(u_int rs,u_int shift,u_int rt)
   assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
 }
-void emit_shr(u_int rs,u_int shift,u_int rt)
+
+static void emit_shr(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1386,7 +1404,8 @@ void emit_shr(u_int rs,u_int shift,u_int rt)
   assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
 }
-void emit_sar(u_int rs,u_int shift,u_int rt)
+
+static void emit_sar(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1395,7 +1414,7 @@ void emit_sar(u_int rs,u_int shift,u_int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
 }
 
-void emit_orrshl(u_int rs,u_int shift,u_int rt)
+static void emit_orrshl(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1403,7 +1422,8 @@ void emit_orrshl(u_int rs,u_int shift,u_int rt)
   assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
 }
-void emit_orrshr(u_int rs,u_int shift,u_int rt)
+
+static void emit_orrshr(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1412,7 +1432,7 @@ void emit_orrshr(u_int rs,u_int shift,u_int rt)
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
 }
 
-void emit_cmpimm(int rs,int imm)
+static void emit_cmpimm(int rs,int imm)
 {
   u_int armval;
   if(genimm(imm,&armval)) {
@@ -1434,70 +1454,79 @@ void emit_cmpimm(int rs,int imm)
   }
 }
 
-void emit_cmovne_imm(int imm,int rt)
+static void emit_cmovne_imm(int imm,int rt)
 {
   assem_debug("movne %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
 }
-void emit_cmovl_imm(int imm,int rt)
+
+static void emit_cmovl_imm(int imm,int rt)
 {
   assem_debug("movlt %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
 }
-void emit_cmovb_imm(int imm,int rt)
+
+static void emit_cmovb_imm(int imm,int rt)
 {
   assem_debug("movcc %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
 }
-void emit_cmovs_imm(int imm,int rt)
+
+static void emit_cmovs_imm(int imm,int rt)
 {
   assem_debug("movmi %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
 }
-void emit_cmove_reg(int rs,int rt)
+
+static void emit_cmove_reg(int rs,int rt)
 {
   assem_debug("moveq %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x01a00000|rd_rn_rm(rt,0,rs));
 }
-void emit_cmovne_reg(int rs,int rt)
+
+static void emit_cmovne_reg(int rs,int rt)
 {
   assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
 }
-void emit_cmovl_reg(int rs,int rt)
+
+static void emit_cmovl_reg(int rs,int rt)
 {
   assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
 }
-void emit_cmovs_reg(int rs,int rt)
+
+static void emit_cmovs_reg(int rs,int rt)
 {
   assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
 }
 
-void emit_slti32(int rs,int imm,int rt)
+static void emit_slti32(int rs,int imm,int rt)
 {
   if(rs!=rt) emit_zeroreg(rt);
   emit_cmpimm(rs,imm);
   if(rs==rt) emit_movimm(0,rt);
   emit_cmovl_imm(1,rt);
 }
-void emit_sltiu32(int rs,int imm,int rt)
+
+static void emit_sltiu32(int rs,int imm,int rt)
 {
   if(rs!=rt) emit_zeroreg(rt);
   emit_cmpimm(rs,imm);
   if(rs==rt) emit_movimm(0,rt);
   emit_cmovb_imm(1,rt);
 }
-void emit_slti64_32(int rsh,int rsl,int imm,int rt)
+
+static void emit_slti64_32(int rsh,int rsl,int imm,int rt)
 {
   assert(rsh!=rt);
   emit_slti32(rsl,imm,rt);
@@ -1514,7 +1543,8 @@ void emit_slti64_32(int rsh,int rsl,int imm,int rt)
     emit_cmovl_imm(1,rt);
   }
 }
-void emit_sltiu64_32(int rsh,int rsl,int imm,int rt)
+
+static void emit_sltiu64_32(int rsh,int rsl,int imm,int rt)
 {
   assert(rsh!=rt);
   emit_sltiu32(rsl,imm,rt);
@@ -1530,26 +1560,29 @@ void emit_sltiu64_32(int rsh,int rsl,int imm,int rt)
   }
 }
 
-void emit_cmp(int rs,int rt)
+static void emit_cmp(int rs,int rt)
 {
   assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
 }
-void emit_set_gz32(int rs, int rt)
+
+static void emit_set_gz32(int rs, int rt)
 {
   //assem_debug("set_gz32\n");
   emit_cmpimm(rs,1);
   emit_movimm(1,rt);
   emit_cmovl_imm(0,rt);
 }
-void emit_set_nz32(int rs, int rt)
+
+static void emit_set_nz32(int rs, int rt)
 {
   //assem_debug("set_nz32\n");
   if(rs!=rt) emit_movs(rs,rt);
   else emit_test(rs,rs);
   emit_cmovne_imm(1,rt);
 }
-void emit_set_gz64_32(int rsh, int rsl, int rt)
+
+static void emit_set_gz64_32(int rsh, int rsl, int rt)
 {
   //assem_debug("set_gz64\n");
   emit_set_gz32(rsl,rt);
@@ -1557,13 +1590,15 @@ void emit_set_gz64_32(int rsh, int rsl, int rt)
   emit_cmovne_imm(1,rt);
   emit_cmovs_imm(0,rt);
 }
-void emit_set_nz64_32(int rsh, int rsl, int rt)
+
+static void emit_set_nz64_32(int rsh, int rsl, int rt)
 {
   //assem_debug("set_nz64\n");
   emit_or_and_set_flags(rsh,rsl,rt);
   emit_cmovne_imm(1,rt);
 }
-void emit_set_if_less32(int rs1, int rs2, int rt)
+
+static void emit_set_if_less32(int rs1, int rs2, int rt)
 {
   //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
   if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
@@ -1571,7 +1606,8 @@ void emit_set_if_less32(int rs1, int rs2, int rt)
   if(rs1==rt||rs2==rt) emit_movimm(0,rt);
   emit_cmovl_imm(1,rt);
 }
-void emit_set_if_carry32(int rs1, int rs2, int rt)
+
+static void emit_set_if_carry32(int rs1, int rs2, int rt)
 {
   //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
   if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
@@ -1579,7 +1615,8 @@ void emit_set_if_carry32(int rs1, int rs2, int rt)
   if(rs1==rt||rs2==rt) emit_movimm(0,rt);
   emit_cmovb_imm(1,rt);
 }
-void emit_set_if_less64_32(int u1, int l1, int u2, int l2, int rt)
+
+static void emit_set_if_less64_32(int u1, int l1, int u2, int l2, int rt)
 {
   //assem_debug("set if less64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
   assert(u1!=rt);
@@ -1589,7 +1626,8 @@ void emit_set_if_less64_32(int u1, int l1, int u2, int l2, int rt)
   emit_sbcs(u1,u2,HOST_TEMPREG);
   emit_cmovl_imm(1,rt);
 }
-void emit_set_if_carry64_32(int u1, int l1, int u2, int l2, int rt)
+
+static void emit_set_if_carry64_32(int u1, int l1, int u2, int l2, int rt)
 {
   //assem_debug("set if carry64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
   assert(u1!=rt);
@@ -1600,86 +1638,97 @@ void emit_set_if_carry64_32(int u1, int l1, int u2, int l2, int rt)
   emit_cmovb_imm(1,rt);
 }
 
-void emit_call(int a)
+static void emit_call(int a)
 {
   assem_debug("bl %x (%x+%x)\n",a,(int)out,a-(int)out-8);
   u_int offset=genjmp(a);
   output_w32(0xeb000000|offset);
 }
-void emit_jmp(int a)
+
+static void emit_jmp(int a)
 {
   assem_debug("b %x (%x+%x)\n",a,(int)out,a-(int)out-8);
   u_int offset=genjmp(a);
   output_w32(0xea000000|offset);
 }
-void emit_jne(int a)
+
+static void emit_jne(int a)
 {
   assem_debug("bne %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x1a000000|offset);
 }
-void emit_jeq(int a)
+
+static void emit_jeq(int a)
 {
   assem_debug("beq %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x0a000000|offset);
 }
-void emit_js(int a)
+
+static void emit_js(int a)
 {
   assem_debug("bmi %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x4a000000|offset);
 }
-void emit_jns(int a)
+
+static void emit_jns(int a)
 {
   assem_debug("bpl %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x5a000000|offset);
 }
-void emit_jl(int a)
+
+static void emit_jl(int a)
 {
   assem_debug("blt %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0xba000000|offset);
 }
-void emit_jge(int a)
+
+static void emit_jge(int a)
 {
   assem_debug("bge %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0xaa000000|offset);
 }
-void emit_jno(int a)
+
+static void emit_jno(int a)
 {
   assem_debug("bvc %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x7a000000|offset);
 }
-void emit_jc(int a)
+
+static void emit_jc(int a)
 {
   assem_debug("bcs %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x2a000000|offset);
 }
-void emit_jcc(int a)
+
+static void emit_jcc(int a)
 {
   assem_debug("bcc %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x3a000000|offset);
 }
 
-void emit_callreg(u_int r)
+static void emit_callreg(u_int r)
 {
   assert(r<15);
   assem_debug("blx %s\n",regname[r]);
   output_w32(0xe12fff30|r);
 }
-void emit_jmpreg(u_int r)
+
+static void emit_jmpreg(u_int r)
 {
   assem_debug("mov pc,%s\n",regname[r]);
   output_w32(0xe1a00000|rd_rn_rm(15,0,r));
 }
 
-void emit_readword_indexed(int offset, int rs, int rt)
+static void emit_readword_indexed(int offset, int rs, int rt)
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1689,37 +1738,44 @@ void emit_readword_indexed(int offset, int rs, int rt)
     output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
-void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
+
+static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
 {
   assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }
-void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
+
+static void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
 {
   if(map<0) emit_readword_indexed(addr, rs, rt);
   else {
@@ -1727,7 +1783,8 @@ void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
     emit_readword_dualindexedx4(rs, map, rt);
   }
 }
-void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)
+
+static void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)
 {
   if(map<0) {
     if(rh>=0) emit_readword_indexed(addr, rs, rh);
@@ -1739,7 +1796,8 @@ void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)
     emit_readword_indexed_tlb(addr, rs, map, rl);
   }
 }
-void emit_movsbl_indexed(int offset, int rs, int rt)
+
+static void emit_movsbl_indexed(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1749,7 +1807,8 @@ void emit_movsbl_indexed(int offset, int rs, int rt)
     output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
-void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)
+
+static void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)
 {
   if(map<0) emit_movsbl_indexed(addr, rs, rt);
   else {
@@ -1765,7 +1824,8 @@ void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)
     }
   }
 }
-void emit_movswl_indexed(int offset, int rs, int rt)
+
+static void emit_movswl_indexed(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1775,7 +1835,8 @@ void emit_movswl_indexed(int offset, int rs, int rt)
     output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
-void emit_movzbl_indexed(int offset, int rs, int rt)
+
+static void emit_movzbl_indexed(int offset, int rs, int rt)
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1785,12 +1846,14 @@ void emit_movzbl_indexed(int offset, int rs, int rt)
     output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
-void emit_movzbl_dualindexedx4(int rs1, int rs2, int rt)
+
+static void emit_movzbl_dualindexedx4(int rs1, int rs2, int rt)
 {
   assem_debug("ldrb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }
-void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)
+
+static void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)
 {
   if(map<0) emit_movzbl_indexed(addr, rs, rt);
   else {
@@ -1802,7 +1865,8 @@ void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)
     }
   }
 }
-void emit_movzwl_indexed(int offset, int rs, int rt)
+
+static void emit_movzwl_indexed(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1812,6 +1876,7 @@ void emit_movzwl_indexed(int offset, int rs, int rt)
     output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
+
 static void emit_ldrd(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
@@ -1822,35 +1887,40 @@ static void emit_ldrd(int offset, int rs, int rt)
     output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
-void emit_readword(int addr, int rt)
+
+static void emit_readword(int addr, int rt)
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
 }
-void emit_movsbl(int addr, int rt)
+
+static unused void emit_movsbl(int addr, int rt)
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
   assem_debug("ldrsb %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe1d000d0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }
-void emit_movswl(int addr, int rt)
+
+static unused void emit_movswl(int addr, int rt)
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
   assem_debug("ldrsh %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe1d000f0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }
-void emit_movzbl(int addr, int rt)
+
+static unused void emit_movzbl(int addr, int rt)
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("ldrb %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5d00000|rd_rn_rm(rt,FP,0)|offset);
 }
-void emit_movzwl(int addr, int rt)
+
+static unused void emit_movzwl(int addr, int rt)
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
@@ -1858,7 +1928,7 @@ void emit_movzwl(int addr, int rt)
   output_w32(0xe1d000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }
 
-void emit_writeword_indexed(int rt, int offset, int rs)
+static void emit_writeword_indexed(int rt, int offset, int rs)
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1868,12 +1938,14 @@ void emit_writeword_indexed(int rt, int offset, int rs)
     output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
-void emit_writeword_dualindexedx4(int rt, int rs1, int rs2)
+
+static void emit_writeword_dualindexedx4(int rt, int rs1, int rs2)
 {
   assem_debug("str %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }
-void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)
+
+static void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)
 {
   if(map<0) emit_writeword_indexed(rt, addr, rs);
   else {
@@ -1881,7 +1953,8 @@ void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)
     emit_writeword_dualindexedx4(rt, rs, map);
   }
 }
-void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int temp)
+
+static void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int temp)
 {
   if(map<0) {
     if(rh>=0) emit_writeword_indexed(rh, addr, rs);
@@ -1897,7 +1970,8 @@ void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int
     }
   }
 }
-void emit_writehword_indexed(int rt, int offset, int rs)
+
+static void emit_writehword_indexed(int rt, int offset, int rs)
 {
   assert(offset>-256&&offset<256);
   assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1907,7 +1981,8 @@ void emit_writehword_indexed(int rt, int offset, int rs)
     output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
-void emit_writebyte_indexed(int rt, int offset, int rs)
+
+static void emit_writebyte_indexed(int rt, int offset, int rs)
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1917,12 +1992,14 @@ void emit_writebyte_indexed(int rt, int offset, int rs)
     output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
-void emit_writebyte_dualindexedx4(int rt, int rs1, int rs2)
+
+static void emit_writebyte_dualindexedx4(int rt, int rs1, int rs2)
 {
   assem_debug("strb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }
-void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
+
+static void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
 {
   if(map<0) emit_writebyte_indexed(rt, addr, rs);
   else {
@@ -1934,36 +2011,42 @@ void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
     }
   }
 }
-void emit_strcc_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_strccb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_strcch_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_writeword(int rt, int addr)
+
+static void emit_writeword(int rt, int addr)
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("str %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
 }
-void emit_writehword(int rt, int addr)
+
+static unused void emit_writehword(int rt, int addr)
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<256);
   assem_debug("strh %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe1c000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
 }
-void emit_writebyte(int rt, int addr)
+
+static unused void emit_writebyte(int rt, int addr)
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
@@ -1971,7 +2054,7 @@ void emit_writebyte(int rt, int addr)
   output_w32(0xe5c00000|rd_rn_rm(rt,FP,0)|offset);
 }
 
-void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
+static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
 {
   assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
   assert(rs1<16);
@@ -1980,7 +2063,8 @@ void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
   assert(lo<16);
   output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
 }
-void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
+
+static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
 {
   assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
   assert(rs1<16);
@@ -1990,19 +2074,19 @@ void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
   output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
 }
 
-void emit_clz(int rs,int rt)
+static void emit_clz(int rs,int rt)
 {
   assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
 }
 
-void emit_subcs(int rs1,int rs2,int rt)
+static void emit_subcs(int rs1,int rs2,int rt)
 {
   assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_shrcc_imm(int rs,u_int imm,int rt)
+static void emit_shrcc_imm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -2010,7 +2094,7 @@ void emit_shrcc_imm(int rs,u_int imm,int rt)
   output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 
-void emit_shrne_imm(int rs,u_int imm,int rt)
+static void emit_shrne_imm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -2018,73 +2102,73 @@ void emit_shrne_imm(int rs,u_int imm,int rt)
   output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 
-void emit_negmi(int rs, int rt)
+static void emit_negmi(int rs, int rt)
 {
   assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0x42600000|rd_rn_rm(rt,rs,0));
 }
 
-void emit_negsmi(int rs, int rt)
+static void emit_negsmi(int rs, int rt)
 {
   assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0x42700000|rd_rn_rm(rt,rs,0));
 }
 
-void emit_orreq(u_int rs1,u_int rs2,u_int rt)
+static void emit_orreq(u_int rs1,u_int rs2,u_int rt)
 {
   assem_debug("orreq %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x01800000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_orrne(u_int rs1,u_int rs2,u_int rt)
+static void emit_orrne(u_int rs1,u_int rs2,u_int rt)
 {
   assem_debug("orrne %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x11800000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
 {
   assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
 }
 
-void emit_biceq_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_biceq_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
 {
   assem_debug("biceq %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
 }
 
-void emit_bicne_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bicne_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
 {
   assem_debug("bicne %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
 }
 
-void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
 {
   assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
 }
 
-void emit_biceq_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_biceq_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
 {
   assem_debug("biceq %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
 }
 
-void emit_bicne_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bicne_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
 {
   assem_debug("bicne %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
 }
 
-void emit_teq(int rs, int rt)
+static void emit_teq(int rs, int rt)
 {
   assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
 }
 
-void emit_rsbimm(int rs, int imm, int rt)
+static void emit_rsbimm(int rs, int imm, int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2093,7 +2177,7 @@ void emit_rsbimm(int rs, int imm, int rt)
 }
 
 // Load 2 immediates optimizing for small code size
-void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
+static void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
 {
   emit_movimm(imm1,rt1);
   u_int armval;
@@ -2109,7 +2193,7 @@ void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
 
 // Conditionally select one of two immediates, optimizing for small code size
 // This will only be called if HAVE_CMOV_IMM is defined
-void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
+static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
 {
   u_int armval;
   if(genimm(imm2-imm1,&armval)) {
@@ -2143,7 +2227,7 @@ void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
 }
 
 // special case for checking invalid_code
-void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
+static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
 {
   assert(imm<128&&imm>=0);
   assert(r>=0&&r<16);
@@ -2152,7 +2236,7 @@ void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
   emit_cmpimm(HOST_TEMPREG,imm);
 }
 
-void emit_callne(int a)
+static void emit_callne(int a)
 {
   assem_debug("blne %x\n",a);
   u_int offset=genjmp(a);
@@ -2160,21 +2244,21 @@ void emit_callne(int a)
 }
 
 // Used to preload hash table entries
-void emit_prefetchreg(int r)
+static unused void emit_prefetchreg(int r)
 {
   assem_debug("pld %s\n",regname[r]);
   output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
 }
 
 // Special case for mini_ht
-void emit_ldreq_indexed(int rs, u_int offset, int rt)
+static void emit_ldreq_indexed(int rs, u_int offset, int rt)
 {
   assert(offset<4096);
   assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
   output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
 }
 
-void emit_bicne_imm(int rs,int imm,int rt)
+static unused void emit_bicne_imm(int rs,int imm,int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2182,7 +2266,7 @@ void emit_bicne_imm(int rs,int imm,int rt)
   output_w32(0x13c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_biccs_imm(int rs,int imm,int rt)
+static unused void emit_biccs_imm(int rs,int imm,int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2190,7 +2274,7 @@ void emit_biccs_imm(int rs,int imm,int rt)
   output_w32(0x23c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_bicvc_imm(int rs,int imm,int rt)
+static unused void emit_bicvc_imm(int rs,int imm,int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2198,7 +2282,7 @@ void emit_bicvc_imm(int rs,int imm,int rt)
   output_w32(0x73c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_bichi_imm(int rs,int imm,int rt)
+static unused void emit_bichi_imm(int rs,int imm,int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2206,7 +2290,7 @@ void emit_bichi_imm(int rs,int imm,int rt)
   output_w32(0x83c00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_orrvs_imm(int rs,int imm,int rt)
+static unused void emit_orrvs_imm(int rs,int imm,int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2214,7 +2298,7 @@ void emit_orrvs_imm(int rs,int imm,int rt)
   output_w32(0x63800000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_orrne_imm(int rs,int imm,int rt)
+static void emit_orrne_imm(int rs,int imm,int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2222,7 +2306,7 @@ void emit_orrne_imm(int rs,int imm,int rt)
   output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_andne_imm(int rs,int imm,int rt)
+static void emit_andne_imm(int rs,int imm,int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2230,7 +2314,7 @@ void emit_andne_imm(int rs,int imm,int rt)
   output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_addpl_imm(int rs,int imm,int rt)
+static unused void emit_addpl_imm(int rs,int imm,int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2238,7 +2322,7 @@ void emit_addpl_imm(int rs,int imm,int rt)
   output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_jno_unlikely(int a)
+static void emit_jno_unlikely(int a)
 {
   //emit_jno(a);
   assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
@@ -2256,6 +2340,7 @@ static void save_regs_all(u_int reglist)
   assem_debug("}\n");
   output_w32(0xe88b0000|reglist);
 }
+
 static void restore_regs_all(u_int reglist)
 {
   int i;
@@ -2267,12 +2352,14 @@ static void restore_regs_all(u_int reglist)
   assem_debug("}\n");
   output_w32(0xe89b0000|reglist);
 }
+
 // Save registers before function call
 static void save_regs(u_int reglist)
 {
   reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
   save_regs_all(reglist);
 }
+
 // Restore registers after function call
 static void restore_regs(u_int reglist)
 {
@@ -2282,7 +2369,7 @@ static void restore_regs(u_int reglist)
 
 /* Stubs/epilogue */
 
-void literal_pool(int n)
+static void literal_pool(int n)
 {
   if(!literalcount) return;
   if(n) {
@@ -2314,7 +2401,7 @@ void literal_pool(int n)
   literalcount=0;
 }
 
-void literal_pool_jumpover(int n)
+static void literal_pool_jumpover(int n)
 {
   if(!literalcount) return;
   if(n) {
@@ -2326,10 +2413,12 @@ void literal_pool_jumpover(int n)
   set_jump_target(jaddr,(int)out);
 }
 
-emit_extjump2(u_int addr, int target, int linker)
+static void emit_extjump2(u_int addr, int target, int linker)
 {
   u_char *ptr=(u_char *)addr;
   assert((ptr[3]&0x0e)==0xa);
+  (void)ptr;
+
   emit_loadlp(target,0);
   emit_loadlp(addr,1);
   assert(addr>=BASE_ADDR&&addr<(BASE_ADDR+(1<<TARGET_SIZE_2)));
@@ -2347,11 +2436,12 @@ emit_extjump2(u_int addr, int target, int linker)
   emit_jmp(linker);
 }
 
-emit_extjump(int addr, int target)
+static void emit_extjump(int addr, int target)
 {
   emit_extjump2(addr, target, (int)dyna_linker);
 }
-emit_extjump_ds(int addr, int target)
+
+static void emit_extjump_ds(int addr, int target)
 {
   emit_extjump2(addr, target, (int)dyna_linker_ds);
 }
@@ -2432,7 +2522,7 @@ static void mov_loadtype_adj(int type,int rs,int rt)
 #include "pcsxmem.h"
 #include "pcsxmem_inline.c"
 
-do_readstub(int n)
+static void do_readstub(int n)
 {
   assem_debug("do_readstub %x\n",start+stubs[n][3]*4);
   literal_pool(256);
@@ -2516,7 +2606,7 @@ do_readstub(int n)
 }
 
 // return memhandler, or get directly accessable address and return 0
-u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
+static u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
 {
   u_int l1,l2=0;
   l1=((u_int *)table)[addr>>12];
@@ -2542,7 +2632,7 @@ u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
   }
 }
 
-inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
 {
   int rs=get_reg(regmap,target);
   int rth=get_reg(regmap,target|64);
@@ -2624,7 +2714,7 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
   restore_regs(reglist);
 }
 
-do_writestub(int n)
+static void do_writestub(int n)
 {
   assem_debug("do_writestub %x\n",start+stubs[n][3]*4);
   literal_pool(256);
@@ -2708,7 +2798,7 @@ do_writestub(int n)
   emit_jmp(ra);
 }
 
-inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
 {
   int rs=get_reg(regmap,-1);
   int rth=get_reg(regmap,target|64);
@@ -2745,7 +2835,7 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target,
   restore_regs(reglist);
 }
 
-do_unalignedwritestub(int n)
+static void do_unalignedwritestub(int n)
 {
   assem_debug("do_unalignedwritestub %x\n",start+stubs[n][3]*4);
   literal_pool(256);
@@ -2834,12 +2924,7 @@ do_unalignedwritestub(int n)
 #endif
 }
 
-void printregs(int edi,int esi,int ebp,int esp,int b,int d,int c,int a)
-{
-  printf("regs: %x %x %x %x %x %x %x (%x)\n",a,b,c,d,ebp,esi,edi,(&edi)[-1]);
-}
-
-do_invstub(int n)
+static void do_invstub(int n)
 {
   literal_pool(20);
   u_int reglist=stubs[n][3];
@@ -2876,7 +2961,7 @@ int do_dirty_stub(int i)
   return entry;
 }
 
-void do_dirty_stub_ds()
+static void do_dirty_stub_ds()
 {
   // Careful about the code output here, verify_dirty needs to parse it.
   #ifndef HAVE_ARMV7
@@ -2894,7 +2979,7 @@ void do_dirty_stub_ds()
   emit_call((int)&verify_code_ds);
 }
 
-do_cop1stub(int n)
+static void do_cop1stub(int n)
 {
   literal_pool(256);
   assem_debug("do_cop1stub %x\n",start+stubs[n][3]*4);
@@ -2917,7 +3002,7 @@ do_cop1stub(int n)
 
 /* Special assem */
 
-void shift_assemble_arm(int i,struct regstat *i_regs)
+static void shift_assemble_arm(int i,struct regstat *i_regs)
 {
   if(rt1[i]) {
     if(opcode2[i]<=0x07) // SLLV/SRLV/SRAV
@@ -3209,7 +3294,7 @@ static int emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override)
 
 #define shift_assemble shift_assemble_arm
 
-void loadlr_assemble_arm(int i,struct regstat *i_regs)
+static void loadlr_assemble_arm(int i,struct regstat *i_regs)
 {
   int s,th,tl,temp,temp2,addr,map=-1;
   int offset;
@@ -3338,7 +3423,7 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
 }
 #define loadlr_assemble loadlr_assemble_arm
 
-void cop0_assemble(int i,struct regstat *i_regs)
+static void cop0_assemble(int i,struct regstat *i_regs)
 {
   if(opcode2[i]==0) // MFC0
   {
@@ -3525,7 +3610,7 @@ static void cop2_put_dreg(u_int copr,signed char sl,signed char temp)
   }
 }
 
-void cop2_assemble(int i,struct regstat *i_regs)
+static void cop2_assemble(int i,struct regstat *i_regs)
 {
   u_int copr=(source[i]>>11)&0x1f;
   signed char temp=get_reg(i_regs->regmap,-1);
@@ -3734,7 +3819,7 @@ static void c2op_assemble(int i,struct regstat *i_regs)
   }
 }
 
-void cop1_unusable(int i,struct regstat *i_regs)
+static void cop1_unusable(int i,struct regstat *i_regs)
 {
   // XXX: should just just do the exception instead
   if(!cop1_usable) {
@@ -3745,28 +3830,28 @@ void cop1_unusable(int i,struct regstat *i_regs)
   }
 }
 
-void cop1_assemble(int i,struct regstat *i_regs)
+static void cop1_assemble(int i,struct regstat *i_regs)
 {
   cop1_unusable(i, i_regs);
 }
 
-void fconv_assemble_arm(int i,struct regstat *i_regs)
+static void fconv_assemble_arm(int i,struct regstat *i_regs)
 {
   cop1_unusable(i, i_regs);
 }
 #define fconv_assemble fconv_assemble_arm
 
-void fcomp_assemble(int i,struct regstat *i_regs)
+static void fcomp_assemble(int i,struct regstat *i_regs)
 {
   cop1_unusable(i, i_regs);
 }
 
-void float_assemble(int i,struct regstat *i_regs)
+static void float_assemble(int i,struct regstat *i_regs)
 {
   cop1_unusable(i, i_regs);
 }
 
-void multdiv_assemble_arm(int i,struct regstat *i_regs)
+static void multdiv_assemble_arm(int i,struct regstat *i_regs)
 {
   //  case 0x18: MULT
   //  case 0x19: MULTU
@@ -3891,25 +3976,25 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
 }
 #define multdiv_assemble multdiv_assemble_arm
 
-void do_preload_rhash(int r) {
+static void do_preload_rhash(int r) {
   // Don't need this for ARM.  On x86, this puts the value 0xf8 into the
   // register.  On ARM the hash can be done with a single instruction (below)
 }
 
-void do_preload_rhtbl(int ht) {
+static void do_preload_rhtbl(int ht) {
   emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
 }
 
-void do_rhash(int rs,int rh) {
+static void do_rhash(int rs,int rh) {
   emit_andimm(rs,0xf8,rh);
 }
 
-void do_miniht_load(int ht,int rh) {
+static void do_miniht_load(int ht,int rh) {
   assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
   output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
 }
 
-void do_miniht_jump(int rs,int rh,int ht) {
+static void do_miniht_jump(int rs,int rh,int ht) {
   emit_cmp(rh,rs);
   emit_ldreq_indexed(ht,4,15);
   #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
@@ -3920,7 +4005,7 @@ void do_miniht_jump(int rs,int rh,int ht) {
   #endif
 }
 
-void do_miniht_insert(u_int return_address,int rt,int temp) {
+static void do_miniht_insert(u_int return_address,int rt,int temp) {
   #ifndef HAVE_ARMV7
   emit_movimm(return_address,rt); // PC into link register
   add_to_linker((int)out,return_address,1);
@@ -3937,7 +4022,7 @@ void do_miniht_insert(u_int return_address,int rt,int temp) {
   #endif
 }
 
-void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t is32_pre,uint64_t u,uint64_t uu)
+static void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t is32_pre,uint64_t u,uint64_t uu)
 {
   //if(dirty_pre==dirty) return;
   int hr,reg,new_hr;
@@ -3966,7 +4051,7 @@ void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,
 
 
 /* using strd could possibly help but you'd have to allocate registers in pairs
-void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint64_t is32,uint64_t u,uint64_t uu)
+static void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint64_t is32,uint64_t u,uint64_t uu)
 {
   int hr;
   int wrote=-1;
@@ -4023,7 +4108,7 @@ void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint
 
 // Clearing the cache is rather slow on ARM Linux, so mark the areas
 // that need to be cleared, and then only clear these areas once.
-void do_clear_cache()
+static void do_clear_cache()
 {
   int i,j;
   for (i=0;i<(1<<(TARGET_SIZE_2-17));i++)
diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index 21e7feda..6501d26a 100644
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -83,22 +83,29 @@ struct ll_entry
   struct ll_entry *next;
 };
 
-  u_int start;
-  u_int *source;
-  char insn[MAXBLOCK][10];
-  u_char itype[MAXBLOCK];
-  u_char opcode[MAXBLOCK];
-  u_char opcode2[MAXBLOCK];
-  u_char bt[MAXBLOCK];
-  u_char rs1[MAXBLOCK];
-  u_char rs2[MAXBLOCK];
-  u_char rt1[MAXBLOCK];
-  u_char rt2[MAXBLOCK];
-  u_char us1[MAXBLOCK];
-  u_char us2[MAXBLOCK];
-  u_char dep1[MAXBLOCK];
-  u_char dep2[MAXBLOCK];
-  u_char lt1[MAXBLOCK];
+  // used by asm:
+  u_char *out;
+  u_int hash_table[65536][4]  __attribute__((aligned(16)));
+  struct ll_entry *jump_in[4096] __attribute__((aligned(16)));
+  struct ll_entry *jump_dirty[4096];
+
+  static struct ll_entry *jump_out[4096];
+  static u_int start;
+  static u_int *source;
+  static char insn[MAXBLOCK][10];
+  static u_char itype[MAXBLOCK];
+  static u_char opcode[MAXBLOCK];
+  static u_char opcode2[MAXBLOCK];
+  static u_char bt[MAXBLOCK];
+  static u_char rs1[MAXBLOCK];
+  static u_char rs2[MAXBLOCK];
+  static u_char rt1[MAXBLOCK];
+  static u_char rt2[MAXBLOCK];
+  static u_char us1[MAXBLOCK];
+  static u_char us2[MAXBLOCK];
+  static u_char dep1[MAXBLOCK];
+  static u_char dep2[MAXBLOCK];
+  static u_char lt1[MAXBLOCK];
   static uint64_t gte_rs[MAXBLOCK]; // gte: 32 data and 32 ctl regs
   static uint64_t gte_rt[MAXBLOCK];
   static uint64_t gte_unneeded[MAXBLOCK];
@@ -107,52 +114,47 @@ struct ll_entry
   static u_int smrv_weak; // same, but somewhat less likely
   static u_int smrv_strong_next; // same, but after current insn executes
   static u_int smrv_weak_next;
-  int imm[MAXBLOCK];
-  u_int ba[MAXBLOCK];
-  char likely[MAXBLOCK];
-  char is_ds[MAXBLOCK];
-  char ooo[MAXBLOCK];
-  uint64_t unneeded_reg[MAXBLOCK];
-  uint64_t unneeded_reg_upper[MAXBLOCK];
-  uint64_t branch_unneeded_reg[MAXBLOCK];
-  uint64_t branch_unneeded_reg_upper[MAXBLOCK];
-  uint64_t pr32[MAXBLOCK];
-  signed char regmap_pre[MAXBLOCK][HOST_REGS];
+  static int imm[MAXBLOCK];
+  static u_int ba[MAXBLOCK];
+  static char likely[MAXBLOCK];
+  static char is_ds[MAXBLOCK];
+  static char ooo[MAXBLOCK];
+  static uint64_t unneeded_reg[MAXBLOCK];
+  static uint64_t unneeded_reg_upper[MAXBLOCK];
+  static uint64_t branch_unneeded_reg[MAXBLOCK];
+  static uint64_t branch_unneeded_reg_upper[MAXBLOCK];
+  static signed char regmap_pre[MAXBLOCK][HOST_REGS];
   static uint64_t current_constmap[HOST_REGS];
   static uint64_t constmap[MAXBLOCK][HOST_REGS];
   static struct regstat regs[MAXBLOCK];
   static struct regstat branch_regs[MAXBLOCK];
-  signed char minimum_free_regs[MAXBLOCK];
-  u_int needed_reg[MAXBLOCK];
-  u_int wont_dirty[MAXBLOCK];
-  u_int will_dirty[MAXBLOCK];
-  int ccadj[MAXBLOCK];
-  int slen;
-  u_int instr_addr[MAXBLOCK];
-  u_int link_addr[MAXBLOCK][3];
-  int linkcount;
-  u_int stubs[MAXBLOCK*3][8];
-  int stubcount;
-  u_int literals[1024][2];
-  int literalcount;
-  int is_delayslot;
-  int cop1_usable;
-  u_char *out;
-  struct ll_entry *jump_in[4096] __attribute__((aligned(16)));
-  struct ll_entry *jump_out[4096];
-  struct ll_entry *jump_dirty[4096];
-  u_int hash_table[65536][4]  __attribute__((aligned(16)));
-  char shadow[1048576]  __attribute__((aligned(16)));
-  void *copy;
-  int expirep;
-  int new_dynarec_did_compile;
-  int new_dynarec_hacks;
-  u_int stop_after_jal;
+  static signed char minimum_free_regs[MAXBLOCK];
+  static u_int needed_reg[MAXBLOCK];
+  static u_int wont_dirty[MAXBLOCK];
+  static u_int will_dirty[MAXBLOCK];
+  static int ccadj[MAXBLOCK];
+  static int slen;
+  static u_int instr_addr[MAXBLOCK];
+  static u_int link_addr[MAXBLOCK][3];
+  static int linkcount;
+  static u_int stubs[MAXBLOCK*3][8];
+  static int stubcount;
+  static u_int literals[1024][2];
+  static int literalcount;
+  static int is_delayslot;
+  static int cop1_usable;
+  static char shadow[1048576]  __attribute__((aligned(16)));
+  static void *copy;
+  static int expirep;
+  static u_int stop_after_jal;
 #ifndef RAM_FIXED
   static u_int ram_offset;
 #else
   static const u_int ram_offset=0;
 #endif
+
+  int new_dynarec_hacks;
+  int new_dynarec_did_compile;
   extern u_char restore_candidate[512];
   extern int cycle_count;
 
@@ -254,15 +256,20 @@ void jump_intcall();
 void new_dyna_leave();
 
 // Needed by assembler
-void wb_register(signed char r,signed char regmap[],uint64_t dirty,uint64_t is32);
-void wb_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty);
-void wb_needed_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty,int addr);
-void load_all_regs(signed char i_regmap[]);
-void load_needed_regs(signed char i_regmap[],signed char next_regmap[]);
-void load_regs_entry(int t);
-void load_all_consts(signed char regmap[],int is32,u_int dirty,int i);
+static void wb_register(signed char r,signed char regmap[],uint64_t dirty,uint64_t is32);
+static void wb_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty);
+static void wb_needed_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty,int addr);
+static void load_all_regs(signed char i_regmap[]);
+static void load_needed_regs(signed char i_regmap[],signed char next_regmap[]);
+static void load_regs_entry(int t);
+static void load_all_consts(signed char regmap[],int is32,u_int dirty,int i);
+
+static int verify_dirty(u_int *ptr);
+static int get_final_value(int hr, int i, int *value);
+static void add_stub(int type,int addr,int retaddr,int a,int b,int c,int d,int e);
+static void add_to_linker(int addr,int target,int ext);
 
-int tracedebug=0;
+static int tracedebug=0;
 
 //#define DEBUG_CYCLE_COUNT 1
 
@@ -1747,7 +1754,7 @@ static void pagespan_alloc(struct regstat *current,int i)
   //else ...
 }
 
-add_stub(int type,int addr,int retaddr,int a,int b,int c,int d,int e)
+static void add_stub(int type,int addr,int retaddr,int a,int b,int c,int d,int e)
 {
   stubs[stubcount][0]=type;
   stubs[stubcount][1]=addr;
@@ -3703,7 +3710,7 @@ void address_generation(int i,struct regstat *i_regs,signed char entry[])
   }
 }
 
-int get_final_value(int hr, int i, int *value)
+static int get_final_value(int hr, int i, int *value)
 {
   int reg=regs[i].regmap[hr];
   while(i<slen-1) {
@@ -4584,7 +4591,7 @@ void do_ccstub(int n)
   emit_jmpreg(EAX);*/
 }
 
-add_to_linker(int addr,int target,int ext)
+static void add_to_linker(int addr,int target,int ext)
 {
   link_addr[linkcount][0]=addr;
   link_addr[linkcount][1]=target;