From d75460620efa21df695967c72a92265dac04001f Mon Sep 17 00:00:00 2001 From: notaz Date: Sun, 9 Jul 2023 00:07:06 +0300 Subject: [PATCH] drc: minor cleanup --- libpcsxcore/new_dynarec/assem_arm.c | 4 ++-- libpcsxcore/new_dynarec/assem_arm64.c | 2 +- libpcsxcore/new_dynarec/emu_if.c | 4 ++-- libpcsxcore/new_dynarec/emu_if.h | 5 ----- libpcsxcore/new_dynarec/new_dynarec.c | 16 ++++++++-------- libpcsxcore/r3000a.h | 1 - 6 files changed, 13 insertions(+), 19 deletions(-) diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index 95007dfa..6af93e22 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -430,7 +430,7 @@ static void emit_loadreg(int r, int hr) //case HIREG: addr = &hi; break; //case LOREG: addr = &lo; break; case CCREG: addr = &cycle_count; break; - case CSREG: addr = &Status; break; + case CSREG: addr = &psxRegs.CP0.n.Status; break; case INVCP: addr = &invc_ptr; break; case ROREG: addr = &ram_offset; break; default: @@ -1752,7 +1752,7 @@ static void inline_readstub(enum stub_type type, int i, u_int addr, emit_readword(&last_count,3); emit_addimm(cc<0?2:cc,adj,2); emit_add(2,3,2); - emit_writeword(2,&Count); + emit_writeword(2,&psxRegs.cycle); } emit_far_call(handler); diff --git a/libpcsxcore/new_dynarec/assem_arm64.c b/libpcsxcore/new_dynarec/assem_arm64.c index 271bee58..67ce02ad 100644 --- a/libpcsxcore/new_dynarec/assem_arm64.c +++ b/libpcsxcore/new_dynarec/assem_arm64.c @@ -463,7 +463,7 @@ static void emit_loadreg(u_int r, u_int hr) //case HIREG: addr = &hi; break; //case LOREG: addr = &lo; break; case CCREG: addr = &cycle_count; break; - case CSREG: addr = &Status; break; + case CSREG: addr = &psxRegs.CP0.n.Status; break; case INVCP: addr = &invc_ptr; is64 = 1; break; case ROREG: addr = &ram_offset; is64 = 1; break; default: diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c index dc17f2d4..33319ba6 100644 --- a/libpcsxcore/new_dynarec/emu_if.c +++ b/libpcsxcore/new_dynarec/emu_if.c @@ -84,7 +84,7 @@ static void irq_test(void) } } - if ((psxHu32(0x1070) & psxHu32(0x1074)) && (Status & 0x401) == 0x401) { + if ((psxHu32(0x1070) & psxHu32(0x1074)) && (psxRegs.CP0.n.Status & 0x401) == 0x401) { psxException(0x400, 0); pending_exception = 1; } @@ -110,7 +110,7 @@ void pcsx_mtc0(u32 reg, u32 val) evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle); MTC0(&psxRegs, reg, val); gen_interupt(); - if (Cause & Status & 0x0300) // possible sw irq + if (psxRegs.CP0.n.Cause & psxRegs.CP0.n.Status & 0x0300) // possible sw irq pending_exception = 1; } diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h index 7fa0a171..b49b84ba 100644 --- a/libpcsxcore/new_dynarec/emu_if.h +++ b/libpcsxcore/new_dynarec/emu_if.h @@ -14,11 +14,6 @@ extern int hi, lo; /* same as psxRegs.CP0.n.* */ extern int reg_cop0[]; -#define Status psxRegs.CP0.n.Status -#define Cause psxRegs.CP0.n.Cause -#define EPC psxRegs.CP0.n.EPC -#define BadVAddr psxRegs.CP0.n.BadVAddr -#define Count psxRegs.cycle // psxRegs.CP0.n.Count /* COP2/GTE */ enum gte_opcodes { diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 276ef8af..2673a6ea 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -783,10 +783,10 @@ static void noinline *get_addr(u_int vaddr, int can_compile) return ndrc_get_addr_ht(vaddr); // generate an address error - Status|=2; - Cause=(vaddr<<31)|(4<<2); - EPC=(vaddr&1)?vaddr-5:vaddr; - BadVAddr=(vaddr&~1); + psxRegs.CP0.n.Status |= 2; + psxRegs.CP0.n.Cause = (vaddr<<31) | (4<<2); + psxRegs.CP0.n.EPC = (vaddr&1) ? vaddr-5 : vaddr; + psxRegs.CP0.n.BadVAddr = vaddr & ~1; return ndrc_get_addr_ht(0x80000080); } @@ -3500,7 +3500,7 @@ static void cop0_assemble(int i, const struct regstat *i_regs, int ccadj_) emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc emit_add(HOST_CCREG,HOST_TEMPREG,HOST_CCREG); emit_addimm(HOST_CCREG,ccadj_,HOST_CCREG); - emit_writeword(HOST_CCREG,&Count); + emit_writeword(HOST_CCREG,&psxRegs.cycle); } // What a mess. The status register (12) can enable interrupts, // so needs a special case to handle a pending interrupt. @@ -3532,7 +3532,7 @@ static void cop0_assemble(int i, const struct regstat *i_regs, int ccadj_) emit_movimm(copr,0); emit_far_call(pcsx_mtc0); if(copr==9||copr==11||copr==12||copr==13) { - emit_readword(&Count,HOST_CCREG); + emit_readword(&psxRegs.cycle,HOST_CCREG); emit_readword(&next_interupt,HOST_TEMPREG); emit_addimm(HOST_CCREG,-ccadj_,HOST_CCREG); emit_sub(HOST_CCREG,HOST_TEMPREG,HOST_CCREG); @@ -3558,11 +3558,11 @@ static void cop0_assemble(int i, const struct regstat *i_regs, int ccadj_) assert(dops[i].opcode2==0x10); //if((source[i]&0x3f)==0x10) // RFE { - emit_readword(&Status,0); + emit_readword(&psxRegs.CP0.n.Status,0); emit_andimm(0,0x3c,1); emit_andimm(0,~0xf,0); emit_orrshr_imm(1,2,0); - emit_writeword(0,&Status); + emit_writeword(0,&psxRegs.CP0.n.Status); } } } diff --git a/libpcsxcore/r3000a.h b/libpcsxcore/r3000a.h index 2339d595..a052a59a 100644 --- a/libpcsxcore/r3000a.h +++ b/libpcsxcore/r3000a.h @@ -32,7 +32,6 @@ extern "C" { enum { R3000ACPU_NOTIFY_CACHE_ISOLATED = 0, R3000ACPU_NOTIFY_CACHE_UNISOLATED = 1, - R3000ACPU_NOTIFY_DMA3_EXE_LOAD = 2 }; typedef struct { -- 2.39.2