X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=picodrive.git;a=blobdiff_plain;f=pico%2Fpico_int.h;h=2249148f5fb15bdd2113df02c0c75d5e04f94d33;hp=a654c5aa92779502dc24bd1681932a2080d60d92;hb=e0bcb7a90d06b295b1ca989b6ad70412912cca5b;hpb=6d7979571d08d7b020022fa169a34a29fc20dfdc diff --git a/pico/pico_int.h b/pico/pico_int.h index a654c5a..2249148 100644 --- a/pico/pico_int.h +++ b/pico/pico_int.h @@ -37,45 +37,39 @@ extern "C" { #ifdef EMU_C68K #include "../cpu/cyclone/Cyclone.h" extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k; -#define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run -#define SekCyclesLeft \ - (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) -#define SekCyclesLeftS68k \ - ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles) -#define SekEndTimeslice(after) PicoCpuCM68k.cycles=after -#define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after +#define SekCyclesLeft PicoCpuCM68k.cycles // cycles left for this run +#define SekCyclesLeftS68k PicoCpuCS68k.cycles #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase) #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase) -#define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8]) +#define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8]) +#define SekDarS68k(x) (x < 8 ? PicoCpuCS68k.d[x] : PicoCpuCS68k.a[x - 8]) #define SekSr CycloneGetSr(&PicoCpuCM68k) +#define SekSrS68k CycloneGetSr(&PicoCpuCS68k) #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } } #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } } #define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1) #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1) -#define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7)) +#define SekShouldInterrupt() (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7)) + +#define SekNotPolling PicoCpuCM68k.not_pol +#define SekNotPollingS68k PicoCpuCS68k.not_pol #define SekInterrupt(i) PicoCpuCM68k.irq=i #define SekIrqLevel PicoCpuCM68k.irq -#ifdef EMU_M68K -#define EMU_CORE_DEBUG -#endif #endif #ifdef EMU_F68K #include "../cpu/fame/fame.h" extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k; -#define SekCyclesLeftNoMCD PicoCpuFM68k.io_cycle_counter -#define SekCyclesLeft \ - (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) -#define SekCyclesLeftS68k \ - ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter) -#define SekEndTimeslice(after) PicoCpuFM68k.io_cycle_counter=after -#define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after +#define SekCyclesLeft PicoCpuFM68k.io_cycle_counter +#define SekCyclesLeftS68k PicoCpuFS68k.io_cycle_counter #define SekPc fm68k_get_pc(&PicoCpuFM68k) #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k) -#define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D) +#define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D) +#define SekDarS68k(x) (x < 8 ? PicoCpuFS68k.dreg[x].D : PicoCpuFS68k.areg[x - 8].D) #define SekSr PicoCpuFM68k.sr +#define SekSrS68k PicoCpuFS68k.sr #define SekSetStop(x) { \ PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \ if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \ @@ -86,31 +80,28 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k; } #define SekIsStoppedM68k() (PicoCpuFM68k.execinfo&FM68K_HALTED) #define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED) -#define SekShouldInterrupt fm68k_would_interrupt() +#define SekShouldInterrupt() fm68k_would_interrupt() + +#define SekNotPolling PicoCpuFM68k.not_polling +#define SekNotPollingS68k PicoCpuFS68k.not_polling #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq #define SekIrqLevel PicoCpuFM68k.interrupts[0] -#ifdef EMU_M68K -#define EMU_CORE_DEBUG -#endif #endif #ifdef EMU_M68K #include "../cpu/musashi/m68kcpu.h" extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k; #ifndef SekCyclesLeft -#define SekCyclesLeftNoMCD PicoCpuMM68k.cyc_remaining_cycles -#define SekCyclesLeft \ - (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) -#define SekCyclesLeftS68k \ - ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles) -#define SekEndTimeslice(after) SET_CYCLES(after) -#define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after +#define SekCyclesLeft PicoCpuMM68k.cyc_remaining_cycles +#define SekCyclesLeftS68k PicoCpuMS68k.cyc_remaining_cycles #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC) #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC) -#define SekDar(x) PicoCpuMM68k.dar[x] -#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR) +#define SekDar(x) PicoCpuMM68k.dar[x] +#define SekDarS68k(x) PicoCpuMS68k.dar[x] +#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR) +#define SekSrS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_SR) #define SekSetStop(x) { \ if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \ else PicoCpuMM68k.stopped=0; \ @@ -121,7 +112,10 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k; } #define SekIsStoppedM68k() (PicoCpuMM68k.stopped==STOP_LEVEL_STOP) #define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP) -#define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK) +#define SekShouldInterrupt() (CPU_INT_LEVEL > FLAG_INT_MASK) + +#define SekNotPolling PicoCpuMM68k.not_polling +#define SekNotPollingS68k PicoCpuMS68k.not_polling #define SekInterrupt(irq) { \ void *oldcontext = m68ki_cpu_p; \ @@ -134,51 +128,48 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k; #endif #endif // EMU_M68K -extern int SekCycleCnt; // cycles done in this frame -extern int SekCycleAim; // cycle aim -extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame - -#define SekCyclesReset() { \ - SekCycleCntT+=SekCycleAim; \ - SekCycleCnt-=SekCycleAim; \ - SekCycleAim=0; \ +// while running, cnt represents target of current timeslice +// while not in SekRun(), it's actual cycles done +// (but always use SekCyclesDone() if you need current position) +// cnt may change if timeslice is ended prematurely or extended, +// so we use SekCycleAim for the actual target +extern unsigned int SekCycleCnt; +extern unsigned int SekCycleAim; + +// number of cycles done (can be checked anywhere) +#define SekCyclesDone() (SekCycleCnt - SekCyclesLeft) + +// burn cycles while not in SekRun() and while in +#define SekCyclesBurn(c) SekCycleCnt += c +#define SekCyclesBurnRun(c) { \ + SekCyclesLeft -= c; \ } -#define SekCyclesBurn(c) SekCycleCnt+=c -#define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // number of cycles done in this frame (can be checked anywhere) -#define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom +// note: sometimes may extend timeslice to delay an irq #define SekEndRun(after) { \ - SekCycleCnt -= SekCyclesLeft - (after); \ - if (SekCycleCnt < 0) SekCycleCnt = 0; \ - SekEndTimeslice(after); \ + SekCycleCnt -= SekCyclesLeft - (after); \ + SekCyclesLeft = after; \ } +extern unsigned int SekCycleCntS68k; +extern unsigned int SekCycleAimS68k; + #define SekEndRunS68k(after) { \ - SekCycleCntS68k -= SekCyclesLeftS68k - (after); \ - if (SekCycleCntS68k < 0) SekCycleCntS68k = 0; \ - SekEndTimesliceS68k(after); \ + if (SekCyclesLeftS68k > (after)) { \ + SekCycleCntS68k -= SekCyclesLeftS68k - (after); \ + SekCyclesLeftS68k = after; \ + } \ } -extern int SekCycleCntS68k; -extern int SekCycleAimS68k; +#define SekCyclesDoneS68k() (SekCycleCntS68k - SekCyclesLeftS68k) -#define SekCyclesResetS68k() { \ - SekCycleCntS68k-=SekCycleAimS68k; \ - SekCycleAimS68k=0; \ -} -#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k) - -#ifdef EMU_CORE_DEBUG -extern int dbg_irq_level; -#undef SekEndTimeslice -#undef SekCyclesBurn -#undef SekEndRun -#undef SekInterrupt -#define SekEndTimeslice(c) -#define SekCyclesBurn(c) c -#define SekEndRun(c) -#define SekInterrupt(irq) dbg_irq_level=irq -#endif +// compare cycles, handling overflows +// check if a > b +#define CYCLES_GT(a, b) \ + ((int)((a) - (b)) > 0) +// check if a >= b +#define CYCLES_GE(a, b) \ + ((int)((a) - (b)) >= 0) // ----------------------- Z80 CPU ----------------------- @@ -190,6 +181,8 @@ extern struct DrZ80 drZ80; #define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles)) #define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles) #define z80_int() drZ80.Z80_IRQ = 1 +#define z80_int() drZ80.Z80_IRQ = 1 +#define z80_nmi() drZ80.Z80IF |= 8 #define z80_cyclesLeft drZ80.cycles #define z80_pc() (drZ80.Z80PC - drZ80.Z80PC_BASE) @@ -200,6 +193,7 @@ extern struct DrZ80 drZ80; #define z80_run(cycles) Cz80_Exec(&CZ80, cycles) #define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles) #define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE) +#define z80_nmi() Cz80_Set_IRQ(&CZ80, IRQ_LINE_NMI, 0) #define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles) #define z80_pc() Cz80_Get_Reg(&CZ80, CZ80_PC) @@ -209,18 +203,20 @@ extern struct DrZ80 drZ80; #define z80_run(cycles) (cycles) #define z80_run_nr(cycles) #define z80_int() +#define z80_nmi() #endif #define Z80_STATE_SIZE 0x60 -extern int z80stopCycle; /* in 68k cycles */ +extern unsigned int last_z80_sync; extern int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */ extern int z80_cycle_aim; extern int z80_scanline; extern int z80_scanline_cycles; /* cycles done until z80_scanline */ #define z80_resetCycles() \ + last_z80_sync = SekCyclesDone(); \ z80_cycle_cnt = z80_cycle_aim = z80_scanline = z80_scanline_cycles = 0; #define z80_cyclesDone() \ @@ -237,27 +233,35 @@ extern SH2 sh2s[2]; #define ssh2 sh2s[1] #ifndef DRC_SH2 -# define ash2_end_run(sh2, after) do { \ - if ((sh2)->icount > (after)) { \ - (sh2)->cycles_timeslice -= (sh2)->icount; \ - (sh2)->icount = after; \ +# define sh2_end_run(sh2, after_) do { \ + if ((sh2)->icount > (after_)) { \ + (sh2)->cycles_timeslice -= (sh2)->icount - (after_); \ + (sh2)->icount = after_; \ } \ } while (0) -# define ash2_cycles_done(sh2) ((sh2)->cycles_timeslice - (sh2)->icount) -# define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc +# define sh2_cycles_left(sh2) (sh2)->icount +# define sh2_burn_cycles(sh2, n) (sh2)->icount -= n +# define sh2_pc(sh2) (sh2)->ppc #else -# define ash2_end_run(sh2, after) do { \ - int left = (sh2)->sr >> 12; \ - if (left > (after)) { \ - (sh2)->cycles_timeslice -= left; \ +# define sh2_end_run(sh2, after_) do { \ + int left_ = (signed int)(sh2)->sr >> 12; \ + if (left_ > (after_)) { \ + (sh2)->cycles_timeslice -= left_ - (after_); \ (sh2)->sr &= 0xfff; \ - (sh2)->sr |= (after) << 12; \ + (sh2)->sr |= (after_) << 12; \ } \ } while (0) -# define ash2_cycles_done(sh2) ((sh2)->cycles_timeslice - ((sh2)->sr >> 12)) -# define sh2_pc(c) (c) ? ssh2.pc : msh2.pc +# define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12) +# define sh2_burn_cycles(sh2, n) (sh2)->sr -= ((n) << 12) +# define sh2_pc(sh2) (sh2)->pc #endif +#define sh2_cycles_done(sh2) ((int)(sh2)->cycles_timeslice - sh2_cycles_left(sh2)) +#define sh2_cycles_done_t(sh2) \ + ((sh2)->m68krcycles_done * 3 + sh2_cycles_done(sh2)) +#define sh2_cycles_done_m68k(sh2) \ + ((sh2)->m68krcycles_done + (sh2_cycles_done(sh2) / 3)) + #define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x] #define sh2_gbr(c) (c) ? ssh2.gbr : msh2.gbr #define sh2_vbr(c) (c) ? ssh2.vbr : msh2.vbr @@ -268,12 +272,24 @@ extern SH2 sh2s[2]; #define sh2_set_vbr(c, v) \ { if (c) ssh2.vbr = v; else msh2.vbr = v; } +#define elprintf_sh2(sh2, w, f, ...) \ + elprintf(w,"%csh2 "f,(sh2)->is_slave?'s':'m',##__VA_ARGS__) + // --------------------------------------------------------- // main oscillator clock which controls timing #define OSC_NTSC 53693100 #define OSC_PAL 53203424 +#define PVD_KILL_A (1 << 0) +#define PVD_KILL_B (1 << 1) +#define PVD_KILL_S_LO (1 << 2) +#define PVD_KILL_S_HI (1 << 3) +#define PVD_KILL_32X (1 << 4) +#define PVD_FORCE_A (1 << 5) +#define PVD_FORCE_B (1 << 6) +#define PVD_FORCE_S (1 << 7) + struct PicoVideo { unsigned char reg[0x20]; @@ -285,7 +301,10 @@ struct PicoVideo unsigned char pending_ints; // pending interrupts: ??VH???? signed char lwrite_cnt; // VDP write count during active display line unsigned short v_counter; // V-counter - unsigned char pad[0x10]; + unsigned short debug; // raw debug register + unsigned char debug_p; // ... parsed: PVD_* + unsigned char addr_u; + unsigned char pad[0x0c]; }; struct PicoMisc @@ -300,7 +319,7 @@ struct PicoMisc unsigned char sram_reg; // 09 SRAM reg. See SRR_* below unsigned short z80_bank68k; // 0a unsigned short pad0; - unsigned char pad1; + unsigned char ncart_in; // 0e !cart_in unsigned char z80_reset; // 0f z80 reset held unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay unsigned short eeprom_addr; // EEPROM address register @@ -317,7 +336,23 @@ struct PicoMS { unsigned char carthw[0x10]; unsigned char io_ctl; - unsigned char pad[0x4f]; + unsigned char nmi_state; + unsigned char pad[0x4e]; +}; + +// emu state and data for the asm code +struct PicoEState +{ + int DrawScanline; + int rendstatus; + void *DrawLineDest; // draw destination + unsigned char *HighCol; + int *HighPreSpr; + void *Pico_video; + void *Pico_vram; + int *PicoOpt; + unsigned char *Draw2FB; + unsigned short HighPal[0x100]; }; // some assembly stuff depend on these, do not touch! @@ -335,11 +370,12 @@ struct Pico unsigned short vsram[0x40]; // 0x22180 unsigned char *rom; // 0x22200 - unsigned int romsize; // 0x22204 + unsigned int romsize; // 0x22204 (on 32bits) struct PicoMisc m; struct PicoVideo video; struct PicoMS ms; + struct PicoEState est; }; // sram @@ -366,9 +402,7 @@ struct PicoSRAM }; // MCD -#include "cd/cd_sys.h" -#include "cd/LC89510.h" -#include "cd/gfx_cd.h" +#define PCM_MIXBUF_LEN ((12500000 / 384) / 50 + 1) struct mcd_pcm { @@ -376,7 +410,7 @@ struct mcd_pcm unsigned char enabled; // reg8 unsigned char cur_ch; unsigned char bank; - int pad1; + unsigned int update_cycles; struct pcm_chan // 08, size 0x10 { @@ -386,52 +420,58 @@ struct mcd_pcm } ch[8]; }; +#define PCD_ST_S68K_RST 1 + struct mcd_misc { - unsigned short hint_vector; - unsigned char busreq; - unsigned char s68k_pend_ints; - unsigned int state_flags; // 04: emu state: reset_pending - unsigned int counter75hz; - unsigned int pad0; - int timer_int3; // 10 - unsigned int timer_stopwatch; - unsigned char bcram_reg; // 18: battery-backed RAM cart register - unsigned char pad2; - unsigned short pad3; - int pad[9]; + unsigned short hint_vector; + unsigned char busreq; // not s68k_regs[1] + unsigned char s68k_pend_ints; + unsigned int state_flags; // 04 + unsigned int stopwatch_base_c; + unsigned short m68k_poll_a; + unsigned short m68k_poll_cnt; + unsigned short s68k_poll_a; + unsigned short s68k_poll_cnt; + unsigned int s68k_poll_clk; + unsigned char bcram_reg; // 18: battery-backed RAM cart register + unsigned char dmna_ret_2m; + unsigned char need_sync; + unsigned char pad3; + int pad4[9]; }; typedef struct { - unsigned char bios[0x20000]; // 000000: 128K - union { // 020000: 512K - unsigned char prg_ram[0x80000]; - unsigned char prg_ram_b[4][0x20000]; - }; - union { // 0a0000: 256K - struct { - unsigned char word_ram2M[0x40000]; - unsigned char unused0[0x20000]; - }; - struct { - unsigned char unused1[0x20000]; - unsigned char word_ram1M[2][0x20000]; - }; - }; - union { // 100000: 64K - unsigned char pcm_ram[0x10000]; - unsigned char pcm_ram_b[0x10][0x1000]; - }; - unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs - unsigned char bram[0x2000]; // 110200: 8K - struct mcd_misc m; // 112200: misc - struct mcd_pcm pcm; // 112240: - _scd_toc TOC; // not to be saved - CDD cdd; - CDC cdc; - _scd scd; - Rot_Comp rot_comp; + unsigned char bios[0x20000]; // 000000: 128K + union { // 020000: 512K + unsigned char prg_ram[0x80000]; + unsigned char prg_ram_b[4][0x20000]; + }; + union { // 0a0000: 256K + struct { + unsigned char word_ram2M[0x40000]; + unsigned char unused0[0x20000]; + }; + struct { + unsigned char unused1[0x20000]; + unsigned char word_ram1M[2][0x20000]; + }; + }; + union { // 100000: 64K + unsigned char pcm_ram[0x10000]; + unsigned char pcm_ram_b[0x10][0x1000]; + }; + unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs + unsigned char bram[0x2000]; // 110200: 8K + struct mcd_misc m; // 112200: misc + struct mcd_pcm pcm; // 112240: + void *cdda_stream; + int cdda_type; + int pcm_mixbuf[PCM_MIXBUF_LEN * 2]; + int pcm_mixpos; + char pcm_mixbuf_dirty; + char pcm_regs_dirty; } mcd_state; // XXX: this will need to be reworked for cart+cd support. @@ -439,6 +479,7 @@ typedef struct // 32X #define P32XS_FM (1<<15) +#define P32XS_nCART (1<< 8) #define P32XS_REN (1<< 7) #define P32XS_nRES (1<< 1) #define P32XS_ADEN (1<< 0) @@ -460,16 +501,13 @@ typedef struct #define P32XV_nFEN (1<< 1) #define P32XV_FS (1<< 0) -#define P32XP_FULL (1<<15) // PWM +#define P32XP_RTP (1<<7) // PWM control +#define P32XP_FULL (1<<15) // PWM pulse #define P32XP_EMPTY (1<<14) -#define P32XF_68KPOLL (1 << 0) -#define P32XF_MSH2POLL (1 << 1) -#define P32XF_SSH2POLL (1 << 2) -#define P32XF_68KVPOLL (1 << 3) -#define P32XF_MSH2VPOLL (1 << 4) -#define P32XF_SSH2VPOLL (1 << 5) -#define P32XF_PWM_PEND (1 << 6) +#define P32XF_68KCPOLL (1 << 0) +#define P32XF_68KVPOLL (1 << 1) +#define P32XF_Z80_32X_IO (1 << 7) // z80 does 32x io #define P32XI_VRES (1 << 14/2) // IRL/2 #define P32XI_VINT (1 << 12/2) @@ -480,13 +518,13 @@ typedef struct // peripheral reg access #define PREG8(regs,offs) ((unsigned char *)regs)[offs ^ 3] -// real one is 4*2, but we use more because we don't lockstep -#define DMAC_FIFO_LEN (4*4) +#define DMAC_FIFO_LEN (4*2) #define PWM_BUFF_LEN 1024 // in one channel samples #define SH2_DRCBLK_RAM_SHIFT 1 #define SH2_DRCBLK_DA_SHIFT 1 +#define SH2_READ_SHIFT 25 #define SH2_WRITE_SHIFT 25 struct Pico32x @@ -501,12 +539,17 @@ struct Pico32x unsigned char sh2irqi[2]; // individual unsigned int sh2irqs; // common irqs unsigned short dmac_fifo[DMAC_FIFO_LEN]; - unsigned int dmac_ptr; - unsigned int pwm_irq_sample_cnt; + unsigned int pad[4]; + unsigned int dmac0_fifo_ptr; + unsigned short vdp_fbcr_fake; + unsigned short pad2; unsigned char comm_dirty_68k; unsigned char comm_dirty_sh2; - unsigned short pad; - unsigned int reserved[8]; + unsigned char pwm_irq_cnt; + unsigned char pad1; + unsigned short pwm_p[2]; // pwm pos in fifo + unsigned int pwm_cycle_p; // pwm play cursor (32x cycles) + unsigned int reserved[6]; }; struct Pico32xMem @@ -520,16 +563,22 @@ struct Pico32xMem unsigned char m68k_rom[0x100]; unsigned char m68k_rom_bank[0x10000]; // M68K_BANK_SIZE }; - unsigned char data_array[2][0x1000]; // cache in SH2s (can be used as RAM) #ifdef DRC_SH2 unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)]; #endif - unsigned char sh2_rom_m[0x800]; - unsigned char sh2_rom_s[0x400]; + union { + unsigned char b[0x800]; + unsigned short w[0x800/2]; + } sh2_rom_m; + union { + unsigned char b[0x400]; + unsigned short w[0x400/2]; + } sh2_rom_s; unsigned short pal[0x100]; unsigned short pal_native[0x100]; // converted to native (for renderer) - unsigned int sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame + signed short pwm_current[2]; // current converted samples + unsigned short pwm_fifo[2][4]; // [0] - current raw, others - fifo entries }; // area.c @@ -553,19 +602,20 @@ extern void (*PicoCartUnloadHook)(void); int CM_compareRun(int cyc, int is_sub); // draw.c +void PicoDrawInit(void); PICO_INTERNAL void PicoFrameStart(void); void PicoDrawSync(int to, int blank_last_line); -void BackFill(int reg7, int sh); -void FinalizeLine555(int sh, int line); +void BackFill(int reg7, int sh, struct PicoEState *est); +void FinalizeLine555(int sh, int line, struct PicoEState *est); extern int (*PicoScanBegin)(unsigned int num); extern int (*PicoScanEnd)(unsigned int num); -extern int DrawScanline; #define MAX_LINE_SPRITES 29 extern unsigned char HighLnSpr[240][3 + MAX_LINE_SPRITES]; extern void *DrawLineDestBase; extern int DrawLineDestIncrement; // draw2.c +void PicoDraw2Init(void); PICO_INTERNAL void PicoFrameFull(); // mode4.c @@ -584,9 +634,48 @@ void PicoWrite16_io(unsigned int a, unsigned int d); // pico/memory.c PICO_INTERNAL void PicoMemSetupPico(void); +// cd/cdc.c +void cdc_init(void); +void cdc_reset(void); +int cdc_context_save(unsigned char *state); +int cdc_context_load(unsigned char *state); +int cdc_context_load_old(unsigned char *state); +void cdc_dma_update(void); +int cdc_decoder_update(unsigned char header[4]); +void cdc_reg_w(unsigned char data); +unsigned char cdc_reg_r(void); +unsigned short cdc_host_r(void); + +// cd/cdd.c +void cdd_reset(void); +int cdd_context_save(unsigned char *state); +int cdd_context_load(unsigned char *state); +int cdd_context_load_old(unsigned char *state); +void cdd_read_data(unsigned char *dst); +void cdd_read_audio(unsigned int samples); +void cdd_update(void); +void cdd_process(void); + +// cd/cd_image.c +int load_cd_image(const char *cd_img_name, int *type); + +// cd/gfx.c +void gfx_init(void); +void gfx_start(unsigned int base); +void gfx_update(unsigned int cycles); +int gfx_context_save(unsigned char *state); +int gfx_context_load(const unsigned char *state); + +// cd/gfx_dma.c +void DmaSlowCell(unsigned int source, unsigned int a, int len, unsigned char inc); + // cd/memory.c PICO_INTERNAL void PicoMemSetupCD(void); -void PicoMemStateLoaded(void); +unsigned int PicoRead8_mcd_io(unsigned int a); +unsigned int PicoRead16_mcd_io(unsigned int a); +void PicoWrite8_mcd_io(unsigned int a, unsigned int d); +void PicoWrite16_mcd_io(unsigned int a, unsigned int d); +void pcd_state_loaded_mem(void); // pico.c extern struct Pico Pico; @@ -598,15 +687,45 @@ extern void (*PicoResetHook)(void); extern void (*PicoLineHook)(void); PICO_INTERNAL int CheckDMA(void); PICO_INTERNAL void PicoDetectRegion(void); -PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done); +PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done); + +// cd/mcd.c +#define PCDS_IEN1 (1<<1) +#define PCDS_IEN2 (1<<2) +#define PCDS_IEN3 (1<<3) +#define PCDS_IEN4 (1<<4) +#define PCDS_IEN5 (1<<5) +#define PCDS_IEN6 (1<<6) -// cd/pico.c PICO_INTERNAL void PicoInitMCD(void); PICO_INTERNAL void PicoExitMCD(void); PICO_INTERNAL void PicoPowerMCD(void); PICO_INTERNAL int PicoResetMCD(void); PICO_INTERNAL void PicoFrameMCD(void); +enum pcd_event { + PCD_EVENT_CDC, + PCD_EVENT_TIMER3, + PCD_EVENT_GFX, + PCD_EVENT_DMA, + PCD_EVENT_COUNT, +}; +extern unsigned int pcd_event_times[PCD_EVENT_COUNT]; +void pcd_event_schedule(unsigned int now, enum pcd_event event, int after); +void pcd_event_schedule_s68k(enum pcd_event event, int after); +void pcd_prepare_frame(void); +unsigned int pcd_cycles_m68k_to_s68k(unsigned int c); +int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync); +void pcd_run_cpus(int m68k_cycles); +void pcd_soft_reset(void); +void pcd_state_loaded(void); + +// cd/pcm.c +void pcd_pcm_sync(unsigned int to); +void pcd_pcm_update(int *buffer, int length, int stereo); +void pcd_pcm_write(unsigned int a, unsigned int d); +unsigned int pcd_pcm_read(unsigned int a); + // pico/pico.c PICO_INTERNAL void PicoInitPico(void); PICO_INTERNAL void PicoReratePico(void); @@ -626,20 +745,27 @@ PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub); void SekStepM68k(void); void SekInitIdleDet(void); void SekFinishIdleDet(void); +#if defined(CPU_CMP_R) || defined(CPU_CMP_W) +void SekTrace(int is_s68k); +#else +#define SekTrace(x) +#endif // cd/sek.c PICO_INTERNAL void SekInitS68k(void); PICO_INTERNAL int SekResetS68k(void); PICO_INTERNAL int SekInterruptS68k(int irq); +void SekInterruptClearS68k(int irq); // sound/sound.c -PICO_INTERNAL void cdda_start_play(); extern short cdda_out_buffer[2*1152]; extern int PsndLen_exc_cnt; extern int PsndLen_exc_add; extern int timer_a_next_oflow, timer_a_step; // in z80 cycles extern int timer_b_next_oflow, timer_b_step; +void cdda_start_play(int lba_base, int lba_offset, int lb_len); + void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new); void ym2612_pack_state(void); void ym2612_unpack_state(void); @@ -664,16 +790,17 @@ void ym2612_unpack_state(void); // videoport.c +extern int line_base_cycles; PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d); PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a); PICO_INTERNAL_ASM unsigned int PicoVideoRead8(unsigned int a); -extern int (*PicoDmaHook)(unsigned int source, int len, unsigned short **srcp, unsigned short **limitp); +extern int (*PicoDmaHook)(unsigned int source, int len, unsigned short **base, unsigned int *mask); // misc.c PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count); PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count); -PICO_INTERNAL_ASM void memcpy32(int *dest, int *src, int count); // 32bit word count -PICO_INTERNAL_ASM void memset32(int *dest, int c, int count); +PICO_INTERNAL_ASM void memcpy32(void *dest, const void *src, int count); // 32bit word count +PICO_INTERNAL_ASM void memset32(void *dest, int c, int count); // eeprom.c void EEPROM_write8(unsigned int a, unsigned int d); @@ -691,9 +818,6 @@ PICO_INTERNAL void z80_exit(void); PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m); PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m); -// cd/buffering.c -PICO_INTERNAL void PicoCDBufferRead(void *dest, int lba); - // sound/sound.c PICO_INTERNAL void PsndReset(void); PICO_INTERNAL void PsndDoDAC(int line_to); @@ -725,9 +849,10 @@ extern struct Pico32x Pico32x; enum p32x_event { P32X_EVENT_PWM, P32X_EVENT_FILLEND, + P32X_EVENT_HINT, P32X_EVENT_COUNT, }; -extern unsigned int event_times[P32X_EVENT_COUNT]; +extern unsigned int p32x_event_times[P32X_EVENT_COUNT]; void Pico32xInit(void); void PicoPower32x(void); @@ -737,9 +862,14 @@ void PicoUnload32x(void); void PicoFrame32x(void); void Pico32xStateLoaded(int is_early); void p32x_sync_sh2s(unsigned int m68k_target); -void p32x_update_irls(int nested_call); +void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target); +void p32x_update_irls(SH2 *active_sh2, int m68k_cycles); +void p32x_trigger_irq(SH2 *sh2, int m68k_cycles, unsigned int mask); +void p32x_update_cmd_irq(SH2 *sh2, int m68k_cycles); void p32x_reset_sh2s(void); -void p32x_event_schedule(enum p32x_event event, unsigned int now, int after); +void p32x_event_schedule(unsigned int now, enum p32x_event event, int after); +void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after); +void p32x_schedule_hint(SH2 *sh2, int m68k_cycles); // 32x/memory.c struct Pico32xMem *Pico32xMem; @@ -750,10 +880,12 @@ void PicoWrite16_32x(unsigned int a, unsigned int d); void PicoMemSetup32x(void); void Pico32xSwapDRAM(int b); void Pico32xMemStateLoaded(void); -void p32x_poll_event(int cpu_mask, int is_vdp); +void p32x_m68k_poll_event(unsigned int flags); +void p32x_sh2_poll_event(SH2 *sh2, unsigned int flags, unsigned int m68k_cycles); // 32x/draw.c -void FinalizeLine32xRGB555(int sh, int line); +void PicoDrawSetOutFormat32x(pdso_t which, int use_32x_line_mode); +void FinalizeLine32xRGB555(int sh, int line, struct PicoEState *est); void PicoDraw32xLayer(int offs, int lines, int mdbg); void PicoDraw32xLayerMdOnly(int offs, int lines); extern int (*PicoScan32xBegin)(unsigned int num); @@ -766,12 +898,31 @@ enum { extern int Pico32xDrawMode; // 32x/pwm.c -unsigned int p32x_pwm_read16(unsigned int a); -void p32x_pwm_write16(unsigned int a, unsigned int d); +unsigned int p32x_pwm_read16(unsigned int a, SH2 *sh2, + unsigned int m68k_cycles); +void p32x_pwm_write16(unsigned int a, unsigned int d, + SH2 *sh2, unsigned int m68k_cycles); void p32x_pwm_update(int *buf32, int length, int stereo); -void p32x_timers_do(unsigned int cycles); +void p32x_pwm_ctl_changed(void); +void p32x_pwm_schedule(unsigned int m68k_now); +void p32x_pwm_schedule_sh2(SH2 *sh2); +void p32x_pwm_sync_to_sh2(SH2 *sh2); +void p32x_pwm_irq_event(unsigned int m68k_now); +void p32x_pwm_state_loaded(void); + +// 32x/sh2soc.c +void p32x_dreq0_trigger(void); +void p32x_dreq1_trigger(void); void p32x_timers_recalc(void); -void p32x_pwm_schedule(unsigned int now); +void p32x_timers_do(unsigned int m68k_slice); +void sh2_peripheral_reset(SH2 *sh2); +unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2); +unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2); +unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2); +void REGPARM(3) sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2); +void REGPARM(3) sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2); +void REGPARM(3) sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2); + #else #define Pico32xInit() #define PicoPower32x() @@ -779,7 +930,6 @@ void p32x_pwm_schedule(unsigned int now); #define PicoFrame32x() #define PicoUnload32x() #define Pico32xStateLoaded() -#define PicoDraw32xSetFrameMode(...) #define FinalizeLine32xRGB555 NULL #define p32x_pwm_update(...) #define p32x_timers_recalc() @@ -797,7 +947,11 @@ static __inline int isspace_(int c) // emulation event logging #ifndef EL_LOGMASK -#define EL_LOGMASK 0 +# ifdef __x86_64__ // HACK +# define EL_LOGMASK (EL_STATUS|EL_IDLE|EL_ANOMALY) +# else +# define EL_LOGMASK (EL_STATUS) +# endif #endif #define EL_HVCNT 0x00000001 /* hv counter reads */ @@ -821,6 +975,8 @@ static __inline int isspace_(int c) #define EL_CDREG3 0x00040000 /* MCD: register 3 only */ #define EL_32X 0x00080000 #define EL_PWM 0x00100000 /* 32X PWM stuff (LOTS of output) */ +#define EL_32XP 0x00200000 /* 32X peripherals */ +#define EL_CD 0x00400000 /* MCD */ #define EL_STATUS 0x40000000 /* status messages */ #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */ @@ -848,6 +1004,45 @@ do { \ #define pprof_end_sub(...) #endif +#ifdef EVT_LOG +enum evt { + EVT_FRAME_START, + EVT_NEXT_LINE, + EVT_RUN_START, + EVT_RUN_END, + EVT_POLL_START, + EVT_POLL_END, + EVT_CNT +}; + +enum evt_cpu { + EVT_M68K, + EVT_S68K, + EVT_MSH2, + EVT_SSH2, + EVT_CPU_CNT +}; + +void pevt_log(unsigned int cycles, enum evt_cpu c, enum evt e); +void pevt_dump(void); + +#define pevt_log_m68k(e) \ + pevt_log(SekCyclesDone(), EVT_M68K, e) +#define pevt_log_m68k_o(e) \ + pevt_log(SekCyclesDone(), EVT_M68K, e) +#define pevt_log_sh2(sh2, e) \ + pevt_log(sh2_cycles_done_m68k(sh2), EVT_MSH2 + (sh2)->is_slave, e) +#define pevt_log_sh2_o(sh2, e) \ + pevt_log((sh2)->m68krcycles_done, EVT_MSH2 + (sh2)->is_slave, e) +#else +#define pevt_log(c, e) +#define pevt_log_m68k(e) +#define pevt_log_m68k_o(e) +#define pevt_log_sh2(sh2, e) +#define pevt_log_sh2_o(sh2, e) +#define pevt_dump() +#endif + // misc #ifdef _MSC_VER #define cdprintf @@ -855,7 +1050,7 @@ do { \ #define cdprintf(x...) #endif -#ifdef __i386__ +#if defined(__GNUC__) && defined(__i386__) #define REGPARM(x) __attribute__((regparm(x))) #else #define REGPARM(x)