From: notaz Date: Sun, 20 Sep 2009 21:05:58 +0000 (+0000) Subject: 32x: hook slave sh2, BIOS passes (not much else): X-Git-Tag: v1.85~263 X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=picodrive.git;a=commitdiff_plain;h=b78efee2b2213cf62a1b8a3b7a5adf05e39b4e4e 32x: hook slave sh2, BIOS passes (not much else): git-svn-id: file:///home/notaz/opt/svn/PicoDrive@787 be3aeb3a-fb24-0410-a615-afba39da0efa --- diff --git a/cpu/sh2mame/sh2.h b/cpu/sh2mame/sh2.h index 97520f3..b83a9c4 100644 --- a/cpu/sh2mame/sh2.h +++ b/cpu/sh2mame/sh2.h @@ -45,16 +45,16 @@ typedef struct UINT32 test_irq; int pending_irq; - void (*irq_callback)(int level); + void (*irq_callback)(int id, int level); + int is_slave; // XXX: unused, will we ever use? int internal_irq_level; - int is_slave; } SH2; extern int sh2_icount; -void sh2_init(SH2 *sh2); +void sh2_init(SH2 *sh2, int is_slave); void sh2_reset(SH2 *sh2); int sh2_execute(SH2 *sh2_, int cycles); void sh2_irl_irq(SH2 *sh2, int level); diff --git a/cpu/sh2mame/sh2pico.c b/cpu/sh2mame/sh2pico.c index ac3df3e..414985c 100644 --- a/cpu/sh2mame/sh2pico.c +++ b/cpu/sh2mame/sh2pico.c @@ -9,19 +9,19 @@ typedef unsigned short UINT16; typedef unsigned char UINT8; // pico memhandlers -unsigned int p32x_sh2_read8(unsigned int a); -unsigned int p32x_sh2_read16(unsigned int a); -unsigned int p32x_sh2_read32(unsigned int a); -void p32x_sh2_write8(unsigned int a, unsigned int d); -void p32x_sh2_write16(unsigned int a, unsigned int d); -void p32x_sh2_write32(unsigned int a, unsigned int d); - -#define RB p32x_sh2_read8 -#define RW p32x_sh2_read16 -#define RL p32x_sh2_read32 -#define WB p32x_sh2_write8 -#define WW p32x_sh2_write16 -#define WL p32x_sh2_write32 +unsigned int p32x_sh2_read8(unsigned int a, int id); +unsigned int p32x_sh2_read16(unsigned int a, int id); +unsigned int p32x_sh2_read32(unsigned int a, int id); +void p32x_sh2_write8(unsigned int a, unsigned int d, int id); +void p32x_sh2_write16(unsigned int a, unsigned int d, int id); +void p32x_sh2_write32(unsigned int a, unsigned int d, int id); + +#define RB(a) p32x_sh2_read8(a,sh2->is_slave) +#define RW(a) p32x_sh2_read16(a,sh2->is_slave) +#define RL(a) p32x_sh2_read32(a,sh2->is_slave) +#define WB(a,d) p32x_sh2_write8(a,d,sh2->is_slave) +#define WW(a,d) p32x_sh2_write16(a,d,sh2->is_slave) +#define WL(a,d) p32x_sh2_write32(a,d,sh2->is_slave) // some stuff from sh2comn.h #define T 0x00000001 @@ -114,9 +114,10 @@ int sh2_execute(SH2 *sh2_, int cycles) return cycles - sh2_icount; } -void sh2_init(SH2 *sh2) +void sh2_init(SH2 *sh2, int is_slave) { memset(sh2, 0, sizeof(*sh2)); + sh2->is_slave = is_slave; } void sh2_irl_irq(SH2 *sh2, int level) @@ -129,7 +130,7 @@ void sh2_irl_irq(SH2 *sh2, int level) /* masked */ return; - sh2->irq_callback(level); + sh2->irq_callback(sh2->is_slave, level); vector = 64 + level/2; sh2->r[15] -= 4; diff --git a/pico/32x/32x.c b/pico/32x/32x.c index ee561ae..20a942a 100644 --- a/pico/32x/32x.c +++ b/pico/32x/32x.c @@ -3,10 +3,10 @@ struct Pico32x Pico32x; -static void sh2_irq_cb(int level) +static void sh2_irq_cb(int id, int level) { // diagnostic for now - elprintf(EL_32X, "sh2 ack %d @ %08x", level, ash2_pc()); + elprintf(EL_32X, "%csh2 ack %d @ %08x", id ? 's' : 'm', level, sh2_pc(id)); } void p32x_update_irls(void) @@ -39,11 +39,11 @@ void Pico32xStartup(void) PicoAHW |= PAHW_32X; PicoMemSetup32x(); - sh2_init(&msh2); + sh2_init(&msh2, 0); msh2.irq_callback = sh2_irq_cb; sh2_reset(&msh2); - sh2_init(&ssh2); + sh2_init(&ssh2, 1); ssh2.irq_callback = sh2_irq_cb; sh2_reset(&ssh2); @@ -127,7 +127,9 @@ static __inline void SekRunM68k(int cyc) #define PICO_32X #define RUN_SH2S \ if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \ - sh2_execute(&msh2, SH2_LINE_CYCLES); + sh2_execute(&msh2, SH2_LINE_CYCLES); \ + if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \ + sh2_execute(&ssh2, SH2_LINE_CYCLES); #include "../pico_cmn.c" @@ -141,12 +143,4 @@ void PicoFrame32x(void) PicoFrameStart(); PicoFrameHints(); - - // hack - if (Pico.m.frame_count == 83) { - Pico32xMem->sdram[0x3610 ^ 1] = 'R'; - Pico32xMem->sdram[0x3611 ^ 1] = 'E'; - Pico32xMem->sdram[0x3612 ^ 1] = 'D'; - Pico32xMem->sdram[0x3613 ^ 1] = 'Y'; - } } diff --git a/pico/32x/memory.c b/pico/32x/memory.c index 7e2f2bd..ff3c5a4 100644 --- a/pico/32x/memory.c +++ b/pico/32x/memory.c @@ -13,13 +13,16 @@ static void bank_switch(int b); #define POLL_THRESHOLD 6 struct poll_det { - int addr, pc, cnt; + int addr, pc, cnt, flag; }; -static struct poll_det m68k_poll, msh2_poll; +static struct poll_det m68k_poll, sh2_poll[2]; -static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int flag) +static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int is_vdp) { - int ret = 0; + int ret = 0, flag = pd->flag; + + if (is_vdp) + flag <<= 3; if (a - 2 <= pd->addr && pd->addr <= a + 2 && pd->pc == pc) { pd->cnt++; @@ -40,9 +43,11 @@ static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int flag) return ret; } -static int p32x_poll_undetect(struct poll_det *pd, int flag) +static int p32x_poll_undetect(struct poll_det *pd, int is_vdp) { - int ret = 0; + int ret = 0, flag = pd->flag; + if (is_vdp) + flag <<= 3; if (pd->cnt > POLL_THRESHOLD) ret = 1; pd->addr = pd->cnt = 0; @@ -52,11 +57,12 @@ static int p32x_poll_undetect(struct poll_det *pd, int flag) void p32x_poll_event(int is_vdp) { - p32x_poll_undetect(&msh2_poll, is_vdp ? P32XF_MSH2VPOLL : P32XF_MSH2POLL); + p32x_poll_undetect(&sh2_poll[0], is_vdp); + p32x_poll_undetect(&sh2_poll[1], is_vdp); } // SH2 faking -#define FAKE_SH2 +//#define FAKE_SH2 int p32x_csum_faked; #ifdef FAKE_SH2 static const u16 comm_fakevals[] = { @@ -103,9 +109,9 @@ static void dma_68k2sh2_do(void) elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen); for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) { - extern void p32x_sh2_write16(u32 a, u32 d); + extern void p32x_sh2_write16(u32 a, u32 d, int id); elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen); - p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i]); + p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0); dmac0->dar0 += 2; dmac0->tcr0--; (*dreqlen)--; @@ -117,10 +123,11 @@ static void dma_68k2sh2_do(void) Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete if (dmac0->tcr0 == 0) dmac0->chcr0 |= 2; // DMA has ended normally - p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL); + p32x_poll_undetect(&m68k_poll, 0); } // ------------------------------------------------------------------ +// 68k regs static u32 p32x_reg_read16(u32 a) { @@ -130,7 +137,7 @@ static u32 p32x_reg_read16(u32 a) if ((a & 0x30) == 0x20) return sh2_comm_faker(a); #else - if (p32x_poll_detect(&m68k_poll, a, SekPc, P32XF_68KPOLL)) { + if (p32x_poll_detect(&m68k_poll, a, SekPc, 0)) { SekEndRun(16); } #endif @@ -166,6 +173,10 @@ static void p32x_reg_write8(u32 a, u32 d) Pico32x.sh2irqi[0] |= P32XI_CMD; p32x_update_irls(); } + if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) { + Pico32x.sh2irqi[1] |= P32XI_CMD; + p32x_update_irls(); + } break; case 5: // bank d &= 7; @@ -218,8 +229,8 @@ static void p32x_reg_write16(u32 a, u32 d) // comm port else if ((a & 0x30) == 0x20 && r[a / 2] != d) { r[a / 2] = d; - if (p32x_poll_undetect(&msh2_poll, P32XF_MSH2POLL)) - // if SH2 is busy waiting, it needs to see the result ASAP + if (p32x_poll_undetect(&sh2_poll[0], 0) || p32x_poll_undetect(&sh2_poll[1], 0)) + // if some SH2 is busy waiting, it needs to see the result ASAP SekEndRun(16); return; } @@ -242,7 +253,7 @@ static void p32x_vdp_write8(u32 a, u32 d) a &= 0x0f; // for FEN checks between writes - msh2_poll.cnt = 0; + sh2_poll[0].cnt = 0; // TODO: verify what's writeable switch (a) { @@ -272,14 +283,15 @@ static void p32x_vdp_write16(u32 a, u32 d) // ------------------------------------------------------------------ // SH2 regs -static u32 p32x_sh2reg_read16(u32 a) + +static u32 p32x_sh2reg_read16(u32 a, int cpuid) { u16 *r = Pico32x.regs; a &= 0xfe; // ? switch (a) { case 0x00: // adapter/irq ctl - return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[0]; + return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[cpuid]; case 0x10: // DREQ len return r[a / 2]; } @@ -291,22 +303,23 @@ static u32 p32x_sh2reg_read16(u32 a) return 0; } -static void p32x_sh2reg_write8(u32 a, u32 d) +static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid) { a &= 0xff; if (a == 1) { - Pico32x.sh2irq_mask[0] = d & 0x0f; + Pico32x.sh2irq_mask[cpuid] = d & 0x0f; p32x_update_irls(); } } -static void p32x_sh2reg_write16(u32 a, u32 d) +static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid) { a &= 0xfe; if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) { - Pico32x.regs[a/2] = d; - p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL); + Pico32x.regs[a / 2] = d; + p32x_poll_undetect(&m68k_poll, 0); + p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0); return; } @@ -314,38 +327,38 @@ static void p32x_sh2reg_write16(u32 a, u32 d) case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls; case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls; case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls; - case 0x1a: Pico32x.sh2irqi[0] &= ~P32XI_CMD; goto irls; + case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls; case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls; } - p32x_sh2reg_write8(a | 1, d); + p32x_sh2reg_write8(a | 1, d, cpuid); return; irls: p32x_update_irls(); } -static u32 sh2_peripheral_read(u32 a) +static u32 sh2_peripheral_read(u32 a, int id) { u32 d; a &= 0x1fc; d = Pico32xMem->sh2_peri_regs[0][a / 4]; - elprintf(EL_32X, "sh2 peri r32 [%08x] %08x @%06x", a, d, ash2_pc()); + elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); return d; } -static void sh2_peripheral_write(u32 a, u32 d) +static void sh2_peripheral_write(u32 a, u32 d, int id) { unsigned int *r = Pico32xMem->sh2_peri_regs[0]; - elprintf(EL_32X, "sh2 peri w32 [%08x] %08x @%06x", a, d, ash2_pc()); + elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); a &= 0x1fc; r[a / 4] = d; if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) { elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x", - dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, ash2_pc()); + dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id)); dmac0->tcr0 &= 0xffffff; // DREQ is only sent after first 4 words are written. // we do multiple of 4 words to avoid messing up alignment @@ -546,13 +559,15 @@ static void bank_switch(int b) // SH2 // ----------------------------------------------------------------- -u32 p32x_sh2_read8(u32 a) +u32 p32x_sh2_read8(u32 a, int id) { - int pd = 0; + int pd_vdp = 0; u32 d = 0; - if (a < sizeof(Pico32xMem->sh2_rom_m)) + if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m)) return Pico32xMem->sh2_rom_m[a ^ 1]; + if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s)) + return Pico32xMem->sh2_rom_s[a ^ 1]; if ((a & 0x0ffc0000) == 0x06000000) return Pico32xMem->sdram[(a & 0x3ffff) ^ 1]; @@ -561,15 +576,17 @@ u32 p32x_sh2_read8(u32 a) if ((a & 0x003fffff) < Pico.romsize) return Pico.rom[(a & 0x3fffff) ^ 1]; + if ((a & ~0xfff) == 0xc0000000) + return Pico32xMem->data_array[id][(a & 0xfff) ^ 1]; + if ((a & 0x0fffff00) == 0x4000) { - d = p32x_sh2reg_read16(a); - pd = P32XF_MSH2POLL; + d = p32x_sh2reg_read16(a, id); goto out_pd; } if ((a & 0x0fffff00) == 0x4100) { d = p32x_vdp_read16(a); - pd = P32XF_MSH2VPOLL; + pd_vdp = 1; goto out_pd; } @@ -578,11 +595,12 @@ u32 p32x_sh2_read8(u32 a) goto out_16to8; } - elprintf(EL_UIO, "sh2 unmapped r8 [%08x] %02x @%06x", a, d, ash2_pc()); + elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x", + id ? 's' : 'm', a, d, sh2_pc(id)); return d; out_pd: - if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd)) + if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), pd_vdp)) ash2_end_run(8); out_16to8: @@ -591,17 +609,20 @@ out_16to8: else d >>= 8; - elprintf(EL_32X, "sh2 r8 [%08x] %02x @%06x", a, d, ash2_pc()); + elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x", + id ? 's' : 'm', a, d, sh2_pc(id)); return d; } -u32 p32x_sh2_read16(u32 a) +u32 p32x_sh2_read16(u32 a, int id) { - int pd = 0; + int pd_vdp = 0; u32 d = 0; - if (a < sizeof(Pico32xMem->sh2_rom_m)) + if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m)) return *(u16 *)(Pico32xMem->sh2_rom_m + a); + if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s)) + return *(u16 *)(Pico32xMem->sh2_rom_s + a); if ((a & 0x0ffc0000) == 0x06000000) return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2]; @@ -610,15 +631,17 @@ u32 p32x_sh2_read16(u32 a) if ((a & 0x003fffff) < Pico.romsize) return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2]; + if ((a & ~0xfff) == 0xc0000000) + return ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2]; + if ((a & 0x0fffff00) == 0x4000) { - d = p32x_sh2reg_read16(a); - pd = P32XF_MSH2POLL; + d = p32x_sh2reg_read16(a, id); goto out_pd; } if ((a & 0x0fffff00) == 0x4100) { d = p32x_vdp_read16(a); - pd = P32XF_MSH2VPOLL; + pd_vdp = 1; goto out_pd; } @@ -627,31 +650,34 @@ u32 p32x_sh2_read16(u32 a) goto out; } - elprintf(EL_UIO, "sh2 unmapped r16 [%08x] %04x @%06x", a, d, ash2_pc()); + elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x", + id ? 's' : 'm', a, d, sh2_pc(id)); return d; out_pd: - if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd)) + if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), pd_vdp)) ash2_end_run(8); out: - elprintf(EL_32X, "sh2 r16 [%08x] %04x @%06x", a, d, ash2_pc()); + elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x", + id ? 's' : 'm', a, d, sh2_pc(id)); return d; } -u32 p32x_sh2_read32(u32 a) +u32 p32x_sh2_read32(u32 a, int id) { if ((a & 0xfffffe00) == 0xfffffe00) - return sh2_peripheral_read(a); + return sh2_peripheral_read(a, id); // elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc()); - return (p32x_sh2_read16(a) << 16) | p32x_sh2_read16(a + 2); + return (p32x_sh2_read16(a, id) << 16) | p32x_sh2_read16(a + 2, id); } -void p32x_sh2_write8(u32 a, u32 d) +void p32x_sh2_write8(u32 a, u32 d, int id) { if ((a & 0x0ffffc00) == 0x4000) - elprintf(EL_32X, "sh2 w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc()); + elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x", + id ? 's' : 'm', a, d & 0xff, sh2_pc(id)); if ((a & 0x0ffc0000) == 0x06000000) { Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d; @@ -664,29 +690,41 @@ void p32x_sh2_write8(u32 a, u32 d) return; } + if ((a & ~0xfff) == 0xc0000000) { + Pico32xMem->data_array[id][(a & 0xfff) ^ 1] = d; + return; + } + if ((a & 0x0fffff00) == 0x4100) { p32x_vdp_write8(a, d); return; } if ((a & 0x0fffff00) == 0x4000) { - p32x_sh2reg_write8(a, d); + p32x_sh2reg_write8(a, d, id); return; } - elprintf(EL_UIO, "sh2 unmapped w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc()); + elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x", + id ? 's' : 'm', a, d & 0xff, sh2_pc(id)); } -void p32x_sh2_write16(u32 a, u32 d) +void p32x_sh2_write16(u32 a, u32 d, int id) { if ((a & 0x0ffffc00) == 0x4000) - elprintf(EL_32X, "sh2 w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc()); + elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x", + id ? 's' : 'm', a, d & 0xffff, sh2_pc(id)); if ((a & 0x0ffc0000) == 0x06000000) { ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d; return; } + if ((a & ~0xfff) == 0xc0000000) { + ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2] = d; + return; + } + if ((a & 0x0ffe0000) == 0x04000000) { Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2] = d; return; @@ -704,23 +742,23 @@ void p32x_sh2_write16(u32 a, u32 d) } if ((a & 0x0fffff00) == 0x4000) { - p32x_sh2reg_write16(a, d); + p32x_sh2reg_write16(a, d, id); return; } - elprintf(EL_UIO, "sh2 unmapped w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc()); + elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x", + id ? 's' : 'm', a, d & 0xffff, sh2_pc(id)); } -void p32x_sh2_write32(u32 a, u32 d) +void p32x_sh2_write32(u32 a, u32 d, int id) { if ((a & 0xfffffe00) == 0xfffffe00) { - sh2_peripheral_write(a, d); + sh2_peripheral_write(a, d, id); return; } -// elprintf(EL_UIO, "sh2 w32 [%08x] %08x @%06x", a, d, ash2_pc()); - p32x_sh2_write16(a, d >> 16); - p32x_sh2_write16(a + 2, d); + p32x_sh2_write16(a, d >> 16, id); + p32x_sh2_write16(a + 2, d, id); } #define HWSWAP(x) (((x) << 16) | ((x) >> 16)) @@ -766,16 +804,29 @@ void PicoMemSetup32x(void) FILE *f = fopen("32X_M_BIOS.BIN", "rb"); int i; if (f == NULL) { - printf("missing BIOS\n"); + printf("missing 32X_M_BIOS.BIN\n"); exit(1); } fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f); fclose(f); + f = fopen("32X_S_BIOS.BIN", "rb"); + if (f == NULL) { + printf("missing 32X_S_BIOS.BIN\n"); + exit(1); + } + fread(Pico32xMem->sh2_rom_s, 1, sizeof(Pico32xMem->sh2_rom_s), f); + fclose(f); + // byteswap for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) { int t = Pico32xMem->sh2_rom_m[i]; Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1]; Pico32xMem->sh2_rom_m[i + 1] = t; } + for (i = 0; i < sizeof(Pico32xMem->sh2_rom_s); i += 2) { + int t = Pico32xMem->sh2_rom_s[i]; + Pico32xMem->sh2_rom_s[i] = Pico32xMem->sh2_rom_s[i + 1]; + Pico32xMem->sh2_rom_s[i + 1] = t; + } } // cartridge area becomes unmapped @@ -802,5 +853,10 @@ void PicoMemSetup32x(void) // 32X ROM (banked) bank_switch(0); + + // setup poll detector + m68k_poll.flag = P32XF_68KPOLL; + sh2_poll[0].flag = P32XF_MSH2POLL; + sh2_poll[1].flag = P32XF_SSH2POLL; } diff --git a/pico/pico_int.h b/pico/pico_int.h index afcc838..5b7f2f4 100644 --- a/pico/pico_int.h +++ b/pico/pico_int.h @@ -231,7 +231,6 @@ typedef void (z80_write_f)(unsigned int a, unsigned char data); #include "cpu/sh2mame/sh2.h" SH2 msh2, ssh2; -#define ash2_pc() msh2.ppc #define ash2_end_run(after) sh2_icount = after #define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc @@ -453,8 +452,9 @@ struct Pico32x struct Pico32xMem { unsigned char sdram[0x40000]; - unsigned short dram[2][0x20000/2]; // AKA fb - unsigned char m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE + unsigned short dram[2][0x20000/2]; // AKA fb + unsigned char m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE + unsigned char data_array[2][0x1000]; // cache in SH2s (can be used as RAM) unsigned char sh2_rom_m[0x800]; unsigned char sh2_rom_s[0x400]; unsigned short pal[0x100];