From ae214f1c37e5b02b6413040649a40f8ba3874e1b Mon Sep 17 00:00:00 2001 From: notaz Date: Mon, 26 Aug 2013 00:32:31 +0300 Subject: [PATCH] new timing for main and cd --- pico/32x/32x.c | 64 +++++----- pico/32x/memory.c | 20 ++-- pico/32x/pwm.c | 8 +- pico/32x/sh2soc.c | 2 +- pico/cd/LC89510.c | 19 ++- pico/cd/gfx_cd.c | 166 ++++++++------------------ pico/cd/gfx_cd.h | 2 - pico/cd/memory.c | 40 +++++-- pico/cd/pico.c | 294 +++++++++++++++++++++++++++++----------------- pico/cd/sek.c | 4 +- pico/debug.c | 2 +- pico/eeprom.c | 10 +- pico/memory.c | 24 ++-- pico/pico.c | 16 +-- pico/pico_cmn.c | 104 +++++++--------- pico/pico_int.h | 139 +++++++++++----------- pico/sek.c | 13 +- pico/state.c | 36 ++++-- pico/videoport.c | 6 +- 19 files changed, 501 insertions(+), 468 deletions(-) diff --git a/pico/32x/32x.c b/pico/32x/32x.c index ab522e4..54250f1 100644 --- a/pico/32x/32x.c +++ b/pico/32x/32x.c @@ -166,7 +166,7 @@ void p32x_reset_sh2s(void) // program will set S_OK } - msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDoneT(); + msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDone(); } void Pico32xInit(void) @@ -200,8 +200,8 @@ void PicoUnload32x(void) void PicoReset32x(void) { if (PicoAHW & PAHW_32X) { - msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDoneT(); - p32x_trigger_irq(NULL, SekCyclesDoneT2(), P32XI_VRES); + msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDone(); + p32x_trigger_irq(NULL, SekCyclesDone(), P32XI_VRES); p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, 0); p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES, 0); p32x_pwm_ctl_changed(); @@ -248,7 +248,7 @@ static void p32x_start_blank(void) Pico32xSwapDRAM(Pico32x.pending_fb ^ 1); } - p32x_trigger_irq(NULL, SekCyclesDoneT2(), P32XI_VINT); + p32x_trigger_irq(NULL, SekCyclesDone(), P32XI_VINT); p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0); p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0); } @@ -272,14 +272,6 @@ void p32x_schedule_hint(SH2 *sh2, int m68k_cycles) p32x_event_schedule(m68k_cycles, P32X_EVENT_HINT, after); } -// compare cycles, handling overflows -// check if a > b -#define CYCLES_GT(a, b) \ - ((int)((a) - (b)) > 0) -// check if a >= b -#define CYCLES_GE(a, b) \ - ((int)((a) - (b)) >= 0) - /* events */ static void fillend_event(unsigned int now) { @@ -296,9 +288,10 @@ static void hint_event(unsigned int now) typedef void (event_cb)(unsigned int now); -unsigned int event_times[P32X_EVENT_COUNT]; +/* times are in m68k (7.6MHz) cycles */ +unsigned int p32x_event_times[P32X_EVENT_COUNT]; static unsigned int event_time_next; -static event_cb *event_cbs[] = { +static event_cb *p32x_event_cbs[P32X_EVENT_COUNT] = { [P32X_EVENT_PWM] = p32x_pwm_irq_event, [P32X_EVENT_FILLEND] = fillend_event, [P32X_EVENT_HINT] = hint_event, @@ -311,8 +304,8 @@ void p32x_event_schedule(unsigned int now, enum p32x_event event, int after) when = (now + after) | 1; - elprintf(EL_32X, "new event #%u %u->%u", event, now, when); - event_times[event] = when; + elprintf(EL_32X, "32x: new event #%u %u->%u", event, now, when); + p32x_event_times[event] = when; if (event_time_next == 0 || CYCLES_GT(event_time_next, when)) event_time_next = when; @@ -329,7 +322,7 @@ void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after) sh2_end_run(sh2, left_to_next); } -static void run_events(unsigned int until) +static void p32x_run_events(unsigned int until) { int oldest, oldest_diff, time; int i, diff; @@ -338,8 +331,8 @@ static void run_events(unsigned int until) oldest = -1, oldest_diff = 0x7fffffff; for (i = 0; i < P32X_EVENT_COUNT; i++) { - if (event_times[i]) { - diff = event_times[i] - until; + if (p32x_event_times[i]) { + diff = p32x_event_times[i] - until; if (diff < oldest_diff) { oldest_diff = diff; oldest = i; @@ -348,13 +341,13 @@ static void run_events(unsigned int until) } if (oldest_diff <= 0) { - time = event_times[oldest]; - event_times[oldest] = 0; - elprintf(EL_32X, "run event #%d %u", oldest, time); - event_cbs[oldest](time); + time = p32x_event_times[oldest]; + p32x_event_times[oldest] = 0; + elprintf(EL_32X, "32x: run event #%d %u", oldest, time); + p32x_event_cbs[oldest](time); } else if (oldest_diff < 0x7fffffff) { - event_time_next = event_times[oldest]; + event_time_next = p32x_event_times[oldest]; break; } else { @@ -364,7 +357,8 @@ static void run_events(unsigned int until) } if (oldest != -1) - elprintf(EL_32X, "next event #%d at %u", oldest, event_time_next); + elprintf(EL_32X, "32x: next event #%d at %u", + oldest, event_time_next); } static inline void run_sh2(SH2 *sh2, int m68k_cycles) @@ -447,7 +441,7 @@ void sync_sh2s_normal(unsigned int m68k_target) while (CYCLES_GT(m68k_target, now)) { if (event_time_next && CYCLES_GE(now, event_time_next)) - run_events(now); + p32x_run_events(now); target = m68k_target; if (event_time_next && CYCLES_GT(target, event_time_next)) @@ -521,12 +515,13 @@ void sync_sh2s_lockstep(unsigned int m68k_target) } } -#define CPUS_RUN(m68k_cycles,s68k_cycles) do { \ +#define CPUS_RUN(m68k_cycles) do { \ SekRunM68k(m68k_cycles); \ - if (Pico32x.emu_flags & P32XF_Z80_32X_IO) \ - PicoSyncZ80(SekCycleCnt); \ + if ((Pico32x.emu_flags & P32XF_Z80_32X_IO) && Pico.m.z80Run \ + && !Pico.m.z80_reset && (PicoOpt & POPT_EN_Z80)) \ + PicoSyncZ80(SekCyclesDone()); \ if (Pico32x.emu_flags & (P32XF_68KCPOLL|P32XF_68KVPOLL)) \ - p32x_sync_sh2s(SekCyclesDoneT2()); \ + p32x_sync_sh2s(SekCyclesDone()); \ } while (0) #define PICO_32X @@ -541,7 +536,7 @@ void PicoFrame32x(void) Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access if (!(Pico32x.sh2_regs[0] & 0x80)) - p32x_schedule_hint(NULL, SekCyclesDoneT2()); + p32x_schedule_hint(NULL, SekCyclesDone()); p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0); p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0); @@ -576,11 +571,10 @@ void Pico32xStateLoaded(int is_early) return; } - SekCycleCnt = 0; - sh2s[0].m68krcycles_done = sh2s[1].m68krcycles_done = SekCycleCntT; - p32x_update_irls(NULL, SekCycleCntT); + sh2s[0].m68krcycles_done = sh2s[1].m68krcycles_done = SekCyclesDone(); + p32x_update_irls(NULL, SekCyclesDone()); p32x_pwm_state_loaded(); - run_events(SekCycleCntT); + p32x_run_events(SekCyclesDone()); } // vim:shiftwidth=2:ts=2:expandtab diff --git a/pico/32x/memory.c b/pico/32x/memory.c index 5be4da4..fd902dd 100644 --- a/pico/32x/memory.c +++ b/pico/32x/memory.c @@ -187,7 +187,7 @@ static u32 p32x_reg_read16(u32 a) #else if ((a & 0x30) == 0x20) { static u32 dr2 = 0; - unsigned int cycles = SekCyclesDoneT(); + unsigned int cycles = SekCyclesDone(); int comreg = 1 << (a & 0x0f) / 2; // evil X-Men proto polls in a dbra loop and expects it to expire.. @@ -211,14 +211,14 @@ static u32 p32x_reg_read16(u32 a) #endif if (a == 2) { // INTM, INTS - unsigned int cycles = SekCyclesDoneT(); + unsigned int cycles = SekCyclesDone(); if (cycles - msh2.m68krcycles_done > 64) p32x_sync_sh2s(cycles); goto out; } if ((a & 0x30) == 0x30) - return p32x_pwm_read16(a, NULL, SekCyclesDoneT()); + return p32x_pwm_read16(a, NULL, SekCyclesDone()); out: return Pico32x.regs[a / 2]; @@ -241,7 +241,7 @@ static void dreq0_write(u16 *r, u32 d) r[6 / 2] &= ~P32XS_68S; if ((Pico32x.dmac0_fifo_ptr & 3) == 0) { - p32x_sync_sh2s(SekCyclesDoneT()); + p32x_sync_sh2s(SekCyclesDone()); p32x_dreq0_trigger(); } } @@ -272,7 +272,7 @@ static void p32x_reg_write8(u32 a, u32 d) return; case 0x03: // irq ctl if ((d ^ r[0x02 / 2]) & 3) { - int cycles = SekCyclesDoneT(); + int cycles = SekCyclesDone(); p32x_sync_sh2s(cycles); r[0x02 / 2] = d & 3; p32x_update_cmd_irq(NULL, cycles); @@ -383,12 +383,12 @@ static void p32x_reg_write8(u32 a, u32 d) case 0x3f: return; pwm_write: - p32x_pwm_write16(a & ~1, d, NULL, SekCyclesDoneT()); + p32x_pwm_write16(a & ~1, d, NULL, SekCyclesDone()); return; } if ((a & 0x30) == 0x20) { - int cycles = SekCyclesDoneT(); + int cycles = SekCyclesDone(); int comreg; if (REG8IN16(r, a) == d) @@ -448,13 +448,13 @@ static void p32x_reg_write16(u32 a, u32 d) case 0x30: // PWM control d = (r[a / 2] & ~0x0f) | (d & 0x0f); r[a / 2] = d; - p32x_pwm_write16(a, d, NULL, SekCyclesDoneT()); + p32x_pwm_write16(a, d, NULL, SekCyclesDone()); return; } // comm port if ((a & 0x30) == 0x20) { - int cycles = SekCyclesDoneT(); + int cycles = SekCyclesDone(); int comreg; if (r[a / 2] == d) @@ -475,7 +475,7 @@ static void p32x_reg_write16(u32 a, u32 d) } // PWM else if ((a & 0x30) == 0x30) { - p32x_pwm_write16(a, d, NULL, SekCyclesDoneT()); + p32x_pwm_write16(a, d, NULL, SekCyclesDone()); return; } diff --git a/pico/32x/pwm.c b/pico/32x/pwm.c index 6f9cd07..1aba914 100644 --- a/pico/32x/pwm.c +++ b/pico/32x/pwm.c @@ -247,7 +247,7 @@ void p32x_pwm_update(int *buf32, int length, int stereo) int p = 0; int xmd; - consume_fifo(NULL, SekCyclesDoneT2()); + consume_fifo(NULL, SekCyclesDone()); xmd = Pico32x.regs[0x30 / 2] & 0x0f; if (xmd == 0 || xmd == 0x06 || xmd == 0x09 || xmd == 0x0f) @@ -326,11 +326,11 @@ void p32x_pwm_state_loaded(void) p32x_pwm_ctl_changed(); // for old savestates - cycles_diff_sh2 = SekCycleCntT * 3 - Pico32x.pwm_cycle_p; + cycles_diff_sh2 = SekCycleCnt * 3 - Pico32x.pwm_cycle_p; if (cycles_diff_sh2 >= pwm_cycles || cycles_diff_sh2 < 0) { Pico32x.pwm_irq_cnt = pwm_irq_reload; - Pico32x.pwm_cycle_p = SekCycleCntT * 3; - p32x_pwm_schedule(SekCycleCntT); + Pico32x.pwm_cycle_p = SekCycleCnt * 3; + p32x_pwm_schedule(SekCycleCnt); } } diff --git a/pico/32x/sh2soc.c b/pico/32x/sh2soc.c index daa48da..04d3374 100644 --- a/pico/32x/sh2soc.c +++ b/pico/32x/sh2soc.c @@ -73,7 +73,7 @@ static void dmac_transfer_complete(SH2 *sh2, struct dma_chan *chan) { chan->chcr |= DMA_TE; // DMA has ended normally - p32x_sh2_poll_event(sh2, SH2_STATE_SLEEP, SekCyclesDoneT()); + p32x_sh2_poll_event(sh2, SH2_STATE_SLEEP, SekCyclesDone()); if (chan->chcr & DMA_IE) dmac_te_irq(sh2, chan); } diff --git a/pico/cd/LC89510.c b/pico/cd/LC89510.c index 8a42ee5..7489476 100644 --- a/pico/cd/LC89510.c +++ b/pico/cd/LC89510.c @@ -68,7 +68,7 @@ PICO_INTERNAL void Update_CDC_TRansfer(int which) unsigned short *dest; unsigned char *src; - if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2)) + if (1) //Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2)) { length = (Pico_mcd->cdc.DBC.N + 1) >> 1; Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer @@ -80,7 +80,7 @@ PICO_INTERNAL void Update_CDC_TRansfer(int which) { Pico_mcd->cdc.IFSTAT &= ~0x40; - if (Pico_mcd->s68k_regs[0x33] & (1<<5)) + if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN5) { elprintf(EL_INTS, "cdc DTE irq 5"); SekInterruptS68k(5); @@ -430,6 +430,19 @@ PICO_INTERNAL void CDC_Write_Reg(unsigned char Data) cdprintf("************** Starting Data Transfer ***********"); cdprintf("RS0 = %.4X DAC = %.4X DBC = %.4X DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8, Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB]); + + // tmp + { + int ddx = Pico_mcd->s68k_regs[4] & 7; + if (ddx < 2) break; // invalid + if (ddx < 4) { + Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port + break; + } + if (ddx == 6) break; // invalid + + pcd_event_schedule_s68k(PCD_EVENT_DMA, Pico_mcd->cdc.DBC.N / 2); + } } break; @@ -504,7 +517,7 @@ PICO_INTERNAL void CDD_Export_Status(void) Pico_mcd->s68k_regs[0x37] &= 3; // CDD.Control - if (Pico_mcd->s68k_regs[0x33] & (1<<4)) + if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) { elprintf(EL_INTS, "cdd export irq 4"); SekInterruptS68k(4); diff --git a/pico/cd/gfx_cd.c b/pico/cd/gfx_cd.c index 0623a27..96d44f2 100644 --- a/pico/cd/gfx_cd.c +++ b/pico/cd/gfx_cd.c @@ -12,33 +12,21 @@ #define _rot_comp Pico_mcd->rot_comp -static const int Table_Rot_Time[] = -{ - 0x00054000, 0x00048000, 0x00040000, 0x00036000, //; 008-032 ; briefing - sprite - 0x0002E000, 0x00028000, 0x00024000, 0x00022000, //; 036-064 ; arbre souvent - 0x00021000, 0x00020000, 0x0001E000, 0x0001B800, //; 068-096 ; map thunderstrike - 0x00019800, 0x00017A00, 0x00015C00, 0x00013E00, //; 100-128 ; logo défoncé - - 0x00012000, 0x00011800, 0x00011000, 0x00010800, //; 132-160 ; briefing - map - 0x00010000, 0x0000F800, 0x0000F000, 0x0000E800, //; 164-192 - 0x0000E000, 0x0000D800, 0x0000D000, 0x0000C800, //; 196-224 - 0x0000C000, 0x0000B800, 0x0000B000, 0x0000A800, //; 228-256 ; batman visage - - 0x0000A000, 0x00009F00, 0x00009E00, 0x00009D00, //; 260-288 - 0x00009C00, 0x00009B00, 0x00009A00, 0x00009900, //; 292-320 - 0x00009800, 0x00009700, 0x00009600, 0x00009500, //; 324-352 - 0x00009400, 0x00009300, 0x00009200, 0x00009100, //; 356-384 - - 0x00009000, 0x00008F00, 0x00008E00, 0x00008D00, //; 388-416 - 0x00008C00, 0x00008B00, 0x00008A00, 0x00008900, //; 420-448 - 0x00008800, 0x00008700, 0x00008600, 0x00008500, //; 452-476 - 0x00008400, 0x00008300, 0x00008200, 0x00008100, //; 480-512 -}; - +static void gfx_do_line(unsigned int func, unsigned short *stamp_base, + unsigned int H_Dot); static void gfx_cd_start(void) { - int upd_len; + int w, h; + + w = _rot_comp.Reg_62; + h = _rot_comp.Reg_64; + if (w == 0 || h == 0) { + elprintf(EL_CD|EL_ANOMALY, "gfx_cd_start with %ux%u", w, h); + _rot_comp.Reg_64 = 0; + // irq? + return; + } // _rot_comp.XD_Mul = ((_rot_comp.Reg_5C & 0x1f) + 1) * 4; // unused _rot_comp.Function = (_rot_comp.Reg_58 & 7) | (Pico_mcd->s68k_regs[3] & 0x18); // Jmp_Adr @@ -46,12 +34,10 @@ static void gfx_cd_start(void) _rot_comp.YD = (_rot_comp.Reg_60 >> 3) & 7; _rot_comp.Vector_Adr = (_rot_comp.Reg_66 & 0xfffe) << 2; - upd_len = (_rot_comp.Reg_62 >> 3) & 0x3f; - upd_len = Table_Rot_Time[upd_len]; - _rot_comp.Draw_Speed = _rot_comp.Float_Part = upd_len; - _rot_comp.Reg_58 |= 0x8000; // Stamp_Size, we start a new GFX operation + pcd_event_schedule_s68k(PCD_EVENT_GFX, 5 * w * h); + switch (_rot_comp.Reg_58 & 6) // Scr_16? { case 0: // ? @@ -68,25 +54,46 @@ static void gfx_cd_start(void) break; } - dprintf("gfx_cd_start, stamp_map_addr=%06x", _rot_comp.Stamp_Map_Adr); + if (PicoOpt & POPT_EN_MCD_GFX) + { + unsigned int func = _rot_comp.Function; + unsigned short *stamp_base = (unsigned short *) (Pico_mcd->word_ram2M + _rot_comp.Stamp_Map_Adr); - gfx_cd_update(); + while (h--) + gfx_do_line(func, stamp_base, w); + } } -static void gfx_completed(void) +PICO_INTERNAL_ASM unsigned int gfx_cd_read(unsigned int a) { - _rot_comp.Reg_58 &= 0x7fff; // Stamp_Size - _rot_comp.Reg_64 = 0; - if (Pico_mcd->s68k_regs[0x33] & (1<<1)) - { - elprintf(EL_INTS, "gfx_cd irq 1"); - SekInterruptS68k(1); + unsigned int d = 0; + + switch (a) { + case 0x58: d = _rot_comp.Reg_58; break; + case 0x5A: d = _rot_comp.Reg_5A; break; + case 0x5C: d = _rot_comp.Reg_5C; break; + case 0x5E: d = _rot_comp.Reg_5E; break; + case 0x60: d = _rot_comp.Reg_60; break; + case 0x62: d = _rot_comp.Reg_62; break; + case 0x64: + d = _rot_comp.Reg_64; + if (_rot_comp.Reg_64 > 1) + // fudge.. + _rot_comp.Reg_64--; + break; + case 0x66: break; + default: dprintf("gfx_cd_read FIXME: unexpected address: %02x", a); break; } -} + dprintf("gfx_cd_read(%02x) = %04x", a, d); + + return d; + +} -static void gfx_do(unsigned int func, unsigned short *stamp_base, unsigned int H_Dot) +static void gfx_do_line(unsigned int func, unsigned short *stamp_base, + unsigned int H_Dot) { unsigned int eax, ebx, ecx, edx, esi, edi, pixel; unsigned int XD, Buffer_Adr; @@ -291,88 +298,13 @@ Next_Pixel: } -PICO_INTERNAL void gfx_cd_update(void) -{ - int V_Dot = _rot_comp.Reg_64 & 0xff; - int jobs; - - dprintf("gfx_cd_update, Reg_64 = %04x", _rot_comp.Reg_64); - - if (!V_Dot) - { - gfx_completed(); - return; - } - - jobs = _rot_comp.Float_Part >> 16; - - if (!jobs) - { - _rot_comp.Float_Part += _rot_comp.Draw_Speed; - return; - } - - _rot_comp.Float_Part &= 0xffff; - _rot_comp.Float_Part += _rot_comp.Draw_Speed; - - if (PicoOpt & POPT_EN_MCD_GFX) - { - unsigned int func = _rot_comp.Function; - unsigned int H_Dot = _rot_comp.Reg_62 & 0x1ff; - unsigned short *stamp_base = (unsigned short *) (Pico_mcd->word_ram2M + _rot_comp.Stamp_Map_Adr); - - while (jobs--) - { - gfx_do(func, stamp_base, H_Dot); // jmp [Jmp_Adr]: - - V_Dot--; // dec byte [V_Dot] - if (V_Dot == 0) - { - // GFX_Completed: - gfx_completed(); - return; - } - } - } - else - { - if (jobs >= V_Dot) - { - gfx_completed(); - return; - } - V_Dot -= jobs; - } - - _rot_comp.Reg_64 = V_Dot; -} - - -PICO_INTERNAL_ASM unsigned int gfx_cd_read(unsigned int a) -{ - unsigned int d = 0; - - switch (a) { - case 0x58: d = _rot_comp.Reg_58; break; - case 0x5A: d = _rot_comp.Reg_5A; break; - case 0x5C: d = _rot_comp.Reg_5C; break; - case 0x5E: d = _rot_comp.Reg_5E; break; - case 0x60: d = _rot_comp.Reg_60; break; - case 0x62: d = _rot_comp.Reg_62; break; - case 0x64: d = _rot_comp.Reg_64; break; - case 0x66: break; - default: dprintf("gfx_cd_read FIXME: unexpected address: %02x", a); break; - } - - dprintf("gfx_cd_read(%02x) = %04x", a, d); - - return d; -} - PICO_INTERNAL_ASM void gfx_cd_write16(unsigned int a, unsigned int d) { dprintf("gfx_cd_write16(%x, %04x)", a, d); + if (_rot_comp.Reg_58 & 0x8000) + elprintf(EL_CD|EL_ANOMALY, "cd: busy gfx reg write %02x %04x", a, d); + switch (a) { case 0x58: // .Reg_Stamp_Size _rot_comp.Reg_58 = d & 7; diff --git a/pico/cd/gfx_cd.h b/pico/cd/gfx_cd.h index 9a0c797..a80b2ec 100644 --- a/pico/cd/gfx_cd.h +++ b/pico/cd/gfx_cd.h @@ -24,8 +24,6 @@ typedef struct } Rot_Comp; -PICO_INTERNAL void gfx_cd_update(void); - PICO_INTERNAL_ASM unsigned int gfx_cd_read(unsigned int a); PICO_INTERNAL_ASM void gfx_cd_write16(unsigned int a, unsigned int d); diff --git a/pico/cd/memory.c b/pico/cd/memory.c index 95c78f9..2c6eadc 100644 --- a/pico/cd/memory.c +++ b/pico/cd/memory.c @@ -99,8 +99,11 @@ static u32 m68k_reg_read16(u32 a) case 0xA: elprintf(EL_UIO, "m68k FIXME: reserved read"); goto end; - case 0xC: - d = Pico_mcd->m.timer_stopwatch >> 16; + case 0xC: // 384 cycle stopwatch timer + // ugh.. + d = pcd_cycles_m68k_to_s68k(SekCyclesDone()); + d = (d - Pico_mcd->m.stopwatch_base_c) / 384; + d &= 0x0fff; elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d); goto end; } @@ -273,7 +276,9 @@ u32 s68k_reg_read16(u32 a) case 8: return Read_CDC_Host(1); // Gens returns 0 here on byte reads case 0xC: - d = Pico_mcd->m.timer_stopwatch >> 16; + d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c; + d /= 384; + d &= 0x0fff; elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d); return d; case 0x30: @@ -363,21 +368,29 @@ void s68k_reg_write8(u32 a, u32 d) elprintf(EL_CDREGS, "s68k set CDC dma addr"); break; case 0xc: - case 0xd: - elprintf(EL_CDREGS, "s68k set stopwatch timer"); - Pico_mcd->m.timer_stopwatch = 0; + case 0xd: // 384 cycle stopwatch timer + elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d); + // does this also reset internal 384 cycle counter? + Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k(); return; case 0xe: Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair return; - case 0x31: - elprintf(EL_CDREGS, "s68k set int3 timer: %02x", d); - Pico_mcd->m.timer_int3 = (d & 0xff) << 16; + case 0x31: // 384 cycle int3 timer + d &= 0xff; + elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d); + Pico_mcd->s68k_regs[a] = (u8) d; + if (d) // d or d+1?? + pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384); + else + pcd_event_schedule(0, PCD_EVENT_TIMER3, 0); break; case 0x33: // IRQ mask - elprintf(EL_CDREGS, "s68k irq mask: %02x", d); - if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) { - CDD_Export_Status(); + elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d); + d &= 0x7e; + if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) { + if (Pico_mcd->s68k_regs[0x37] & 4) + CDD_Export_Status(); } break; case 0x34: // fader @@ -978,7 +991,7 @@ static void remap_word_ram(int r3) #endif } -void PicoMemStateLoaded(void) +void pcd_state_loaded_mem(void) { int r3 = Pico_mcd->s68k_regs[3]; @@ -1147,3 +1160,4 @@ static void m68k_mem_setup_cd(void) } #endif // EMU_M68K +// vim:shiftwidth=2:ts=2:expandtab diff --git a/pico/cd/pico.c b/pico/cd/pico.c index 2b65295..0b6b943 100644 --- a/pico/cd/pico.c +++ b/pico/cd/pico.c @@ -1,6 +1,6 @@ /* * PicoDrive - * (C) notaz, 2007 + * (C) notaz, 2007,2013 * * This work is licensed under the terms of MAME license. * See COPYING file in the top-level directory. @@ -10,7 +10,8 @@ #include "../sound/ym2612.h" extern unsigned char formatted_bram[4*0x10]; -extern unsigned int s68k_poll_adclk; + +static unsigned int m68k_cycle_mult; void (*PicoMCDopenTray)(void) = NULL; void (*PicoMCDcloseTray)(void) = NULL; @@ -65,149 +66,191 @@ PICO_INTERNAL int PicoResetMCD(void) } SRam.start = SRam.end = 0; // unused + pcd_event_schedule(0, PCD_EVENT_CDC, 12500000/75); + return 0; } -static __inline void SekRunS68k(int cyc) +static __inline void SekRunS68k(unsigned int to) { int cyc_do; - SekCycleAimS68k+=cyc; - if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return; -#if defined(EMU_CORE_DEBUG) - SekCycleCntS68k+=CM_compareRun(cyc_do, 1); -#elif defined(EMU_C68K) - PicoCpuCS68k.cycles=cyc_do; + + SekCycleAimS68k = to; + if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0) + return; + + SekCycleCntS68k += cyc_do; +#if defined(EMU_C68K) + PicoCpuCS68k.cycles = cyc_do; CycloneRun(&PicoCpuCS68k); - SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles; + SekCycleCntS68k -= PicoCpuCS68k.cycles; #elif defined(EMU_M68K) m68k_set_context(&PicoCpuMS68k); - SekCycleCntS68k+=m68k_execute(cyc_do); + SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do; m68k_set_context(&PicoCpuMM68k); #elif defined(EMU_F68K) - g_m68kcontext=&PicoCpuFS68k; - SekCycleCntS68k+=fm68k_emulate(cyc_do, 0, 0); - g_m68kcontext=&PicoCpuFM68k; + g_m68kcontext = &PicoCpuFS68k; + SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0) - cyc_do; + g_m68kcontext = &PicoCpuFM68k; #endif } -#define PS_STEP_M68K ((488<<16)/20) // ~24 -//#define PS_STEP_S68K 13 -#if defined(_ASM_CD_PICO_C) -extern void SekRunPS(int cyc_m68k, int cyc_s68k); -#elif defined(EMU_F68K) -static __inline void SekRunPS(int cyc_m68k, int cyc_s68k) +unsigned int pcd_cycles_m68k_to_s68k(unsigned int c) { - SekCycleAim+=cyc_m68k; - SekCycleAimS68k+=cyc_s68k; - fm68k_emulate(0, 1, 0); + return (long long)c * m68k_cycle_mult >> 16; } -#else -static __inline void SekRunPS(int cyc_m68k, int cyc_s68k) + +/* events */ +static void pcd_cdc_event(unsigned int now) { - int cycn, cycn_s68k, cyc_do; - SekCycleAim+=cyc_m68k; - SekCycleAimS68k+=cyc_s68k; + // 75Hz CDC update + Check_CD_Command(); + pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75); +} -// fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k, -// SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline); +static void pcd_int3_timer_event(unsigned int now) +{ + if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) { + elprintf(EL_INTS|EL_CD, "s68k: timer irq 3"); + SekInterruptS68k(3); + } - /* loop 488 downto 0 in steps of PS_STEP */ - for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K) - { - cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16; - if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) { -#if defined(EMU_C68K) - PicoCpuCM68k.cycles = cyc_do; - CycloneRun(&PicoCpuCM68k); - SekCycleCnt += cyc_do - PicoCpuCM68k.cycles; -#elif defined(EMU_M68K) - m68k_set_context(&PicoCpuMM68k); - SekCycleCnt += m68k_execute(cyc_do); -#elif defined(EMU_F68K) - g_m68kcontext = &PicoCpuFM68k; - SekCycleCnt += fm68k_emulate(cyc_do, 0, 0); -#endif - } - if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) { -#if defined(EMU_C68K) - PicoCpuCS68k.cycles = cyc_do; - CycloneRun(&PicoCpuCS68k); - SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles; -#elif defined(EMU_M68K) - m68k_set_context(&PicoCpuMS68k); - SekCycleCntS68k += m68k_execute(cyc_do); -#elif defined(EMU_F68K) - g_m68kcontext = &PicoCpuFS68k; - SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0); -#endif + if (Pico_mcd->s68k_regs[0x31] != 0) + pcd_event_schedule(now, PCD_EVENT_TIMER3, + Pico_mcd->s68k_regs[0x31] * 384); +} + +static void pcd_gfx_event(unsigned int now) +{ + // update gfx chip + if (Pico_mcd->rot_comp.Reg_58 & 0x8000) { + Pico_mcd->rot_comp.Reg_58 &= 0x7fff; + Pico_mcd->rot_comp.Reg_64 = 0; + if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1) { + elprintf(EL_INTS |EL_CD, "s68k: gfx_cd irq 1"); + SekInterruptS68k(1); } } } -#endif +static void pcd_dma_event(unsigned int now) +{ + int ddx = Pico_mcd->s68k_regs[4] & 7; + Update_CDC_TRansfer(ddx); +} -static __inline void check_cd_dma(void) +typedef void (event_cb)(unsigned int now); + +/* times are in s68k (12.5MHz) cycles */ +unsigned int pcd_event_times[PCD_EVENT_COUNT]; +static unsigned int event_time_next; +static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = { + [PCD_EVENT_CDC] = pcd_cdc_event, + [PCD_EVENT_TIMER3] = pcd_int3_timer_event, + [PCD_EVENT_GFX] = pcd_gfx_event, + [PCD_EVENT_DMA] = pcd_dma_event, +}; + +void pcd_event_schedule(unsigned int now, enum pcd_event event, int after) { - int ddx; + unsigned int when; + + when = now + after; + if (when == 0) { + // event cancelled + pcd_event_times[event] = 0; + return; + } - if (!(Pico_mcd->scd.Status_CDC & 0x08)) return; + when |= 1; - ddx = Pico_mcd->s68k_regs[4] & 7; - if (ddx < 2) return; // invalid - if (ddx < 4) { - Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port - return; - } - if (ddx == 6) return; // invalid + elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when); + pcd_event_times[event] = when; - Update_CDC_TRansfer(ddx); // now go and do the actual transfer + if (event_time_next == 0 || CYCLES_GT(event_time_next, when)) + event_time_next = when; } -static __inline void update_chips(void) +void pcd_event_schedule_s68k(enum pcd_event event, int after) { - int counter_timer, int3_set; - int counter75hz_lim = Pico.m.pal ? 2080 : 2096; + if (SekCyclesLeftS68k > after) + SekEndRunS68k(after); - // 75Hz CDC update - if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) { - Pico_mcd->m.counter75hz -= counter75hz_lim; - Check_CD_Command(); - } + pcd_event_schedule(SekCyclesDoneS68k(), event, after); +} - // update timers - counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708; - Pico_mcd->m.timer_stopwatch += counter_timer; - if ((int3_set = Pico_mcd->s68k_regs[0x31])) { - Pico_mcd->m.timer_int3 -= counter_timer; - if (Pico_mcd->m.timer_int3 < 0) { - if (Pico_mcd->s68k_regs[0x33] & (1<<3)) { - elprintf(EL_INTS, "s68k: timer irq 3"); - SekInterruptS68k(3); - Pico_mcd->m.timer_int3 += int3_set << 16; - } - // is this really what happens if irq3 is masked out? - Pico_mcd->m.timer_int3 &= 0xffffff; - } - } +static void pcd_run_events(unsigned int until) +{ + int oldest, oldest_diff, time; + int i, diff; + + while (1) { + oldest = -1, oldest_diff = 0x7fffffff; + + for (i = 0; i < PCD_EVENT_COUNT; i++) { + if (pcd_event_times[i]) { + diff = pcd_event_times[i] - until; + if (diff < oldest_diff) { + oldest_diff = diff; + oldest = i; + } + } + } + + if (oldest_diff <= 0) { + time = pcd_event_times[oldest]; + pcd_event_times[oldest] = 0; + elprintf(EL_CD, "cd: run event #%d %u", oldest, time); + pcd_event_cbs[oldest](time); + } + else if (oldest_diff < 0x7fffffff) { + event_time_next = pcd_event_times[oldest]; + break; + } + else { + event_time_next = 0; + break; + } + } - // update gfx chip - if (Pico_mcd->rot_comp.Reg_58 & 0x8000) - gfx_cd_update(); + if (oldest != -1) + elprintf(EL_CD, "cd: next event #%d at %u", + oldest, event_time_next); } +static void pcd_sync_s68k(unsigned int m68k_target) +{ + #define now SekCycleCntS68k + unsigned int s68k_target = + (unsigned long long)m68k_target * m68k_cycle_mult >> 16; + unsigned int target; -#define PICO_CD -#define CPUS_RUN(m68k_cycles,s68k_cycles) \ -{ \ - if ((PicoOpt&POPT_EN_MCD_PSYNC) && (Pico_mcd->m.busreq&3) == 1) { \ - SekRunPS(m68k_cycles, s68k_cycles); /* "better/perfect sync" */ \ - } else { \ - SekRunM68k(m68k_cycles); \ - if ((Pico_mcd->m.busreq&3) == 1) /* no busreq/no reset */ \ - SekRunS68k(s68k_cycles); \ - } \ + elprintf(EL_CD, "s68k sync to %u/%u", m68k_target, s68k_target); + + if ((Pico_mcd->m.busreq & 3) != 1) { /* busreq/reset */ + SekCycleCntS68k = SekCycleAimS68k = s68k_target; + pcd_run_events(m68k_target); + return; + } + + while (CYCLES_GT(s68k_target, now)) { + if (event_time_next && CYCLES_GE(now, event_time_next)) + pcd_run_events(now); + + target = s68k_target; + if (event_time_next && CYCLES_GT(target, event_time_next)) + target = event_time_next; + + SekRunS68k(target); + } + #undef now } + +#define PICO_CD +#define CPUS_RUN(m68k_cycles) \ + SekRunM68k(m68k_cycles) + #include "../pico_cmn.c" @@ -216,7 +259,44 @@ PICO_INTERNAL void PicoFrameMCD(void) if (!(PicoOpt&POPT_ALT_RENDERER)) PicoFrameStart(); + // ~1.63 for NTSC, ~1.645 for PAL + if (Pico.m.pal) + m68k_cycle_mult = ((12500000ull << 16) / (50*312*488)); + else + m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1; + PicoFrameHints(); } +void pcd_state_loaded(void) +{ + unsigned int cycles; + int diff; + + pcd_state_loaded_mem(); + + // old savestates.. + cycles = pcd_cycles_m68k_to_s68k(SekCycleAim); + diff = cycles - SekCycleAimS68k; + if (diff < -1000 || diff > 1000) { + SekCycleCntS68k = SekCycleAimS68k = cycles; + } + if (pcd_event_times[PCD_EVENT_CDC] == 0) { + pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75); + + if (Pico_mcd->s68k_regs[0x31]) + pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3, + Pico_mcd->s68k_regs[0x31] * 384); + + if (Pico_mcd->rot_comp.Reg_58 & 0x8000) { + Pico_mcd->rot_comp.Reg_58 &= 0x7fff; + Pico_mcd->rot_comp.Reg_64 = 0; + if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1) + SekInterruptS68k(1); + } + if (Pico_mcd->scd.Status_CDC & 0x08) + Update_CDC_TRansfer(Pico_mcd->s68k_regs[4] & 7); + } +} +// vim:shiftwidth=2:ts=2:expandtab diff --git a/pico/cd/sek.c b/pico/cd/sek.c index 96e6335..8d83862 100644 --- a/pico/cd/sek.c +++ b/pico/cd/sek.c @@ -9,8 +9,8 @@ #include "../pico_int.h" -int SekCycleCntS68k=0; // cycles done in this frame -int SekCycleAimS68k=0; // cycle aim +unsigned int SekCycleCntS68k; +unsigned int SekCycleAimS68k; /* context */ diff --git a/pico/debug.c b/pico/debug.c index 9cb93b2..26b6393 100644 --- a/pico/debug.c +++ b/pico/debug.c @@ -43,7 +43,7 @@ char *PDebugMain(void) !!(SRam.flags & SRF_ENABLED), !!(SRam.flags & SRF_EEPROM), SRam.eeprom_type); MVP; sprintf(dstrp, "sram range: %06x-%06x, reg: %02x\n", SRam.start, SRam.end, Pico.m.sram_reg); MVP; sprintf(dstrp, "pend int: v:%i, h:%i, vdp status: %04x\n", bit(pv->pending_ints,5), bit(pv->pending_ints,4), pv->status); MVP; - sprintf(dstrp, "pal: %i, hw: %02x, frame#: %i, cycles: %i\n", Pico.m.pal, Pico.m.hardware, Pico.m.frame_count, SekCyclesDoneT()); MVP; + sprintf(dstrp, "pal: %i, hw: %02x, frame#: %i, cycles: %i\n", Pico.m.pal, Pico.m.hardware, Pico.m.frame_count, SekCyclesDone()); MVP; sprintf(dstrp, "M68k: PC: %06x, SR: %04x, irql: %i\n", SekPc, SekSr, SekIrqLevel); MVP; #if defined(EMU_C68K) sprintf(dstrp - 1, ", st_flg: %x\n", PicoCpuCM68k.state_flags); MVP; diff --git a/pico/eeprom.c b/pico/eeprom.c index 916622a..16f6c05 100644 --- a/pico/eeprom.c +++ b/pico/eeprom.c @@ -21,7 +21,7 @@ static void EEPROM_write_do(unsigned int d) // ???? ??la (l=SCL, a=SDA) unsigned int scyc = Pico.m.eeprom_cycle, ssa = Pico.m.eeprom_slave; elprintf(EL_EEPROM, "eeprom: scl/sda: %i/%i -> %i/%i, newtime=%i", (sreg&2)>>1, sreg&1, - (d&2)>>1, d&1, SekCyclesDoneT() - last_write); + (d&2)>>1, d&1, SekCyclesDone() - last_write); saddr &= 0x1fff; if(sreg & d & 2) { @@ -142,17 +142,17 @@ static void EEPROM_upd_pending(unsigned int d) void EEPROM_write16(unsigned int d) { // this diff must be at most 16 for NBA Jam to work - if (SekCyclesDoneT() - last_write < 16) { + if (SekCyclesDone() - last_write < 16) { // just update pending state elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", - SekCyclesDoneT() - last_write); + SekCyclesDone() - last_write); EEPROM_upd_pending(d); } else { int srs = Pico.m.eeprom_status; EEPROM_write_do(srs >> 6); // execute pending EEPROM_upd_pending(d); if ((srs ^ Pico.m.eeprom_status) & 0xc0) // update time only if SDA/SCL changed - last_write = SekCyclesDoneT(); + last_write = SekCyclesDone(); } } @@ -172,7 +172,7 @@ unsigned int EEPROM_read(void) EEPROM_write_do(Pico.m.eeprom_status>>6); sreg = Pico.m.eeprom_status; saddr = Pico.m.eeprom_addr&0x1fff; scyc = Pico.m.eeprom_cycle; ssa = Pico.m.eeprom_slave; - interval = SekCyclesDoneT() - last_write; + interval = SekCyclesDone() - last_write; d = (sreg>>6)&1; // use SDA as "open bus" // NBA Jam is nasty enough to read raising the SCL and starting the new cycle. diff --git a/pico/memory.c b/pico/memory.c index 664fd72..24e5f21 100644 --- a/pico/memory.c +++ b/pico/memory.c @@ -309,6 +309,13 @@ NOINLINE void io_ports_write(u32 a, u32 d) Pico.ioports[a] = d; } +// lame.. +static int z80_cycles_from_68k(void) +{ + return z80_cycle_aim + + cycles_68k_to_z80(SekCyclesDone() - last_z80_sync); +} + void NOINLINE ctl_write_z80busreq(u32 d) { d&=1; d^=1; @@ -317,14 +324,13 @@ void NOINLINE ctl_write_z80busreq(u32 d) { if (d) { - z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone()); + z80_cycle_cnt = z80_cycles_from_68k(); } else { - z80stopCycle = SekCyclesDone(); if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) { pprof_start(m68k); - PicoSyncZ80(z80stopCycle); + PicoSyncZ80(SekCyclesDone()); pprof_end_sub(m68k); } } @@ -350,7 +356,7 @@ void NOINLINE ctl_write_z80reset(u32 d) } else { - z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone()); + z80_cycle_cnt = z80_cycles_from_68k(); z80_reset(); } Pico.m.z80_reset = d; @@ -486,7 +492,7 @@ static void PicoWrite8_z80(u32 a, u32 d) } if ((a & 0x4000) == 0x0000) { // z80 RAM - SekCyclesBurn(2); // hack + SekCyclesBurnRun(2); // FIXME hack Pico.zram[a & 0x1fff] = (u8)d; return; } @@ -940,7 +946,7 @@ static int ym2612_write_local(u32 a, u32 d, int is_from_z80) timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew); if (ym2612.OPN.ST.mode & 1) { // this is not right, should really be done on overflow only - int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone()); + int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k(); timer_a_next_oflow = (cycles << 8) + timer_a_step; } elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8); @@ -955,7 +961,7 @@ static int ym2612_write_local(u32 a, u32 d, int is_from_z80) //ym2612.OPN.ST.TBT = 0; timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800 if (ym2612.OPN.ST.mode & 2) { - int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone()); + int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k(); timer_b_next_oflow = (cycles << 8) + timer_b_step; } elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8); @@ -963,7 +969,7 @@ static int ym2612_write_local(u32 a, u32 d, int is_from_z80) return 0; case 0x27: { /* mode, timer control */ int old_mode = ym2612.OPN.ST.mode; - int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone()); + int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k(); ym2612.OPN.ST.mode = d; elprintf(EL_YMTIMER, "st mode %02x", d); @@ -1041,7 +1047,7 @@ static u32 ym2612_read_local_z80(void) static u32 ym2612_read_local_68k(void) { - int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8; + int xcycles = z80_cycles_from_68k() << 8; ym2612_read_local(); diff --git a/pico/pico.c b/pico/pico.c index bbc514f..bd4621b 100644 --- a/pico/pico.c +++ b/pico/pico.c @@ -169,7 +169,7 @@ int PicoReset(void) SekReset(); // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games). SekSetRealTAS(PicoAHW & PAHW_MCD); - SekCycleCntT = SekCycleCnt = SekCycleAim = 0; + SekCycleCnt = SekCycleAim = 0; if (PicoAHW & PAHW_MCD) // needed for MCD to reset properly, probably some bug hides behind this.. @@ -278,23 +278,25 @@ PICO_INTERNAL int CheckDMA(void) #include "pico_cmn.c" -int z80stopCycle; -int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */ +unsigned int last_z80_sync; /* in 68k cycles */ +int z80_cycle_cnt; int z80_cycle_aim; int z80_scanline; int z80_scanline_cycles; /* cycles done until z80_scanline */ /* sync z80 to 68k */ -PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done) +PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done) { int cnt; - z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done); + z80_cycle_aim += cycles_68k_to_z80(m68k_cycles_done - last_z80_sync); cnt = z80_cycle_aim - z80_cycle_cnt; + last_z80_sync = m68k_cycles_done; pprof_start(z80); - elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228, - z80_cycle_aim, z80_cycle_aim / 228); + elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt, + z80_cycle_cnt, z80_cycle_cnt / 288, + z80_cycle_aim, z80_cycle_aim / 288); if (cnt > 0) z80_cycle_cnt += z80_run(cnt); diff --git a/pico/pico_cmn.c b/pico/pico_cmn.c index f4e20d2..98dfa93 100644 --- a/pico/pico_cmn.c +++ b/pico/pico_cmn.c @@ -9,9 +9,6 @@ #define CYCLES_M68K_LINE 488 // suitable for both PAL/NTSC #define CYCLES_M68K_VINT_LAG 68 #define CYCLES_M68K_ASD 148 -#define CYCLES_S68K_LINE 795 -#define CYCLES_S68K_VINT_LAG 111 -#define CYCLES_S68K_ASD 241 // pad delay (for 6 button pads) #define PAD_DELAY() { \ @@ -21,7 +18,7 @@ // CPUS_RUN #ifndef CPUS_RUN -#define CPUS_RUN(m68k_cycles,s68k_cycles) \ +#define CPUS_RUN(m68k_cycles) \ SekRunM68k(m68k_cycles) #endif @@ -31,24 +28,23 @@ static __inline void SekRunM68k(int cyc) pprof_start(m68k); pevt_log_m68k_o(EVT_RUN_START); - SekCycleAim+=cyc; - if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) - goto out; - -#if defined(EMU_CORE_DEBUG) - // this means we do run-compare - SekCycleCnt+=CM_compareRun(cyc_do, 0); -#elif defined(EMU_C68K) - PicoCpuCM68k.cycles=cyc_do; - CycloneRun(&PicoCpuCM68k); - SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles; + SekCycleAim += cyc; + while ((cyc_do = SekCycleAim - SekCycleCnt) > 0) { + SekCycleCnt += cyc_do; + +#if defined(EMU_C68K) + PicoCpuCM68k.cycles = cyc_do; + CycloneRun(&PicoCpuCM68k); + SekCycleCnt -= PicoCpuCM68k.cycles; #elif defined(EMU_M68K) - SekCycleCnt+=m68k_execute(cyc_do); + SekCycleCnt += m68k_execute(cyc_do) - cyc_do; #elif defined(EMU_F68K) - SekCycleCnt+=fm68k_emulate(cyc_do, 0, 0); + SekCycleCnt += fm68k_emulate(cyc_do, 0, 0) - cyc_do; #endif + } + + SekCyclesLeft = 0; -out: SekTrace(0); pevt_log_m68k_o(EVT_RUN_END); pprof_end(m68k); @@ -58,6 +54,7 @@ static int PicoFrameHints(void) { struct PicoVideo *pv=&Pico.video; int lines, y, lines_vis = 224, line_sample, skip, vcnt_wrap; + unsigned int cycles; int hint; // Hint counter pevt_log_m68k_o(EVT_FRAME_START); @@ -81,11 +78,7 @@ static int PicoFrameHints(void) line_sample = 93; } - SekCyclesReset(); z80_resetCycles(); -#ifdef PICO_CD - SekCyclesResetS68k(); -#endif PsndDacLine = 0; emustatus &= ~1; @@ -95,7 +88,7 @@ static int PicoFrameHints(void) //dprintf("-hint: %i", hint); // This is to make active scan longer (needed for Double Dragon 2, mainly) - CPUS_RUN(CYCLES_M68K_ASD, CYCLES_S68K_ASD); + CPUS_RUN(CYCLES_M68K_ASD); for (y = 0; y < lines_vis; y++) { @@ -114,9 +107,6 @@ static int PicoFrameHints(void) } PAD_DELAY(); -#ifdef PICO_CD - check_cd_dma(); -#endif // H-Interrupts: if (--hint < 0) // y <= lines_vis: Comix Zone, Golden Axe @@ -124,7 +114,7 @@ static int PicoFrameHints(void) hint=pv->reg[10]; // Reload H-Int counter pv->pending_ints|=0x10; if (pv->reg[0]&0x10) { - elprintf(EL_INTS, "hint: @ %06x [%i]", SekPc, SekCycleCnt); + elprintf(EL_INTS, "hint: @ %06x [%i]", SekPc, SekCyclesDone()); SekInterrupt(4); } } @@ -145,25 +135,26 @@ static int PicoFrameHints(void) // get samples from sound chips if ((y == 224 || y == line_sample) && PsndOut) { + cycles = SekCyclesDone(); + if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80)) - PicoSyncZ80(SekCycleCnt); + PicoSyncZ80(cycles); if (ym2612.dacen && PsndDacLine <= y) PsndDoDAC(y); +#ifdef PICO_CD + pcd_sync_s68k(cycles); +#endif #ifdef PICO_32X - p32x_sync_sh2s(SekCyclesDoneT2()); + p32x_sync_sh2s(cycles); #endif PsndGetSamples(y); } // Run scanline: if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA()); - CPUS_RUN(CYCLES_M68K_LINE, CYCLES_S68K_LINE); + CPUS_RUN(CYCLES_M68K_LINE); -#ifdef PICO_CD - update_chips(); -#else if (PicoLineHook) PicoLineHook(); -#endif pevt_log_m68k_o(EVT_NEXT_LINE); } @@ -187,16 +178,13 @@ static int PicoFrameHints(void) memcpy(PicoPadInt, PicoPad, sizeof(PicoPadInt)); PAD_DELAY(); -#ifdef PICO_CD - check_cd_dma(); -#endif // Last H-Int: if (--hint < 0) { hint=pv->reg[10]; // Reload H-Int counter pv->pending_ints|=0x10; - //printf("rhint: %i @ %06x [%i|%i]\n", hint, SekPc, y, SekCycleCnt); + //printf("rhint: %i @ %06x [%i|%i]\n", hint, SekPc, y, SekCyclesDone()); if (pv->reg[0]&0x10) SekInterrupt(4); } @@ -207,20 +195,25 @@ static int PicoFrameHints(void) // there must be a delay after vblank bit is set and irq is asserted (Mazin Saga) // also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants) // also delay between last H-int and V-int (Golden Axe 3) - CPUS_RUN(CYCLES_M68K_VINT_LAG, CYCLES_S68K_VINT_LAG); + CPUS_RUN(CYCLES_M68K_VINT_LAG); if (pv->reg[1]&0x20) { - elprintf(EL_INTS, "vint: @ %06x [%i]", SekPc, SekCycleCnt); + elprintf(EL_INTS, "vint: @ %06x [%i]", SekPc, SekCyclesDone()); SekInterrupt(6); } + + cycles = SekCyclesDone(); if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80)) { - PicoSyncZ80(SekCycleCnt); + PicoSyncZ80(cycles); elprintf(EL_INTS, "zint"); z80_int(); } +#ifdef PICO_CD + pcd_sync_s68k(cycles); +#endif #ifdef PICO_32X - p32x_sync_sh2s(SekCyclesDoneT2()); + p32x_sync_sh2s(cycles); p32x_start_blank(); #endif @@ -234,14 +227,9 @@ static int PicoFrameHints(void) // Run scanline: if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA()); - CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG - CYCLES_M68K_ASD, - CYCLES_S68K_LINE - CYCLES_S68K_VINT_LAG - CYCLES_S68K_ASD); + CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG - CYCLES_M68K_ASD); -#ifdef PICO_CD - update_chips(); -#else if (PicoLineHook) PicoLineHook(); -#endif pevt_log_m68k_o(EVT_NEXT_LINE); lines = scanlines_total; @@ -257,30 +245,27 @@ static int PicoFrameHints(void) pv->v_counter &= 0xff; PAD_DELAY(); -#ifdef PICO_CD - check_cd_dma(); -#endif // Run scanline: if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA()); - CPUS_RUN(CYCLES_M68K_LINE, CYCLES_S68K_LINE); + CPUS_RUN(CYCLES_M68K_LINE); -#ifdef PICO_CD - update_chips(); -#else if (PicoLineHook) PicoLineHook(); -#endif pevt_log_m68k_o(EVT_NEXT_LINE); } - // sync z80 + // sync cpus + cycles = SekCyclesDone(); if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80)) - PicoSyncZ80(Pico.m.pal ? 151809 : 127671); // cycles adjusted for converter + PicoSyncZ80(cycles); if (PsndOut && ym2612.dacen && PsndDacLine <= lines-1) PsndDoDAC(lines-1); +#ifdef PICO_CD + pcd_sync_s68k(cycles); +#endif #ifdef PICO_32X - p32x_sync_sh2s(SekCyclesDoneT2()); + p32x_sync_sh2s(cycles); #endif timers_cycle(); @@ -290,3 +275,4 @@ static int PicoFrameHints(void) #undef PAD_DELAY #undef CPUS_RUN +// vim:shiftwidth=2:ts=2:expandtab diff --git a/pico/pico_int.h b/pico/pico_int.h index 6e4917b..ef49295 100644 --- a/pico/pico_int.h +++ b/pico/pico_int.h @@ -37,13 +37,8 @@ extern "C" { #ifdef EMU_C68K #include "../cpu/cyclone/Cyclone.h" extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k; -#define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run -#define SekCyclesLeft \ - (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) -#define SekCyclesLeftS68k \ - ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles) -#define SekEndTimeslice(after) PicoCpuCM68k.cycles=after -#define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after +#define SekCyclesLeft PicoCpuCM68k.cycles // cycles left for this run +#define SekCyclesLeftS68k PicoCpuCS68k.cycles #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase) #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase) #define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8]) @@ -59,21 +54,13 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k; #define SekInterrupt(i) PicoCpuCM68k.irq=i #define SekIrqLevel PicoCpuCM68k.irq -#ifdef EMU_M68K -#define EMU_CORE_DEBUG -#endif #endif #ifdef EMU_F68K #include "../cpu/fame/fame.h" extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k; -#define SekCyclesLeftNoMCD PicoCpuFM68k.io_cycle_counter -#define SekCyclesLeft \ - (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) -#define SekCyclesLeftS68k \ - ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter) -#define SekEndTimeslice(after) PicoCpuFM68k.io_cycle_counter=after -#define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after +#define SekCyclesLeft PicoCpuFM68k.io_cycle_counter +#define SekCyclesLeftS68k PicoCpuFS68k.io_cycle_counter #define SekPc fm68k_get_pc(&PicoCpuFM68k) #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k) #define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D) @@ -95,22 +82,14 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k; #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq #define SekIrqLevel PicoCpuFM68k.interrupts[0] -#ifdef EMU_M68K -#define EMU_CORE_DEBUG -#endif #endif #ifdef EMU_M68K #include "../cpu/musashi/m68kcpu.h" extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k; #ifndef SekCyclesLeft -#define SekCyclesLeftNoMCD PicoCpuMM68k.cyc_remaining_cycles -#define SekCyclesLeft \ - (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD) -#define SekCyclesLeftS68k \ - ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles) -#define SekEndTimeslice(after) SET_CYCLES(after) -#define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after +#define SekCyclesLeft PicoCpuMM68k.cyc_remaining_cycles +#define SekCyclesLeftS68k PicoCpuMS68k.cyc_remaining_cycles #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC) #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC) #define SekDar(x) PicoCpuMM68k.dar[x] @@ -140,52 +119,46 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k; #endif #endif // EMU_M68K -extern int SekCycleCnt; // cycles done in this frame -extern int SekCycleAim; // cycle aim -extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame +// while running, cnt represents target of current timeslice +// while not in SekRun(), it's actual cycles done +// (but always use SekCyclesDone() if you need current position) +// cnt may change if timeslice is ended prematurely or extended, +// so we use SekCycleAim for the actual target +extern unsigned int SekCycleCnt; +extern unsigned int SekCycleAim; -#define SekCyclesReset() { \ - SekCycleCntT+=SekCycleAim; \ - SekCycleCnt-=SekCycleAim; \ - SekCycleAim=0; \ -} -#define SekCyclesBurn(c) SekCycleCnt+=c -#define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // number of cycles done in this frame (can be checked anywhere) -#define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom -#define SekCyclesDoneT2() (SekCycleCntT + SekCycleCnt) // same as above but not from memhandlers +// number of cycles done (can be checked anywhere) +#define SekCyclesDone() (SekCycleCnt - SekCyclesLeft) + +// burn cycles while not in SekRun() and while in +#define SekCyclesBurn(c) SekCycleCnt += c +#define SekCyclesBurnRun(c) SekCyclesLeft -= c +// note: sometimes may extend timeslice to delay an irq #define SekEndRun(after) { \ - SekCycleCnt -= SekCyclesLeft - (after); \ - if (SekCycleCnt < 0) SekCycleCnt = 0; \ - SekEndTimeslice(after); \ + SekCycleCnt -= SekCyclesLeft - (after); \ + SekCyclesLeft = after; \ } +extern unsigned int SekCycleCntS68k; +extern unsigned int SekCycleAimS68k; + #define SekEndRunS68k(after) { \ - SekCycleCntS68k -= SekCyclesLeftS68k - (after); \ - if (SekCycleCntS68k < 0) SekCycleCntS68k = 0; \ - SekEndTimesliceS68k(after); \ + if (SekCyclesLeftS68k > (after)) { \ + SekCycleCntS68k -= SekCyclesLeftS68k - (after); \ + SekCyclesLeftS68k = after; \ + } \ } -extern int SekCycleCntS68k; -extern int SekCycleAimS68k; +#define SekCyclesDoneS68k() (SekCycleCntS68k - SekCyclesLeftS68k) -#define SekCyclesResetS68k() { \ - SekCycleCntS68k-=SekCycleAimS68k; \ - SekCycleAimS68k=0; \ -} -#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k) - -#ifdef EMU_CORE_DEBUG -extern int dbg_irq_level; -#undef SekEndTimeslice -#undef SekCyclesBurn -#undef SekEndRun -#undef SekInterrupt -#define SekEndTimeslice(c) -#define SekCyclesBurn(c) c -#define SekEndRun(c) -#define SekInterrupt(irq) dbg_irq_level=irq -#endif +// compare cycles, handling overflows +// check if a > b +#define CYCLES_GT(a, b) \ + ((int)((a) - (b)) > 0) +// check if a >= b +#define CYCLES_GE(a, b) \ + ((int)((a) - (b)) >= 0) // ----------------------- Z80 CPU ----------------------- @@ -221,13 +194,14 @@ extern struct DrZ80 drZ80; #define Z80_STATE_SIZE 0x60 -extern int z80stopCycle; /* in 68k cycles */ +extern unsigned int last_z80_sync; extern int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */ extern int z80_cycle_aim; extern int z80_scanline; extern int z80_scanline_cycles; /* cycles done until z80_scanline */ #define z80_resetCycles() \ + last_z80_sync = SekCyclesDone(); \ z80_cycle_cnt = z80_cycle_aim = z80_scanline = z80_scanline_cycles = 0; #define z80_cyclesDone() \ @@ -410,14 +384,12 @@ struct mcd_misc unsigned char busreq; unsigned char s68k_pend_ints; unsigned int state_flags; // 04: emu state: reset_pending - unsigned int counter75hz; - unsigned int pad0; - int timer_int3; // 10 - unsigned int timer_stopwatch; + unsigned int stopwatch_base_c; + unsigned int pad[3]; unsigned char bcram_reg; // 18: battery-backed RAM cart register unsigned char pad2; unsigned short pad3; - int pad[9]; + int pad4[9]; }; typedef struct @@ -613,7 +585,7 @@ PICO_INTERNAL void PicoMemSetupPico(void); // cd/memory.c PICO_INTERNAL void PicoMemSetupCD(void); -void PicoMemStateLoaded(void); +void pcd_state_loaded_mem(void); // pico.c extern struct Pico Pico; @@ -625,15 +597,35 @@ extern void (*PicoResetHook)(void); extern void (*PicoLineHook)(void); PICO_INTERNAL int CheckDMA(void); PICO_INTERNAL void PicoDetectRegion(void); -PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done); +PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done); // cd/pico.c +#define PCDS_IEN1 (1<<1) +#define PCDS_IEN2 (1<<2) +#define PCDS_IEN3 (1<<3) +#define PCDS_IEN4 (1<<4) +#define PCDS_IEN5 (1<<5) +#define PCDS_IEN6 (1<<6) + PICO_INTERNAL void PicoInitMCD(void); PICO_INTERNAL void PicoExitMCD(void); PICO_INTERNAL void PicoPowerMCD(void); PICO_INTERNAL int PicoResetMCD(void); PICO_INTERNAL void PicoFrameMCD(void); +enum pcd_event { + PCD_EVENT_CDC, + PCD_EVENT_TIMER3, + PCD_EVENT_GFX, + PCD_EVENT_DMA, + PCD_EVENT_COUNT, +}; +extern unsigned int pcd_event_times[PCD_EVENT_COUNT]; +void pcd_event_schedule(unsigned int now, enum pcd_event event, int after); +void pcd_event_schedule_s68k(enum pcd_event event, int after); +unsigned int pcd_cycles_m68k_to_s68k(unsigned int c); +void pcd_state_loaded(void); + // pico/pico.c PICO_INTERNAL void PicoInitPico(void); PICO_INTERNAL void PicoReratePico(void); @@ -760,7 +752,7 @@ enum p32x_event { P32X_EVENT_HINT, P32X_EVENT_COUNT, }; -extern unsigned int event_times[P32X_EVENT_COUNT]; +extern unsigned int p32x_event_times[P32X_EVENT_COUNT]; void Pico32xInit(void); void PicoPower32x(void); @@ -884,6 +876,7 @@ static __inline int isspace_(int c) #define EL_32X 0x00080000 #define EL_PWM 0x00100000 /* 32X PWM stuff (LOTS of output) */ #define EL_32XP 0x00200000 /* 32X peripherals */ +#define EL_CD 0x00400000 /* MCD */ #define EL_STATUS 0x40000000 /* status messages */ #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */ diff --git a/pico/sek.c b/pico/sek.c index 5a7b707..8dd7729 100644 --- a/pico/sek.c +++ b/pico/sek.c @@ -11,9 +11,8 @@ #include "memory.h" -int SekCycleCnt=0; // cycles done in this frame -int SekCycleAim=0; // cycle aim -unsigned int SekCycleCntT=0; +unsigned int SekCycleCnt; +unsigned int SekCycleAim; /* context */ @@ -220,7 +219,8 @@ PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub) #endif *(unsigned int *)(cpu+0x40) = pc; - *(unsigned int *)(cpu+0x50) = SekCycleCntT; + *(unsigned int *)(cpu+0x50) = + is_sub ? SekCycleCntS68k : SekCycleCnt; } PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub) @@ -257,7 +257,10 @@ PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub) context->execinfo &= ~FM68K_HALTED; if (cpu[0x4d]&1) context->execinfo |= FM68K_HALTED; #endif - SekCycleCntT = *(unsigned int *)(cpu+0x50); + if (is_sub) + SekCycleCntS68k = *(unsigned int *)(cpu+0x50); + else + SekCycleCnt = *(unsigned int *)(cpu+0x50); } diff --git a/pico/state.c b/pico/state.c index 6c11381..a369597 100644 --- a/pico/state.c +++ b/pico/state.c @@ -173,9 +173,11 @@ typedef enum { CHUNK_32X_EVT, CHUNK_32X_FIRST = CHUNK_MSH2, CHUNK_32X_LAST = CHUNK_32X_EVT, + // add new stuff here + CHUNK_CD_EVT = 50, // CHUNK_DEFAULT_COUNT, - CHUNK_CARTHW_ = CHUNK_CARTHW, // defined in PicoInt + CHUNK_CARTHW_ = CHUNK_CARTHW, // 64 (defined in PicoInt) } chunk_name_e; static const char * const chunk_names[] = { @@ -305,6 +307,9 @@ static int state_save(void *file) CHECKED_WRITE_BUFF(CHUNK_SCD, Pico_mcd->scd); CHECKED_WRITE_BUFF(CHUNK_RC, Pico_mcd->rot_comp); CHECKED_WRITE_BUFF(CHUNK_MISC_CD, Pico_mcd->m); + memset(buff, 0, 0x40); + memcpy(buff, pcd_event_times, sizeof(pcd_event_times)); + CHECKED_WRITE(CHUNK_CD_EVT, 0x40, buff); if (Pico_mcd->s68k_regs[3] & 4) // convert back wram_2M_to_1M(Pico_mcd->word_ram2M); @@ -336,7 +341,7 @@ static int state_save(void *file) CHECKED_WRITE_BUFF(CHUNK_32XPAL, Pico32xMem->pal); memset(buff, 0, 0x40); - memcpy(buff, event_times, sizeof(event_times)); + memcpy(buff, p32x_event_times, sizeof(p32x_event_times)); CHECKED_WRITE(CHUNK_32X_EVT, 0x40, buff); } #endif @@ -403,6 +408,9 @@ static int state_load(void *file) R_ERROR_RETURN("bad header"); CHECKED_READ(4, &ver); + memset(pcd_event_times, 0, sizeof(pcd_event_times)); + memset(p32x_event_times, 0, sizeof(p32x_event_times)); + while (!areaEof(file)) { CHECKED_READ(1, &chunk); @@ -459,6 +467,11 @@ static int state_load(void *file) case CHUNK_RC: CHECKED_READ_BUFF(Pico_mcd->rot_comp); break; case CHUNK_MISC_CD: CHECKED_READ_BUFF(Pico_mcd->m); break; + case CHUNK_CD_EVT: + CHECKED_READ_BUFF(buff); + memcpy(pcd_event_times, buff, sizeof(pcd_event_times)); + break; + // 32x stuff #ifndef NO_32X case CHUNK_MSH2: @@ -485,7 +498,7 @@ static int state_load(void *file) case CHUNK_32X_EVT: CHECKED_READ_BUFF(buff); - memcpy(event_times, buff, sizeof(event_times)); + memcpy(p32x_event_times, buff, sizeof(p32x_event_times)); break; #endif default: @@ -510,14 +523,6 @@ readend: if (PicoAHW & PAHW_SMS) PicoStateLoadedMS(); - if (PicoAHW & PAHW_MCD) - { - PicoMemStateLoaded(); - - if (!(Pico_mcd->s68k_regs[0x36] & 1) && (Pico_mcd->scd.Status_CDC & 1)) - cdda_start_play(); - } - if (PicoAHW & PAHW_32X) Pico32xStateLoaded(1); @@ -530,8 +535,17 @@ readend: z80_unpack(buff_z80); // due to dep from 68k cycles.. + SekCycleAim = SekCycleCnt; if (PicoAHW & PAHW_32X) Pico32xStateLoaded(0); + if (PicoAHW & PAHW_MCD) + { + SekCycleAimS68k = SekCycleCntS68k; + pcd_state_loaded(); + + if (!(Pico_mcd->s68k_regs[0x36] & 1) && (Pico_mcd->scd.Status_CDC & 1)) + cdda_start_play(); + } return 0; } diff --git a/pico/videoport.c b/pico/videoport.c index b78c358..ec68e7f 100644 --- a/pico/videoport.c +++ b/pico/videoport.c @@ -93,8 +93,7 @@ static void DmaSlow(int len) SekCyclesDone(), SekPc); Pico.m.dma_xfers += len; - if ((PicoAHW & PAHW_MCD) && (PicoOpt & POPT_EN_MCD_PSYNC)) SekCyclesBurn(CheckDMA()); - else SekEndTimeslice(SekCyclesLeftNoMCD - CheckDMA()); + SekCyclesBurnRun(CheckDMA()); if ((source&0xe00000)==0xe00000) { // Ram pd=(u16 *)(Pico.ram+(source&0xfffe)); @@ -362,8 +361,7 @@ PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d) pvid->lwrite_cnt++; if (pvid->lwrite_cnt >= 4) pvid->status|=0x100; // FIFO full if (pvid->lwrite_cnt > 4) { - SekCyclesBurn(32); // penalty // 488/12-8 - if (SekCycleCnt>=SekCycleAim) SekEndRun(0); + SekCyclesBurnRun(32); // penalty // 488/12-8 } elprintf(EL_ASVDP, "VDP data write: %04x [%06x] {%i} #%i @ %06x", d, Pico.video.addr, Pico.video.type, pvid->lwrite_cnt, SekPc); -- 2.39.2