From f4c0720c249d4d51f13f9cd69e3f149dcdf64a9e Mon Sep 17 00:00:00 2001
From: notaz <notasas@gmail.com>
Date: Sat, 13 Jul 2013 02:44:16 +0300
Subject: [PATCH] sh2: sync sh2 core with latest mame

---
 cpu/sh2/compiler.c     |    1 -
 cpu/sh2/mame/sh2.c     | 1045 ++++++++++++++++++++--------------------
 cpu/sh2/mame/sh2pico.c |   90 ++--
 cpu/sh2/sh2.c          |    2 -
 cpu/sh2/sh2.h          |    2 -
 pico/32x/memory.c      |   18 +-
 pico/pico_int.h        |   22 +-
 7 files changed, 599 insertions(+), 581 deletions(-)

diff --git a/cpu/sh2/compiler.c b/cpu/sh2/compiler.c
index d1a07af..2f959d2 100644
--- a/cpu/sh2/compiler.c
+++ b/cpu/sh2/compiler.c
@@ -2991,7 +2991,6 @@ void sh2_drc_wcheck_da(unsigned int a, int val, int cpuid)
 int sh2_execute(SH2 *sh2c, int cycles)
 {
   int ret_cycles;
-  sh2 = sh2c; // XXX
 
   sh2c->cycles_timeslice = cycles;
 
diff --git a/cpu/sh2/mame/sh2.c b/cpu/sh2/mame/sh2.c
index 0b1901c..158d42c 100644
--- a/cpu/sh2/mame/sh2.c
+++ b/cpu/sh2/mame/sh2.c
@@ -27,6 +27,12 @@
 
 /*****************************************************************************
     Changes
+    20130129 Angelo Salese
+    - added illegal opcode exception handling, side effect of some Saturn games
+      on loading like Feda or Falcom Classics Vol. 1
+      (i.e. Master CPU Incautiously transfers memory from CD to work RAM H, and
+            wipes out Slave CPU program code too while at it).
+
     20051129 Mariusz Wojcieszek
     - introduced memory_decrypted_read_word() for opcode fetching
 
@@ -115,111 +121,107 @@
 
 #define LOG(x)	do { if (VERBOSE) logerror x; } while (0)
 
-//int sh2_icount;
-//SH2 *sh2;
-
 #if 0
-INLINE UINT8 RB(offs_t A)
+INLINE UINT8 RB(sh2_state *sh2, offs_t A)
 {
 	if (A >= 0xe0000000)
-		return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xff << (((~A) & 3)*8)) >> (((~A) & 3)*8);
+		return sh2_internal_r(*sh2->internal, (A & 0x1fc)>>2, 0xff << (((~A) & 3)*8)) >> (((~A) & 3)*8);
 
 	if (A >= 0xc0000000)
-		return memory_read_byte_32be(sh2->program, A);
+		return sh2->program->read_byte(A);
 
 	if (A >= 0x40000000)
 		return 0xa5;
 
-	return memory_read_byte_32be(sh2->program, A & AM);
+	return sh2->program->read_byte(A & AM);
 }
 
-INLINE UINT16 RW(offs_t A)
+INLINE UINT16 RW(sh2_state *sh2, offs_t A)
 {
 	if (A >= 0xe0000000)
-		return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffff << (((~A) & 2)*8)) >> (((~A) & 2)*8);
+		return sh2_internal_r(*sh2->internal, (A & 0x1fc)>>2, 0xffff << (((~A) & 2)*8)) >> (((~A) & 2)*8);
 
 	if (A >= 0xc0000000)
-		return memory_read_word_32be(sh2->program, A);
+		return sh2->program->read_word(A);
 
 	if (A >= 0x40000000)
 		return 0xa5a5;
 
-	return memory_read_word_32be(sh2->program, A & AM);
+	return sh2->program->read_word(A & AM);
 }
 
-INLINE UINT32 RL(offs_t A)
+INLINE UINT32 RL(sh2_state *sh2, offs_t A)
 {
 	if (A >= 0xe0000000)
-		return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
+		return sh2_internal_r(*sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
 
 	if (A >= 0xc0000000)
-		return memory_read_dword_32be(sh2->program, A);
+		return sh2->program->read_dword(A);
 
 	if (A >= 0x40000000)
 		return 0xa5a5a5a5;
 
-  return memory_read_dword_32be(sh2->program, A & AM);
+	return sh2->program->read_dword(A & AM);
 }
 
-INLINE void WB(offs_t A, UINT8 V)
+INLINE void WB(sh2_state *sh2, offs_t A, UINT8 V)
 {
-
 	if (A >= 0xe0000000)
 	{
-		sh2_internal_w(sh2->internal, (A & 0x1fc)>>2, V << (((~A) & 3)*8), 0xff << (((~A) & 3)*8));
+		sh2_internal_w(*sh2->internal, (A & 0x1fc)>>2, V << (((~A) & 3)*8), 0xff << (((~A) & 3)*8));
 		return;
 	}
 
 	if (A >= 0xc0000000)
 	{
-		memory_write_byte_32be(sh2->program, A,V);
+		sh2->program->write_byte(A,V);
 		return;
 	}
 
 	if (A >= 0x40000000)
 		return;
 
-	memory_write_byte_32be(sh2->program, A & AM,V);
+	sh2->program->write_byte(A & AM,V);
 }
 
-INLINE void WW(offs_t A, UINT16 V)
+INLINE void WW(sh2_state *sh2, offs_t A, UINT16 V)
 {
 	if (A >= 0xe0000000)
 	{
-		sh2_internal_w(sh2->internal, (A & 0x1fc)>>2, V << (((~A) & 2)*8), 0xffff << (((~A) & 2)*8));
+		sh2_internal_w(*sh2->internal, (A & 0x1fc)>>2, V << (((~A) & 2)*8), 0xffff << (((~A) & 2)*8));
 		return;
 	}
 
 	if (A >= 0xc0000000)
 	{
-		memory_write_word_32be(sh2->program, A,V);
+		sh2->program->write_word(A,V);
 		return;
 	}
 
 	if (A >= 0x40000000)
 		return;
 
-	memory_write_word_32be(sh2->program, A & AM,V);
+	sh2->program->write_word(A & AM,V);
 }
 
-INLINE void WL(offs_t A, UINT32 V)
+INLINE void WL(sh2_state *sh2, offs_t A, UINT32 V)
 {
 	if (A >= 0xe0000000)
 	{
-		sh2_internal_w(sh2->internal, (A & 0x1fc)>>2, V, 0xffffffff);
+		sh2_internal_w(*sh2->internal, (A & 0x1fc)>>2, V, 0xffffffff);
 		return;
 	}
 
 	if (A >= 0xc0000000)
 	{
-		memory_write_dword_32be(sh2->program, A,V);
+		sh2->program->write_dword(A,V);
 		return;
 	}
 
 	if (A >= 0x40000000)
 		return;
 
-	memory_write_dword_32be(sh2->program, A & AM,V);
+	sh2->program->write_dword(A & AM,V);
 }
 #endif
 
@@ -227,7 +229,7 @@ INLINE void WL(offs_t A, UINT32 V)
  *  0011 nnnn mmmm 1100  1       -
  *  ADD     Rm,Rn
  */
-INLINE void ADD(UINT32 m, UINT32 n)
+INLINE void ADD(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] += sh2->r[m];
 }
@@ -236,7 +238,7 @@ INLINE void ADD(UINT32 m, UINT32 n)
  *  0111 nnnn iiii iiii  1       -
  *  ADD     #imm,Rn
  */
-INLINE void ADDI(UINT32 i, UINT32 n)
+INLINE void ADDI(sh2_state *sh2, UINT32 i, UINT32 n)
 {
 	sh2->r[n] += (INT32)(INT16)(INT8)i;
 }
@@ -245,7 +247,7 @@ INLINE void ADDI(UINT32 i, UINT32 n)
  *  0011 nnnn mmmm 1110  1       carry
  *  ADDC    Rm,Rn
  */
-INLINE void ADDC(UINT32 m, UINT32 n)
+INLINE void ADDC(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 tmp0, tmp1;
 
@@ -264,7 +266,7 @@ INLINE void ADDC(UINT32 m, UINT32 n)
  *  0011 nnnn mmmm 1111  1       overflow
  *  ADDV    Rm,Rn
  */
-INLINE void ADDV(UINT32 m, UINT32 n)
+INLINE void ADDV(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	INT32 dest, src, ans;
 
@@ -298,7 +300,7 @@ INLINE void ADDV(UINT32 m, UINT32 n)
  *  0010 nnnn mmmm 1001  1       -
  *  AND     Rm,Rn
  */
-INLINE void AND(UINT32 m, UINT32 n)
+INLINE void AND(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] &= sh2->r[m];
 }
@@ -308,7 +310,7 @@ INLINE void AND(UINT32 m, UINT32 n)
  *  1100 1001 iiii iiii  1       -
  *  AND     #imm,R0
  */
-INLINE void ANDI(UINT32 i)
+INLINE void ANDI(sh2_state *sh2, UINT32 i)
 {
 	sh2->r[0] &= i;
 }
@@ -317,27 +319,27 @@ INLINE void ANDI(UINT32 i)
  *  1100 1101 iiii iiii  1       -
  *  AND.B   #imm,@(R0,GBR)
  */
-INLINE void ANDM(UINT32 i)
+INLINE void ANDM(sh2_state *sh2, UINT32 i)
 {
 	UINT32 temp;
 
 	sh2->ea = sh2->gbr + sh2->r[0];
-	temp = i & RB( sh2->ea );
-	WB( sh2->ea, temp );
-	sh2_icount -= 2;
+	temp = i & RB( sh2, sh2->ea );
+	WB( sh2, sh2->ea, temp );
+	sh2->icount -= 2;
 }
 
 /*  code                 cycles  t-bit
  *  1000 1011 dddd dddd  3/1     -
  *  BF      disp8
  */
-INLINE void BF(UINT32 d)
+INLINE void BF(sh2_state *sh2, UINT32 d)
 {
 	if ((sh2->sr & T) == 0)
 	{
 		INT32 disp = ((INT32)d << 24) >> 24;
 		sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;
-		sh2_icount -= 2;
+		sh2->icount -= 2;
 	}
 }
 
@@ -345,14 +347,14 @@ INLINE void BF(UINT32 d)
  *  1000 1111 dddd dddd  3/1     -
  *  BFS     disp8
  */
-INLINE void BFS(UINT32 d)
+INLINE void BFS(sh2_state *sh2, UINT32 d)
 {
 	if ((sh2->sr & T) == 0)
 	{
 		INT32 disp = ((INT32)d << 24) >> 24;
 		sh2->delay = sh2->pc;
 		sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;
-		sh2_icount--;
+		sh2->icount--;
 	}
 }
 
@@ -360,74 +362,74 @@ INLINE void BFS(UINT32 d)
  *  1010 dddd dddd dddd  2       -
  *  BRA     disp12
  */
-INLINE void BRA(UINT32 d)
+INLINE void BRA(sh2_state *sh2, UINT32 d)
 {
 	INT32 disp = ((INT32)d << 20) >> 20;
 
 #if BUSY_LOOP_HACKS
 	if (disp == -2)
 	{
-		UINT32 next_opcode = RW(sh2->pc & AM);
+		UINT32 next_opcode = RW( sh2, sh2->ppc & AM );
 		/* BRA  $
-         * NOP
-         */
+		 * NOP
+		 */
 		if (next_opcode == 0x0009)
-			sh2_icount %= 3;	/* cycles for BRA $ and NOP taken (3) */
+			sh2->icount %= 3;   /* cycles for BRA $ and NOP taken (3) */
 	}
 #endif
 	sh2->delay = sh2->pc;
 	sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;
-	sh2_icount--;
+	sh2->icount--;
 }
 
 /*  code                 cycles  t-bit
  *  0000 mmmm 0010 0011  2       -
  *  BRAF    Rm
  */
-INLINE void BRAF(UINT32 m)
+INLINE void BRAF(sh2_state *sh2, UINT32 m)
 {
 	sh2->delay = sh2->pc;
 	sh2->pc += sh2->r[m] + 2;
-	sh2_icount--;
+	sh2->icount--;
 }
 
 /*  code                 cycles  t-bit
  *  1011 dddd dddd dddd  2       -
  *  BSR     disp12
  */
-INLINE void BSR(UINT32 d)
+INLINE void BSR(sh2_state *sh2, UINT32 d)
 {
 	INT32 disp = ((INT32)d << 20) >> 20;
 
 	sh2->pr = sh2->pc + 2;
 	sh2->delay = sh2->pc;
 	sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;
-	sh2_icount--;
+	sh2->icount--;
 }
 
 /*  code                 cycles  t-bit
  *  0000 mmmm 0000 0011  2       -
  *  BSRF    Rm
  */
-INLINE void BSRF(UINT32 m)
+INLINE void BSRF(sh2_state *sh2, UINT32 m)
 {
 	sh2->pr = sh2->pc + 2;
 	sh2->delay = sh2->pc;
 	sh2->pc += sh2->r[m] + 2;
-	sh2_icount--;
+	sh2->icount--;
 }
 
 /*  code                 cycles  t-bit
  *  1000 1001 dddd dddd  3/1     -
  *  BT      disp8
  */
-INLINE void BT(UINT32 d)
+INLINE void BT(sh2_state *sh2, UINT32 d)
 {
 	if ((sh2->sr & T) != 0)
 	{
 		INT32 disp = ((INT32)d << 24) >> 24;
 		sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;
-		sh2_icount -= 2;
+		sh2->icount -= 2;
 	}
 }
 
@@ -435,14 +437,14 @@ INLINE void BT(UINT32 d)
  *  1000 1101 dddd dddd  2/1     -
  *  BTS     disp8
  */
-INLINE void BTS(UINT32 d)
+INLINE void BTS(sh2_state *sh2, UINT32 d)
 {
 	if ((sh2->sr & T) != 0)
 	{
 		INT32 disp = ((INT32)d << 24) >> 24;
 		sh2->delay = sh2->pc;
 		sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;
-		sh2_icount--;
+		sh2->icount--;
 	}
 }
 
@@ -450,7 +452,7 @@ INLINE void BTS(UINT32 d)
  *  0000 0000 0010 1000  1       -
  *  CLRMAC
  */
-INLINE void CLRMAC(void)
+INLINE void CLRMAC(sh2_state *sh2)
 {
 	sh2->mach = 0;
 	sh2->macl = 0;
@@ -460,7 +462,7 @@ INLINE void CLRMAC(void)
  *  0000 0000 0000 1000  1       -
  *  CLRT
  */
-INLINE void CLRT(void)
+INLINE void CLRT(sh2_state *sh2)
 {
 	sh2->sr &= ~T;
 }
@@ -469,7 +471,7 @@ INLINE void CLRT(void)
  *  0011 nnnn mmmm 0000  1       comparison result
  *  CMP_EQ  Rm,Rn
  */
-INLINE void CMPEQ(UINT32 m, UINT32 n)
+INLINE void CMPEQ(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	if (sh2->r[n] == sh2->r[m])
 		sh2->sr |= T;
@@ -481,7 +483,7 @@ INLINE void CMPEQ(UINT32 m, UINT32 n)
  *  0011 nnnn mmmm 0011  1       comparison result
  *  CMP_GE  Rm,Rn
  */
-INLINE void CMPGE(UINT32 m, UINT32 n)
+INLINE void CMPGE(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	if ((INT32) sh2->r[n] >= (INT32) sh2->r[m])
 		sh2->sr |= T;
@@ -493,7 +495,7 @@ INLINE void CMPGE(UINT32 m, UINT32 n)
  *  0011 nnnn mmmm 0111  1       comparison result
  *  CMP_GT  Rm,Rn
  */
-INLINE void CMPGT(UINT32 m, UINT32 n)
+INLINE void CMPGT(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	if ((INT32) sh2->r[n] > (INT32) sh2->r[m])
 		sh2->sr |= T;
@@ -505,7 +507,7 @@ INLINE void CMPGT(UINT32 m, UINT32 n)
  *  0011 nnnn mmmm 0110  1       comparison result
  *  CMP_HI  Rm,Rn
  */
-INLINE void CMPHI(UINT32 m, UINT32 n)
+INLINE void CMPHI(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	if ((UINT32) sh2->r[n] > (UINT32) sh2->r[m])
 		sh2->sr |= T;
@@ -517,7 +519,7 @@ INLINE void CMPHI(UINT32 m, UINT32 n)
  *  0011 nnnn mmmm 0010  1       comparison result
  *  CMP_HS  Rm,Rn
  */
-INLINE void CMPHS(UINT32 m, UINT32 n)
+INLINE void CMPHS(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	if ((UINT32) sh2->r[n] >= (UINT32) sh2->r[m])
 		sh2->sr |= T;
@@ -530,7 +532,7 @@ INLINE void CMPHS(UINT32 m, UINT32 n)
  *  0100 nnnn 0001 0101  1       comparison result
  *  CMP_PL  Rn
  */
-INLINE void CMPPL(UINT32 n)
+INLINE void CMPPL(sh2_state *sh2, UINT32 n)
 {
 	if ((INT32) sh2->r[n] > 0)
 		sh2->sr |= T;
@@ -542,7 +544,7 @@ INLINE void CMPPL(UINT32 n)
  *  0100 nnnn 0001 0001  1       comparison result
  *  CMP_PZ  Rn
  */
-INLINE void CMPPZ(UINT32 n)
+INLINE void CMPPZ(sh2_state *sh2, UINT32 n)
 {
 	if ((INT32) sh2->r[n] >= 0)
 		sh2->sr |= T;
@@ -554,27 +556,27 @@ INLINE void CMPPZ(UINT32 n)
  *  0010 nnnn mmmm 1100  1       comparison result
  * CMP_STR  Rm,Rn
  */
-INLINE void CMPSTR(UINT32 m, UINT32 n)
- {
-  UINT32 temp;
-  INT32 HH, HL, LH, LL;
-  temp = sh2->r[n] ^ sh2->r[m];
-  HH = (temp >> 24) & 0xff;
-  HL = (temp >> 16) & 0xff;
-  LH = (temp >> 8) & 0xff;
-  LL = temp & 0xff;
-  if (HH && HL && LH && LL)
-   sh2->sr &= ~T;
-  else
-   sh2->sr |= T;
- }
+INLINE void CMPSTR(sh2_state *sh2, UINT32 m, UINT32 n)
+	{
+	UINT32 temp;
+	INT32 HH, HL, LH, LL;
+	temp = sh2->r[n] ^ sh2->r[m];
+	HH = (temp >> 24) & 0xff;
+	HL = (temp >> 16) & 0xff;
+	LH = (temp >> 8) & 0xff;
+	LL = temp & 0xff;
+	if (HH && HL && LH && LL)
+	sh2->sr &= ~T;
+	else
+	sh2->sr |= T;
+	}
 
 
 /*  code                 cycles  t-bit
  *  1000 1000 iiii iiii  1       comparison result
  *  CMP/EQ #imm,R0
  */
-INLINE void CMPIM(UINT32 i)
+INLINE void CMPIM(sh2_state *sh2, UINT32 i)
 {
 	UINT32 imm = (UINT32)(INT32)(INT16)(INT8)i;
 
@@ -588,7 +590,7 @@ INLINE void CMPIM(UINT32 i)
  *  0010 nnnn mmmm 0111  1       calculation result
  *  DIV0S   Rm,Rn
  */
-INLINE void DIV0S(UINT32 m, UINT32 n)
+INLINE void DIV0S(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	if ((sh2->r[n] & 0x80000000) == 0)
 		sh2->sr &= ~Q;
@@ -608,7 +610,7 @@ INLINE void DIV0S(UINT32 m, UINT32 n)
  *  0000 0000 0001 1001  1       0
  *  DIV0U
  */
-INLINE void DIV0U(void)
+INLINE void DIV0U(sh2_state *sh2)
 {
 	sh2->sr &= ~(M | Q | T);
 }
@@ -617,7 +619,7 @@ INLINE void DIV0U(void)
  *  0011 nnnn mmmm 0100  1       calculation result
  *  DIV1 Rm,Rn
  */
-INLINE void DIV1(UINT32 m, UINT32 n)
+INLINE void DIV1(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 tmp0;
 	UINT32 old_q;
@@ -709,7 +711,7 @@ INLINE void DIV1(UINT32 m, UINT32 n)
 }
 
 /*  DMULS.L Rm,Rn */
-INLINE void DMULS(UINT32 m, UINT32 n)
+INLINE void DMULS(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;
 	UINT32 temp0, temp1, temp2, temp3;
@@ -754,11 +756,11 @@ INLINE void DMULS(UINT32 m, UINT32 n)
 	}
 	sh2->mach = Res2;
 	sh2->macl = Res0;
-	sh2_icount--;
+	sh2->icount--;
 }
 
 /*  DMULU.L Rm,Rn */
-INLINE void DMULU(UINT32 m, UINT32 n)
+INLINE void DMULU(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;
 	UINT32 temp0, temp1, temp2, temp3;
@@ -782,11 +784,11 @@ INLINE void DMULU(UINT32 m, UINT32 n)
 	Res2 = Res2 + ((Res1 >> 16) & 0x0000ffff) + temp3;
 	sh2->mach = Res2;
 	sh2->macl = Res0;
-	sh2_icount--;
+	sh2->icount--;
 }
 
 /*  DT      Rn */
-INLINE void DT(UINT32 n)
+INLINE void DT(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n]--;
 	if (sh2->r[n] == 0)
@@ -795,16 +797,16 @@ INLINE void DT(UINT32 n)
 		sh2->sr &= ~T;
 #if BUSY_LOOP_HACKS
 	{
-		UINT32 next_opcode = RW(sh2->pc & AM);
+		UINT32 next_opcode = RW( sh2, sh2->ppc & AM );
 		/* DT   Rn
-         * BF   $-2
-         */
+		 * BF   $-2
+		 */
 		if (next_opcode == 0x8bfd)
 		{
-			while (sh2->r[n] > 1 && sh2_icount > 4)
+			while (sh2->r[n] > 1 && sh2->icount > 4)
 			{
 				sh2->r[n]--;
-				sh2_icount -= 4;	/* cycles for DT (1) and BF taken (3) */
+				sh2->icount -= 4;   /* cycles for DT (1) and BF taken (3) */
 			}
 		}
 	}
@@ -812,147 +814,162 @@ INLINE void DT(UINT32 n)
 }
 
 /*  EXTS.B  Rm,Rn */
-INLINE void EXTSB(UINT32 m, UINT32 n)
+INLINE void EXTSB(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] = ((INT32)sh2->r[m] << 24) >> 24;
 }
 
 /*  EXTS.W  Rm,Rn */
-INLINE void EXTSW(UINT32 m, UINT32 n)
+INLINE void EXTSW(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] = ((INT32)sh2->r[m] << 16) >> 16;
 }
 
 /*  EXTU.B  Rm,Rn */
-INLINE void EXTUB(UINT32 m, UINT32 n)
+INLINE void EXTUB(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] = sh2->r[m] & 0x000000ff;
 }
 
 /*  EXTU.W  Rm,Rn */
-INLINE void EXTUW(UINT32 m, UINT32 n)
+INLINE void EXTUW(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] = sh2->r[m] & 0x0000ffff;
 }
 
+/*  ILLEGAL */
+INLINE void ILLEGAL(sh2_state *sh2)
+{
+	logerror("SH2: Illegal opcode at %08x\n", sh2->pc - 2);
+	sh2->r[15] -= 4;
+	WL( sh2, sh2->r[15], sh2->sr );     /* push SR onto stack */
+	sh2->r[15] -= 4;
+	WL( sh2, sh2->r[15], sh2->pc - 2 ); /* push PC onto stack */
+
+	/* fetch PC */
+	sh2->pc = RL( sh2, sh2->vbr + 4 * 4 );
+
+	/* TODO: timing is a guess */
+	sh2->icount -= 5;
+}
+
+
 /*  JMP     @Rm */
-INLINE void JMP(UINT32 m)
+INLINE void JMP(sh2_state *sh2, UINT32 m)
 {
 	sh2->delay = sh2->pc;
 	sh2->pc = sh2->ea = sh2->r[m];
 }
 
 /*  JSR     @Rm */
-INLINE void JSR(UINT32 m)
+INLINE void JSR(sh2_state *sh2, UINT32 m)
 {
 	sh2->delay = sh2->pc;
 	sh2->pr = sh2->pc + 2;
 	sh2->pc = sh2->ea = sh2->r[m];
-	sh2_icount--;
+	sh2->icount--;
 }
 
 
 /*  LDC     Rm,SR */
-INLINE void LDCSR(UINT32 m)
+INLINE void LDCSR(sh2_state *sh2, UINT32 m)
 {
-	sh2->sr &= ~0xfff;
-	sh2->sr |= sh2->r[m] & FLAGS;
+	sh2->sr = sh2->r[m] & FLAGS;
 	sh2->test_irq = 1;
 }
 
 /*  LDC     Rm,GBR */
-INLINE void LDCGBR(UINT32 m)
+INLINE void LDCGBR(sh2_state *sh2, UINT32 m)
 {
 	sh2->gbr = sh2->r[m];
 }
 
 /*  LDC     Rm,VBR */
-INLINE void LDCVBR(UINT32 m)
+INLINE void LDCVBR(sh2_state *sh2, UINT32 m)
 {
 	sh2->vbr = sh2->r[m];
 }
 
 /*  LDC.L   @Rm+,SR */
-INLINE void LDCMSR(UINT32 m)
+INLINE void LDCMSR(sh2_state *sh2, UINT32 m)
 {
 	sh2->ea = sh2->r[m];
-	sh2->sr &= ~0xfff;
-	sh2->sr |= RL( sh2->ea ) & FLAGS;
+	sh2->sr = RL( sh2, sh2->ea ) & FLAGS;
 	sh2->r[m] += 4;
-	sh2_icount -= 2;
+	sh2->icount -= 2;
 	sh2->test_irq = 1;
 }
 
 /*  LDC.L   @Rm+,GBR */
-INLINE void LDCMGBR(UINT32 m)
+INLINE void LDCMGBR(sh2_state *sh2, UINT32 m)
 {
 	sh2->ea = sh2->r[m];
-	sh2->gbr = RL( sh2->ea );
+	sh2->gbr = RL( sh2, sh2->ea );
 	sh2->r[m] += 4;
-	sh2_icount -= 2;
+	sh2->icount -= 2;
 }
 
 /*  LDC.L   @Rm+,VBR */
-INLINE void LDCMVBR(UINT32 m)
+INLINE void LDCMVBR(sh2_state *sh2, UINT32 m)
 {
 	sh2->ea = sh2->r[m];
-	sh2->vbr = RL( sh2->ea );
+	sh2->vbr = RL( sh2, sh2->ea );
 	sh2->r[m] += 4;
-	sh2_icount -= 2;
+	sh2->icount -= 2;
 }
 
 /*  LDS     Rm,MACH */
-INLINE void LDSMACH(UINT32 m)
+INLINE void LDSMACH(sh2_state *sh2, UINT32 m)
 {
 	sh2->mach = sh2->r[m];
 }
 
 /*  LDS     Rm,MACL */
-INLINE void LDSMACL(UINT32 m)
+INLINE void LDSMACL(sh2_state *sh2, UINT32 m)
 {
 	sh2->macl = sh2->r[m];
 }
 
 /*  LDS     Rm,PR */
-INLINE void LDSPR(UINT32 m)
+INLINE void LDSPR(sh2_state *sh2, UINT32 m)
 {
 	sh2->pr = sh2->r[m];
 }
 
 /*  LDS.L   @Rm+,MACH */
-INLINE void LDSMMACH(UINT32 m)
+INLINE void LDSMMACH(sh2_state *sh2, UINT32 m)
 {
 	sh2->ea = sh2->r[m];
-	sh2->mach = RL( sh2->ea );
+	sh2->mach = RL( sh2, sh2->ea );
 	sh2->r[m] += 4;
 }
 
 /*  LDS.L   @Rm+,MACL */
-INLINE void LDSMMACL(UINT32 m)
+INLINE void LDSMMACL(sh2_state *sh2, UINT32 m)
 {
 	sh2->ea = sh2->r[m];
-	sh2->macl = RL( sh2->ea );
+	sh2->macl = RL( sh2, sh2->ea );
 	sh2->r[m] += 4;
 }
 
 /*  LDS.L   @Rm+,PR */
-INLINE void LDSMPR(UINT32 m)
+INLINE void LDSMPR(sh2_state *sh2, UINT32 m)
 {
 	sh2->ea = sh2->r[m];
-	sh2->pr = RL( sh2->ea );
+	sh2->pr = RL( sh2, sh2->ea );
 	sh2->r[m] += 4;
 }
 
 /*  MAC.L   @Rm+,@Rn+ */
-INLINE void MAC_L(UINT32 m, UINT32 n)
+INLINE void MAC_L(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;
 	UINT32 temp0, temp1, temp2, temp3;
 	INT32 tempm, tempn, fnLmL;
 
-	tempn = (INT32) RL( sh2->r[n] );
+	tempn = (INT32) RL( sh2, sh2->r[n] );
 	sh2->r[n] += 4;
-	tempm = (INT32) RL( sh2->r[m] );
+	tempm = (INT32) RL( sh2, sh2->r[m] );
 	sh2->r[m] += 4;
 	if ((INT32) (tempn ^ tempm) < 0)
 		fnLmL = -1;
@@ -1017,18 +1034,18 @@ INLINE void MAC_L(UINT32 m, UINT32 n)
 		sh2->mach = Res2;
 		sh2->macl = Res0;
 	}
-	sh2_icount -= 2;
+	sh2->icount -= 2;
 }
 
 /*  MAC.W   @Rm+,@Rn+ */
-INLINE void MAC_W(UINT32 m, UINT32 n)
+INLINE void MAC_W(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	INT32 tempm, tempn, dest, src, ans;
 	UINT32 templ;
 
-	tempn = (INT32) RW( sh2->r[n] );
+	tempn = (INT32) RW( sh2, sh2->r[n] );
 	sh2->r[n] += 2;
-	tempm = (INT32) RW( sh2->r[m] );
+	tempm = (INT32) RW( sh2, sh2->r[m] );
 	sh2->r[m] += 2;
 	templ = sh2->macl;
 	tempm = ((INT32) (short) tempn * (INT32) (short) tempm);
@@ -1068,272 +1085,272 @@ INLINE void MAC_W(UINT32 m, UINT32 n)
 		sh2->mach += tempn;
 		if (templ > sh2->macl)
 			sh2->mach += 1;
-		}
-	sh2_icount -= 2;
+	}
+	sh2->icount -= 2;
 }
 
 /*  MOV     Rm,Rn */
-INLINE void MOV(UINT32 m, UINT32 n)
+INLINE void MOV(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] = sh2->r[m];
 }
 
 /*  MOV.B   Rm,@Rn */
-INLINE void MOVBS(UINT32 m, UINT32 n)
+INLINE void MOVBS(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[n];
-	WB( sh2->ea, sh2->r[m] & 0x000000ff);
+	WB( sh2, sh2->ea, sh2->r[m] & 0x000000ff);
 }
 
 /*  MOV.W   Rm,@Rn */
-INLINE void MOVWS(UINT32 m, UINT32 n)
+INLINE void MOVWS(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[n];
-	WW( sh2->ea, sh2->r[m] & 0x0000ffff);
+	WW( sh2, sh2->ea, sh2->r[m] & 0x0000ffff);
 }
 
 /*  MOV.L   Rm,@Rn */
-INLINE void MOVLS(UINT32 m, UINT32 n)
+INLINE void MOVLS(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[n];
-	WL( sh2->ea, sh2->r[m] );
+	WL( sh2, sh2->ea, sh2->r[m] );
 }
 
 /*  MOV.B   @Rm,Rn */
-INLINE void MOVBL(UINT32 m, UINT32 n)
+INLINE void MOVBL(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[m];
-	sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea );
+	sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2, sh2->ea );
 }
 
 /*  MOV.W   @Rm,Rn */
-INLINE void MOVWL(UINT32 m, UINT32 n)
+INLINE void MOVWL(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[m];
-	sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->ea );
+	sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2, sh2->ea );
 }
 
 /*  MOV.L   @Rm,Rn */
-INLINE void MOVLL(UINT32 m, UINT32 n)
+INLINE void MOVLL(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[m];
-	sh2->r[n] = RL( sh2->ea );
+	sh2->r[n] = RL( sh2, sh2->ea );
 }
 
 /*  MOV.B   Rm,@-Rn */
-INLINE void MOVBM(UINT32 m, UINT32 n)
+INLINE void MOVBM(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	/* SMG : bug fix, was reading sh2->r[n] */
 	UINT32 data = sh2->r[m] & 0x000000ff;
 
 	sh2->r[n] -= 1;
-	WB( sh2->r[n], data );
+	WB( sh2, sh2->r[n], data );
 }
 
 /*  MOV.W   Rm,@-Rn */
-INLINE void MOVWM(UINT32 m, UINT32 n)
+INLINE void MOVWM(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 data = sh2->r[m] & 0x0000ffff;
 
 	sh2->r[n] -= 2;
-	WW( sh2->r[n], data );
+	WW( sh2, sh2->r[n], data );
 }
 
 /*  MOV.L   Rm,@-Rn */
-INLINE void MOVLM(UINT32 m, UINT32 n)
+INLINE void MOVLM(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 data = sh2->r[m];
 
 	sh2->r[n] -= 4;
-	WL( sh2->r[n], data );
+	WL( sh2, sh2->r[n], data );
 }
 
 /*  MOV.B   @Rm+,Rn */
-INLINE void MOVBP(UINT32 m, UINT32 n)
+INLINE void MOVBP(sh2_state *sh2, UINT32 m, UINT32 n)
 {
-	sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->r[m] );
+	sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2, sh2->r[m] );
 	if (n != m)
 		sh2->r[m] += 1;
 }
 
 /*  MOV.W   @Rm+,Rn */
-INLINE void MOVWP(UINT32 m, UINT32 n)
+INLINE void MOVWP(sh2_state *sh2, UINT32 m, UINT32 n)
 {
-	sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->r[m] );
+	sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2, sh2->r[m] );
 	if (n != m)
 		sh2->r[m] += 2;
 }
 
 /*  MOV.L   @Rm+,Rn */
-INLINE void MOVLP(UINT32 m, UINT32 n)
+INLINE void MOVLP(sh2_state *sh2, UINT32 m, UINT32 n)
 {
-	sh2->r[n] = RL( sh2->r[m] );
+	sh2->r[n] = RL( sh2, sh2->r[m] );
 	if (n != m)
 		sh2->r[m] += 4;
 }
 
 /*  MOV.B   Rm,@(R0,Rn) */
-INLINE void MOVBS0(UINT32 m, UINT32 n)
+INLINE void MOVBS0(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[n] + sh2->r[0];
-	WB( sh2->ea, sh2->r[m] & 0x000000ff );
+	WB( sh2, sh2->ea, sh2->r[m] & 0x000000ff );
 }
 
 /*  MOV.W   Rm,@(R0,Rn) */
-INLINE void MOVWS0(UINT32 m, UINT32 n)
+INLINE void MOVWS0(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[n] + sh2->r[0];
-	WW( sh2->ea, sh2->r[m] & 0x0000ffff );
+	WW( sh2, sh2->ea, sh2->r[m] & 0x0000ffff );
 }
 
 /*  MOV.L   Rm,@(R0,Rn) */
-INLINE void MOVLS0(UINT32 m, UINT32 n)
+INLINE void MOVLS0(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[n] + sh2->r[0];
-	WL( sh2->ea, sh2->r[m] );
+	WL( sh2, sh2->ea, sh2->r[m] );
 }
 
 /*  MOV.B   @(R0,Rm),Rn */
-INLINE void MOVBL0(UINT32 m, UINT32 n)
+INLINE void MOVBL0(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[m] + sh2->r[0];
-	sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea );
+	sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2, sh2->ea );
 }
 
 /*  MOV.W   @(R0,Rm),Rn */
-INLINE void MOVWL0(UINT32 m, UINT32 n)
+INLINE void MOVWL0(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[m] + sh2->r[0];
-	sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->ea );
+	sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2, sh2->ea );
 }
 
 /*  MOV.L   @(R0,Rm),Rn */
-INLINE void MOVLL0(UINT32 m, UINT32 n)
+INLINE void MOVLL0(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->ea = sh2->r[m] + sh2->r[0];
-	sh2->r[n] = RL( sh2->ea );
+	sh2->r[n] = RL( sh2, sh2->ea );
 }
 
 /*  MOV     #imm,Rn */
-INLINE void MOVI(UINT32 i, UINT32 n)
+INLINE void MOVI(sh2_state *sh2, UINT32 i, UINT32 n)
 {
 	sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) i;
 }
 
 /*  MOV.W   @(disp8,PC),Rn */
-INLINE void MOVWI(UINT32 d, UINT32 n)
+INLINE void MOVWI(sh2_state *sh2, UINT32 d, UINT32 n)
 {
 	UINT32 disp = d & 0xff;
 	sh2->ea = sh2->pc + disp * 2 + 2;
-	sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->ea );
+	sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2, sh2->ea );
 }
 
 /*  MOV.L   @(disp8,PC),Rn */
-INLINE void MOVLI(UINT32 d, UINT32 n)
+INLINE void MOVLI(sh2_state *sh2, UINT32 d, UINT32 n)
 {
 	UINT32 disp = d & 0xff;
 	sh2->ea = ((sh2->pc + 2) & ~3) + disp * 4;
-	sh2->r[n] = RL( sh2->ea );
+	sh2->r[n] = RL( sh2, sh2->ea );
 }
 
 /*  MOV.B   @(disp8,GBR),R0 */
-INLINE void MOVBLG(UINT32 d)
+INLINE void MOVBLG(sh2_state *sh2, UINT32 d)
 {
 	UINT32 disp = d & 0xff;
 	sh2->ea = sh2->gbr + disp;
-	sh2->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea );
+	sh2->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( sh2, sh2->ea );
 }
 
 /*  MOV.W   @(disp8,GBR),R0 */
-INLINE void MOVWLG(UINT32 d)
+INLINE void MOVWLG(sh2_state *sh2, UINT32 d)
 {
 	UINT32 disp = d & 0xff;
 	sh2->ea = sh2->gbr + disp * 2;
-	sh2->r[0] = (INT32)(INT16) RW( sh2->ea );
+	sh2->r[0] = (INT32)(INT16) RW( sh2, sh2->ea );
 }
 
 /*  MOV.L   @(disp8,GBR),R0 */
-INLINE void MOVLLG(UINT32 d)
+INLINE void MOVLLG(sh2_state *sh2, UINT32 d)
 {
 	UINT32 disp = d & 0xff;
 	sh2->ea = sh2->gbr + disp * 4;
-	sh2->r[0] = RL( sh2->ea );
+	sh2->r[0] = RL( sh2, sh2->ea );
 }
 
 /*  MOV.B   R0,@(disp8,GBR) */
-INLINE void MOVBSG(UINT32 d)
+INLINE void MOVBSG(sh2_state *sh2, UINT32 d)
 {
 	UINT32 disp = d & 0xff;
 	sh2->ea = sh2->gbr + disp;
-	WB( sh2->ea, sh2->r[0] & 0x000000ff );
+	WB( sh2, sh2->ea, sh2->r[0] & 0x000000ff );
 }
 
 /*  MOV.W   R0,@(disp8,GBR) */
-INLINE void MOVWSG(UINT32 d)
+INLINE void MOVWSG(sh2_state *sh2, UINT32 d)
 {
 	UINT32 disp = d & 0xff;
 	sh2->ea = sh2->gbr + disp * 2;
-	WW( sh2->ea, sh2->r[0] & 0x0000ffff );
+	WW( sh2, sh2->ea, sh2->r[0] & 0x0000ffff );
 }
 
 /*  MOV.L   R0,@(disp8,GBR) */
-INLINE void MOVLSG(UINT32 d)
+INLINE void MOVLSG(sh2_state *sh2, UINT32 d)
 {
 	UINT32 disp = d & 0xff;
 	sh2->ea = sh2->gbr + disp * 4;
-	WL( sh2->ea, sh2->r[0] );
+	WL( sh2, sh2->ea, sh2->r[0] );
 }
 
 /*  MOV.B   R0,@(disp4,Rn) */
-INLINE void MOVBS4(UINT32 d, UINT32 n)
+INLINE void MOVBS4(sh2_state *sh2, UINT32 d, UINT32 n)
 {
 	UINT32 disp = d & 0x0f;
 	sh2->ea = sh2->r[n] + disp;
-	WB( sh2->ea, sh2->r[0] & 0x000000ff );
+	WB( sh2, sh2->ea, sh2->r[0] & 0x000000ff );
 }
 
 /*  MOV.W   R0,@(disp4,Rn) */
-INLINE void MOVWS4(UINT32 d, UINT32 n)
+INLINE void MOVWS4(sh2_state *sh2, UINT32 d, UINT32 n)
 {
 	UINT32 disp = d & 0x0f;
 	sh2->ea = sh2->r[n] + disp * 2;
-	WW( sh2->ea, sh2->r[0] & 0x0000ffff );
+	WW( sh2, sh2->ea, sh2->r[0] & 0x0000ffff );
 }
 
 /* MOV.L Rm,@(disp4,Rn) */
-INLINE void MOVLS4(UINT32 m, UINT32 d, UINT32 n)
+INLINE void MOVLS4(sh2_state *sh2, UINT32 m, UINT32 d, UINT32 n)
 {
 	UINT32 disp = d & 0x0f;
 	sh2->ea = sh2->r[n] + disp * 4;
-	WL( sh2->ea, sh2->r[m] );
+	WL( sh2, sh2->ea, sh2->r[m] );
 }
 
 /*  MOV.B   @(disp4,Rm),R0 */
-INLINE void MOVBL4(UINT32 m, UINT32 d)
+INLINE void MOVBL4(sh2_state *sh2, UINT32 m, UINT32 d)
 {
 	UINT32 disp = d & 0x0f;
 	sh2->ea = sh2->r[m] + disp;
-	sh2->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea );
+	sh2->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( sh2, sh2->ea );
 }
 
 /*  MOV.W   @(disp4,Rm),R0 */
-INLINE void MOVWL4(UINT32 m, UINT32 d)
+INLINE void MOVWL4(sh2_state *sh2, UINT32 m, UINT32 d)
 {
 	UINT32 disp = d & 0x0f;
 	sh2->ea = sh2->r[m] + disp * 2;
-	sh2->r[0] = (UINT32)(INT32)(INT16) RW( sh2->ea );
+	sh2->r[0] = (UINT32)(INT32)(INT16) RW( sh2, sh2->ea );
 }
 
 /*  MOV.L   @(disp4,Rm),Rn */
-INLINE void MOVLL4(UINT32 m, UINT32 d, UINT32 n)
+INLINE void MOVLL4(sh2_state *sh2, UINT32 m, UINT32 d, UINT32 n)
 {
 	UINT32 disp = d & 0x0f;
 	sh2->ea = sh2->r[m] + disp * 4;
-	sh2->r[n] = RL( sh2->ea );
+	sh2->r[n] = RL( sh2, sh2->ea );
 }
 
 /*  MOVA    @(disp8,PC),R0 */
-INLINE void MOVA(UINT32 d)
+INLINE void MOVA(sh2_state *sh2, UINT32 d)
 {
 	UINT32 disp = d & 0xff;
 	sh2->ea = ((sh2->pc + 2) & ~3) + disp * 4;
@@ -1341,38 +1358,38 @@ INLINE void MOVA(UINT32 d)
 }
 
 /*  MOVT    Rn */
-INLINE void MOVT(UINT32 n)
+INLINE void MOVT(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] = sh2->sr & T;
 }
 
 /*  MUL.L   Rm,Rn */
-INLINE void MULL(UINT32 m, UINT32 n)
+INLINE void MULL(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->macl = sh2->r[n] * sh2->r[m];
-	sh2_icount--;
+	sh2->icount--;
 }
 
 /*  MULS    Rm,Rn */
-INLINE void MULS(UINT32 m, UINT32 n)
+INLINE void MULS(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->macl = (INT16) sh2->r[n] * (INT16) sh2->r[m];
 }
 
 /*  MULU    Rm,Rn */
-INLINE void MULU(UINT32 m, UINT32 n)
+INLINE void MULU(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->macl = (UINT16) sh2->r[n] * (UINT16) sh2->r[m];
 }
 
 /*  NEG     Rm,Rn */
-INLINE void NEG(UINT32 m, UINT32 n)
+INLINE void NEG(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] = 0 - sh2->r[m];
 }
 
 /*  NEGC    Rm,Rn */
-INLINE void NEGC(UINT32 m, UINT32 n)
+INLINE void NEGC(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 temp;
 
@@ -1390,37 +1407,37 @@ INLINE void NOP(void)
 }
 
 /*  NOT     Rm,Rn */
-INLINE void NOT(UINT32 m, UINT32 n)
+INLINE void NOT(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] = ~sh2->r[m];
 }
 
 /*  OR      Rm,Rn */
-INLINE void OR(UINT32 m, UINT32 n)
+INLINE void OR(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] |= sh2->r[m];
 }
 
 /*  OR      #imm,R0 */
-INLINE void ORI(UINT32 i)
+INLINE void ORI(sh2_state *sh2, UINT32 i)
 {
 	sh2->r[0] |= i;
-	sh2_icount -= 2;
+	sh2->icount -= 2;
 }
 
 /*  OR.B    #imm,@(R0,GBR) */
-INLINE void ORM(UINT32 i)
+INLINE void ORM(sh2_state *sh2, UINT32 i)
 {
 	UINT32 temp;
 
 	sh2->ea = sh2->gbr + sh2->r[0];
-	temp = RB( sh2->ea );
+	temp = RB( sh2, sh2->ea );
 	temp |= i;
-	WB( sh2->ea, temp );
+	WB( sh2, sh2->ea, temp );
 }
 
 /*  ROTCL   Rn */
-INLINE void ROTCL(UINT32 n)
+INLINE void ROTCL(sh2_state *sh2, UINT32 n)
 {
 	UINT32 temp;
 
@@ -1430,7 +1447,7 @@ INLINE void ROTCL(UINT32 n)
 }
 
 /*  ROTCR   Rn */
-INLINE void ROTCR(UINT32 n)
+INLINE void ROTCR(sh2_state *sh2, UINT32 n)
 {
 	UINT32 temp;
 	temp = (sh2->sr & T) << 31;
@@ -1442,215 +1459,219 @@ INLINE void ROTCR(UINT32 n)
 }
 
 /*  ROTL    Rn */
-INLINE void ROTL(UINT32 n)
+INLINE void ROTL(sh2_state *sh2, UINT32 n)
 {
 	sh2->sr = (sh2->sr & ~T) | ((sh2->r[n] >> 31) & T);
 	sh2->r[n] = (sh2->r[n] << 1) | (sh2->r[n] >> 31);
 }
 
 /*  ROTR    Rn */
-INLINE void ROTR(UINT32 n)
+INLINE void ROTR(sh2_state *sh2, UINT32 n)
 {
 	sh2->sr = (sh2->sr & ~T) | (sh2->r[n] & T);
 	sh2->r[n] = (sh2->r[n] >> 1) | (sh2->r[n] << 31);
 }
 
 /*  RTE */
-INLINE void RTE(void)
+INLINE void RTE(sh2_state *sh2)
 {
 	sh2->ea = sh2->r[15];
 	sh2->delay = sh2->pc;
-	sh2->pc = RL( sh2->ea );
+	sh2->pc = RL( sh2, sh2->ea );
 	sh2->r[15] += 4;
 	sh2->ea = sh2->r[15];
-	sh2->sr &= ~0xfff;
-	sh2->sr |= RL( sh2->ea ) & FLAGS;
+	sh2->sr = RL( sh2, sh2->ea ) & FLAGS;
 	sh2->r[15] += 4;
-	sh2_icount -= 3;
+	sh2->icount -= 3;
 	sh2->test_irq = 1;
 }
 
 /*  RTS */
-INLINE void RTS(void)
+INLINE void RTS(sh2_state *sh2)
 {
 	sh2->delay = sh2->pc;
 	sh2->pc = sh2->ea = sh2->pr;
-	sh2_icount--;
+	sh2->icount--;
 }
 
 /*  SETT */
-INLINE void SETT(void)
+INLINE void SETT(sh2_state *sh2)
 {
 	sh2->sr |= T;
 }
 
 /*  SHAL    Rn      (same as SHLL) */
-INLINE void SHAL(UINT32 n)
+INLINE void SHAL(sh2_state *sh2, UINT32 n)
 {
 	sh2->sr = (sh2->sr & ~T) | ((sh2->r[n] >> 31) & T);
 	sh2->r[n] <<= 1;
 }
 
 /*  SHAR    Rn */
-INLINE void SHAR(UINT32 n)
+INLINE void SHAR(sh2_state *sh2, UINT32 n)
 {
 	sh2->sr = (sh2->sr & ~T) | (sh2->r[n] & T);
 	sh2->r[n] = (UINT32)((INT32)sh2->r[n] >> 1);
 }
 
 /*  SHLL    Rn      (same as SHAL) */
-INLINE void SHLL(UINT32 n)
+INLINE void SHLL(sh2_state *sh2, UINT32 n)
 {
 	sh2->sr = (sh2->sr & ~T) | ((sh2->r[n] >> 31) & T);
 	sh2->r[n] <<= 1;
 }
 
 /*  SHLL2   Rn */
-INLINE void SHLL2(UINT32 n)
+INLINE void SHLL2(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] <<= 2;
 }
 
 /*  SHLL8   Rn */
-INLINE void SHLL8(UINT32 n)
+INLINE void SHLL8(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] <<= 8;
 }
 
 /*  SHLL16  Rn */
-INLINE void SHLL16(UINT32 n)
+INLINE void SHLL16(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] <<= 16;
 }
 
 /*  SHLR    Rn */
-INLINE void SHLR(UINT32 n)
+INLINE void SHLR(sh2_state *sh2, UINT32 n)
 {
 	sh2->sr = (sh2->sr & ~T) | (sh2->r[n] & T);
 	sh2->r[n] >>= 1;
 }
 
 /*  SHLR2   Rn */
-INLINE void SHLR2(UINT32 n)
+INLINE void SHLR2(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] >>= 2;
 }
 
 /*  SHLR8   Rn */
-INLINE void SHLR8(UINT32 n)
+INLINE void SHLR8(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] >>= 8;
 }
 
 /*  SHLR16  Rn */
-INLINE void SHLR16(UINT32 n)
+INLINE void SHLR16(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] >>= 16;
 }
 
 /*  SLEEP */
-INLINE void SLEEP(void)
+INLINE void SLEEP(sh2_state *sh2)
 {
-	sh2->pc -= 2;
-	sh2_icount -= 2;
+	//if(sh2->sleep_mode != 2)
+		sh2->pc -= 2;
+	sh2->icount -= 2;
 	/* Wait_for_exception; */
+	/*if(sh2->sleep_mode == 0)
+		sh2->sleep_mode = 1;
+	else if(sh2->sleep_mode == 2)
+		sh2->sleep_mode = 0;*/
 }
 
 /*  STC     SR,Rn */
-INLINE void STCSR(UINT32 n)
+INLINE void STCSR(sh2_state *sh2, UINT32 n)
 {
-	sh2->r[n] = sh2->sr & FLAGS;
+	sh2->r[n] = sh2->sr;
 }
 
 /*  STC     GBR,Rn */
-INLINE void STCGBR(UINT32 n)
+INLINE void STCGBR(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] = sh2->gbr;
 }
 
 /*  STC     VBR,Rn */
-INLINE void STCVBR(UINT32 n)
+INLINE void STCVBR(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] = sh2->vbr;
 }
 
 /*  STC.L   SR,@-Rn */
-INLINE void STCMSR(UINT32 n)
+INLINE void STCMSR(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] -= 4;
 	sh2->ea = sh2->r[n];
-	WL( sh2->ea, sh2->sr & FLAGS );
-	sh2_icount--;
+	WL( sh2, sh2->ea, sh2->sr );
+	sh2->icount--;
 }
 
 /*  STC.L   GBR,@-Rn */
-INLINE void STCMGBR(UINT32 n)
+INLINE void STCMGBR(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] -= 4;
 	sh2->ea = sh2->r[n];
-	WL( sh2->ea, sh2->gbr );
-	sh2_icount--;
+	WL( sh2, sh2->ea, sh2->gbr );
+	sh2->icount--;
 }
 
 /*  STC.L   VBR,@-Rn */
-INLINE void STCMVBR(UINT32 n)
+INLINE void STCMVBR(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] -= 4;
 	sh2->ea = sh2->r[n];
-	WL( sh2->ea, sh2->vbr );
-	sh2_icount--;
+	WL( sh2, sh2->ea, sh2->vbr );
+	sh2->icount--;
 }
 
 /*  STS     MACH,Rn */
-INLINE void STSMACH(UINT32 n)
+INLINE void STSMACH(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] = sh2->mach;
 }
 
 /*  STS     MACL,Rn */
-INLINE void STSMACL(UINT32 n)
+INLINE void STSMACL(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] = sh2->macl;
 }
 
 /*  STS     PR,Rn */
-INLINE void STSPR(UINT32 n)
+INLINE void STSPR(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] = sh2->pr;
 }
 
 /*  STS.L   MACH,@-Rn */
-INLINE void STSMMACH(UINT32 n)
+INLINE void STSMMACH(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] -= 4;
 	sh2->ea = sh2->r[n];
-	WL( sh2->ea, sh2->mach );
+	WL( sh2, sh2->ea, sh2->mach );
 }
 
 /*  STS.L   MACL,@-Rn */
-INLINE void STSMMACL(UINT32 n)
+INLINE void STSMMACL(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] -= 4;
 	sh2->ea = sh2->r[n];
-	WL( sh2->ea, sh2->macl );
+	WL( sh2, sh2->ea, sh2->macl );
 }
 
 /*  STS.L   PR,@-Rn */
-INLINE void STSMPR(UINT32 n)
+INLINE void STSMPR(sh2_state *sh2, UINT32 n)
 {
 	sh2->r[n] -= 4;
 	sh2->ea = sh2->r[n];
-	WL( sh2->ea, sh2->pr );
+	WL( sh2, sh2->ea, sh2->pr );
 }
 
 /*  SUB     Rm,Rn */
-INLINE void SUB(UINT32 m, UINT32 n)
+INLINE void SUB(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] -= sh2->r[m];
 }
 
 /*  SUBC    Rm,Rn */
-INLINE void SUBC(UINT32 m, UINT32 n)
+INLINE void SUBC(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 tmp0, tmp1;
 
@@ -1666,7 +1687,7 @@ INLINE void SUBC(UINT32 m, UINT32 n)
 }
 
 /*  SUBV    Rm,Rn */
-INLINE void SUBV(UINT32 m, UINT32 n)
+INLINE void SUBV(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	INT32 dest, src, ans;
 
@@ -1697,7 +1718,7 @@ INLINE void SUBV(UINT32 m, UINT32 n)
 }
 
 /*  SWAP.B  Rm,Rn */
-INLINE void SWAPB(UINT32 m, UINT32 n)
+INLINE void SWAPB(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 temp0, temp1;
 
@@ -1708,7 +1729,7 @@ INLINE void SWAPB(UINT32 m, UINT32 n)
 }
 
 /*  SWAP.W  Rm,Rn */
-INLINE void SWAPW(UINT32 m, UINT32 n)
+INLINE void SWAPW(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 temp;
 
@@ -1717,41 +1738,41 @@ INLINE void SWAPW(UINT32 m, UINT32 n)
 }
 
 /*  TAS.B   @Rn */
-INLINE void TAS(UINT32 n)
+INLINE void TAS(sh2_state *sh2, UINT32 n)
 {
 	UINT32 temp;
 	sh2->ea = sh2->r[n];
 	/* Bus Lock enable */
-	temp = RB( sh2->ea );
+	temp = RB( sh2, sh2->ea );
 	if (temp == 0)
 		sh2->sr |= T;
 	else
 		sh2->sr &= ~T;
 	temp |= 0x80;
 	/* Bus Lock disable */
-	WB( sh2->ea, temp );
-	sh2_icount -= 3;
+	WB( sh2, sh2->ea, temp );
+	sh2->icount -= 3;
 }
 
 /*  TRAPA   #imm */
-INLINE void TRAPA(UINT32 i)
+INLINE void TRAPA(sh2_state *sh2, UINT32 i)
 {
 	UINT32 imm = i & 0xff;
 
 	sh2->ea = sh2->vbr + imm * 4;
 
 	sh2->r[15] -= 4;
-	WL( sh2->r[15], sh2->sr & FLAGS );
+	WL( sh2, sh2->r[15], sh2->sr );
 	sh2->r[15] -= 4;
-	WL( sh2->r[15], sh2->pc );
+	WL( sh2, sh2->r[15], sh2->pc );
 
-	sh2->pc = RL( sh2->ea );
+	sh2->pc = RL( sh2, sh2->ea );
 
-	sh2_icount -= 7;
+	sh2->icount -= 7;
 }
 
 /*  TST     Rm,Rn */
-INLINE void TST(UINT32 m, UINT32 n)
+INLINE void TST(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	if ((sh2->r[n] & sh2->r[m]) == 0)
 		sh2->sr |= T;
@@ -1760,7 +1781,7 @@ INLINE void TST(UINT32 m, UINT32 n)
 }
 
 /*  TST     #imm,R0 */
-INLINE void TSTI(UINT32 i)
+INLINE void TSTI(sh2_state *sh2, UINT32 i)
 {
 	UINT32 imm = i & 0xff;
 
@@ -1771,46 +1792,46 @@ INLINE void TSTI(UINT32 i)
 }
 
 /*  TST.B   #imm,@(R0,GBR) */
-INLINE void TSTM(UINT32 i)
+INLINE void TSTM(sh2_state *sh2, UINT32 i)
 {
 	UINT32 imm = i & 0xff;
 
 	sh2->ea = sh2->gbr + sh2->r[0];
-	if ((imm & RB( sh2->ea )) == 0)
+	if ((imm & RB( sh2, sh2->ea )) == 0)
 		sh2->sr |= T;
 	else
 		sh2->sr &= ~T;
-	sh2_icount -= 2;
+	sh2->icount -= 2;
 }
 
 /*  XOR     Rm,Rn */
-INLINE void XOR(UINT32 m, UINT32 n)
+INLINE void XOR(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	sh2->r[n] ^= sh2->r[m];
 }
 
 /*  XOR     #imm,R0 */
-INLINE void XORI(UINT32 i)
+INLINE void XORI(sh2_state *sh2, UINT32 i)
 {
 	UINT32 imm = i & 0xff;
 	sh2->r[0] ^= imm;
 }
 
 /*  XOR.B   #imm,@(R0,GBR) */
-INLINE void XORM(UINT32 i)
+INLINE void XORM(sh2_state *sh2, UINT32 i)
 {
 	UINT32 imm = i & 0xff;
 	UINT32 temp;
 
 	sh2->ea = sh2->gbr + sh2->r[0];
-	temp = RB( sh2->ea );
+	temp = RB( sh2, sh2->ea );
 	temp ^= imm;
-	WB( sh2->ea, temp );
-	sh2_icount -= 2;
+	WB( sh2, sh2->ea, temp );
+	sh2->icount -= 2;
 }
 
 /*  XTRCT   Rm,Rn */
-INLINE void XTRCT(UINT32 m, UINT32 n)
+INLINE void XTRCT(sh2_state *sh2, UINT32 m, UINT32 n)
 {
 	UINT32 temp;
 
@@ -1823,186 +1844,186 @@ INLINE void XTRCT(UINT32 m, UINT32 n)
  *  OPCODE DISPATCHERS
  *****************************************************************************/
 
-INLINE void op0000(UINT16 opcode)
+INLINE void op0000(sh2_state *sh2, UINT16 opcode)
 {
 	switch (opcode & 0x3F)
 	{
-	case 0x00: NOP();		rlog(0);			break;
-	case 0x01: NOP();		rlog(0);			break;
-	case 0x02: STCSR(Rn);		rlog(LRN); 			break;
-	case 0x03: BSRF(Rn);		rlog(LRN); 			break;
-	case 0x04: MOVBS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x05: MOVWS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x06: MOVLS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x07: MULL(Rm, Rn);	rlog(LRNM); rlog1(SHR_MACL);	break;
-	case 0x08: CLRT();		rlog(0);			break;
+	case 0x00: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x01: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x02: STCSR(sh2, Rn);	rlog(LRN); 			break;
+	case 0x03: BSRF(sh2, Rn);	rlog(LRN); 			break;
+	case 0x04: MOVBS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x05: MOVWS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x06: MOVLS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x07: MULL(sh2, Rm, Rn);	rlog(LRNM); rlog1(SHR_MACL);	break;
+	case 0x08: CLRT(sh2);		rlog(0);			break;
 	case 0x09: NOP();		rlog(0);			break;
-	case 0x0a: STSMACH(Rn); 	rlog(LRN);  rlog1(SHR_MACH); 	break;
-	case 0x0b: RTS();		rlog(0);    rlog1(SHR_PR);	break;
-	case 0x0c: MOVBL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x0d: MOVWL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x0e: MOVLL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x0f: MAC_L(Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
-
-	case 0x10: NOP();		rlog(0);			break;
-	case 0x11: NOP();		rlog(0);			break;
-	case 0x12: STCGBR(Rn);		rlog(LRN);  rlog1(SHR_GBR);	break;
-	case 0x13: NOP();		rlog(0);			break;
-	case 0x14: MOVBS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x15: MOVWS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x16: MOVLS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x17: MULL(Rm, Rn);	rlog(LRNM); rlog1(SHR_MACL);	break;
-	case 0x18: SETT();		rlog(0);			break;
-	case 0x19: DIV0U(); 		rlog(0);			break;
-	case 0x1a: STSMACL(Rn); 	rlog(LRN);  rlog1(SHR_MACL);	break;
-	case 0x1b: SLEEP(); 		rlog(0);			break;
-	case 0x1c: MOVBL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x1d: MOVWL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x1e: MOVLL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x1f: MAC_L(Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
-
-	case 0x20: NOP();		rlog(0);			break;
-	case 0x21: NOP();		rlog(0);			break;
-	case 0x22: STCVBR(Rn);		rlog(LRN);  rlog1(SHR_VBR);	break;
-	case 0x23: BRAF(Rn);		rlog(LRN);			break;
-	case 0x24: MOVBS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x25: MOVWS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x26: MOVLS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x27: MULL(Rm, Rn);	rlog(LRNM); rlog1(SHR_MACL);	break;
-	case 0x28: CLRMAC();		rlog(0);    rlog2(SHR_MACL,SHR_MACH); break;
-	case 0x29: MOVT(Rn);		rlog(LRN);			break;
-	case 0x2a: STSPR(Rn);		rlog(LRN);  rlog1(SHR_PR);	break;
-	case 0x2b: RTE();		rlog(0);			break;
-	case 0x2c: MOVBL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x2d: MOVWL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x2e: MOVLL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x2f: MAC_L(Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
-
-	case 0x30: NOP();		rlog(0);			break;
-	case 0x31: NOP();		rlog(0);			break;
-	case 0x32: NOP();		rlog(0);			break;
-	case 0x33: NOP();		rlog(0);			break;
-	case 0x34: MOVBS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x35: MOVWS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x36: MOVLS0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x37: MULL(Rm, Rn);	rlog(LRNM); rlog1(SHR_MACL);	break;
-	case 0x38: NOP();		rlog(0);			break;
-	case 0x39: NOP();		rlog(0);			break;
-	case 0x3c: MOVBL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x3d: MOVWL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x3e: MOVLL0(Rm, Rn);	rlog(LRNM); rlog1(0);		break;
-	case 0x3f: MAC_L(Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
-	case 0x3a: NOP();		rlog(0);			break;
-	case 0x3b: NOP();		rlog(0);			break;
+	case 0x0a: STSMACH(sh2, Rn); 	rlog(LRN);  rlog1(SHR_MACH); 	break;
+	case 0x0b: RTS(sh2);		rlog(0);    rlog1(SHR_PR);	break;
+	case 0x0c: MOVBL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x0d: MOVWL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x0e: MOVLL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x0f: MAC_L(sh2, Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
+
+	case 0x10: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x11: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x12: STCGBR(sh2, Rn);	rlog(LRN);  rlog1(SHR_GBR);	break;
+	case 0x13: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x14: MOVBS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x15: MOVWS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x16: MOVLS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x17: MULL(sh2, Rm, Rn);	rlog(LRNM); rlog1(SHR_MACL);	break;
+	case 0x18: SETT(sh2);		rlog(0);			break;
+	case 0x19: DIV0U(sh2); 		rlog(0);			break;
+	case 0x1a: STSMACL(sh2, Rn); 	rlog(LRN);  rlog1(SHR_MACL);	break;
+	case 0x1b: SLEEP(sh2); 		rlog(0);			break;
+	case 0x1c: MOVBL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x1d: MOVWL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x1e: MOVLL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x1f: MAC_L(sh2, Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
+
+	case 0x20: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x21: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x22: STCVBR(sh2, Rn);	rlog(LRN);  rlog1(SHR_VBR);	break;
+	case 0x23: BRAF(sh2, Rn);	rlog(LRN);			break;
+	case 0x24: MOVBS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x25: MOVWS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x26: MOVLS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x27: MULL(sh2, Rm, Rn);	rlog(LRNM); rlog1(SHR_MACL);	break;
+	case 0x28: CLRMAC(sh2);		rlog(0);    rlog2(SHR_MACL,SHR_MACH); break;
+	case 0x29: MOVT(sh2, Rn);	rlog(LRN);			break;
+	case 0x2a: STSPR(sh2, Rn);	rlog(LRN);  rlog1(SHR_PR);	break;
+	case 0x2b: RTE(sh2);		rlog(0);			break;
+	case 0x2c: MOVBL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x2d: MOVWL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x2e: MOVLL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x2f: MAC_L(sh2, Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
+
+	case 0x30: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x31: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x32: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x33: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x34: MOVBS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x35: MOVWS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x36: MOVLS0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x37: MULL(sh2, Rm, Rn);	rlog(LRNM); rlog1(SHR_MACL);	break;
+	case 0x38: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x39: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x3c: MOVBL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x3d: MOVWL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x3e: MOVLL0(sh2, Rm, Rn);	rlog(LRNM); rlog1(0);		break;
+	case 0x3f: MAC_L(sh2, Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
+	case 0x3a: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x3b: ILLEGAL(sh2);	rlog(0);			break;
 	}
 }
 
-INLINE void op0001(UINT16 opcode)
+INLINE void op0001(sh2_state *sh2, UINT16 opcode)
 {
-	MOVLS4(Rm, opcode & 0x0f, Rn);
+	MOVLS4(sh2, Rm, opcode & 0x0f, Rn);
 	rlog(LRNM);
 }
 
-INLINE void op0010(UINT16 opcode)
+INLINE void op0010(sh2_state *sh2, UINT16 opcode)
 {
 	switch (opcode & 15)
 	{
-	case  0: MOVBS(Rm, Rn); 	rlog(LRNM);			break;
-	case  1: MOVWS(Rm, Rn); 	rlog(LRNM);			break;
-	case  2: MOVLS(Rm, Rn); 	rlog(LRNM);			break;
-	case  3: NOP(); 		rlog(0);			break;
-	case  4: MOVBM(Rm, Rn); 	rlog(LRNM);			break;
-	case  5: MOVWM(Rm, Rn); 	rlog(LRNM);			break;
-	case  6: MOVLM(Rm, Rn); 	rlog(LRNM);			break;
-	case  7: DIV0S(Rm, Rn); 	rlog(LRNM);			break;
-	case  8: TST(Rm, Rn);		rlog(LRNM);			break;
-	case  9: AND(Rm, Rn);		rlog(LRNM);			break;
-	case 10: XOR(Rm, Rn);		rlog(LRNM);			break;
-	case 11: OR(Rm, Rn);		rlog(LRNM);			break;
-	case 12: CMPSTR(Rm, Rn);	rlog(LRNM);			break;
-	case 13: XTRCT(Rm, Rn); 	rlog(LRNM);			break;
-	case 14: MULU(Rm, Rn);		rlog(LRNM); rlog1(SHR_MACL);	break;
-	case 15: MULS(Rm, Rn);		rlog(LRNM); rlog1(SHR_MACL);	break;
+	case  0: MOVBS(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  1: MOVWS(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  2: MOVLS(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  3: ILLEGAL(sh2);		rlog(0);			break;
+	case  4: MOVBM(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  5: MOVWM(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  6: MOVLM(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  7: DIV0S(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  8: TST(sh2, Rm, Rn);	rlog(LRNM);			break;
+	case  9: AND(sh2, Rm, Rn);	rlog(LRNM);			break;
+	case 10: XOR(sh2, Rm, Rn);	rlog(LRNM);			break;
+	case 11: OR(sh2, Rm, Rn);	rlog(LRNM);			break;
+	case 12: CMPSTR(sh2, Rm, Rn);	rlog(LRNM);			break;
+	case 13: XTRCT(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case 14: MULU(sh2, Rm, Rn);	rlog(LRNM); rlog1(SHR_MACL);	break;
+	case 15: MULS(sh2, Rm, Rn);	rlog(LRNM); rlog1(SHR_MACL);	break;
 	}
 }
 
-INLINE void op0011(UINT16 opcode)
+INLINE void op0011(sh2_state *sh2, UINT16 opcode)
 {
 	switch (opcode & 15)
 	{
-	case  0: CMPEQ(Rm, Rn); 	rlog(LRNM);			break;
-	case  1: NOP(); 		rlog(0);			break;
-	case  2: CMPHS(Rm, Rn); 	rlog(LRNM);			break;
-	case  3: CMPGE(Rm, Rn); 	rlog(LRNM);			break;
-	case  4: DIV1(Rm, Rn);		rlog(LRNM);			break;
-	case  5: DMULU(Rm, Rn); 	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
-	case  6: CMPHI(Rm, Rn); 	rlog(LRNM);			break;
-	case  7: CMPGT(Rm, Rn); 	rlog(LRNM);			break;
-	case  8: SUB(Rm, Rn);		rlog(LRNM);			break;
-	case  9: NOP(); 		rlog(0);			break;
-	case 10: SUBC(Rm, Rn);		rlog(LRNM);			break;
-	case 11: SUBV(Rm, Rn);		rlog(LRNM);			break;
-	case 12: ADD(Rm, Rn);		rlog(LRNM);			break;
-	case 13: DMULS(Rm, Rn); 	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
-	case 14: ADDC(Rm, Rn);		rlog(LRNM);			break;
-	case 15: ADDV(Rm, Rn);		rlog(LRNM);			break;
+	case  0: CMPEQ(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  1: ILLEGAL(sh2);		rlog(0);			break;
+	case  2: CMPHS(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  3: CMPGE(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  4: DIV1(sh2, Rm, Rn);	rlog(LRNM);			break;
+	case  5: DMULU(sh2, Rm, Rn); 	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
+	case  6: CMPHI(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  7: CMPGT(sh2, Rm, Rn); 	rlog(LRNM);			break;
+	case  8: SUB(sh2, Rm, Rn);	rlog(LRNM);			break;
+	case  9: ILLEGAL(sh2);		rlog(0);			break;
+	case 10: SUBC(sh2, Rm, Rn);	rlog(LRNM);			break;
+	case 11: SUBV(sh2, Rm, Rn);	rlog(LRNM);			break;
+	case 12: ADD(sh2, Rm, Rn);	rlog(LRNM);			break;
+	case 13: DMULS(sh2, Rm, Rn); 	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
+	case 14: ADDC(sh2, Rm, Rn);	rlog(LRNM);			break;
+	case 15: ADDV(sh2, Rm, Rn);	rlog(LRNM);			break;
 	}
 }
 
-INLINE void op0100(UINT16 opcode)
+INLINE void op0100(sh2_state *sh2, UINT16 opcode)
 {
 	switch (opcode & 0x3F)
 	{
-	case 0x00: SHLL(Rn);		rlog(LRN);			break;
-	case 0x01: SHLR(Rn);		rlog(LRN);			break;
-	case 0x02: STSMMACH(Rn);	rlog(LRN); rlog1(SHR_MACH);	break;
-	case 0x03: STCMSR(Rn);		rlog(LRN);			break;
-	case 0x04: ROTL(Rn);		rlog(LRN);			break;
-	case 0x05: ROTR(Rn);		rlog(LRN);			break;
-	case 0x06: LDSMMACH(Rn);	rlog(LRN); rlog1(SHR_MACH);	break;
-	case 0x07: LDCMSR(Rn);		rlog(LRN);			break;
-	case 0x08: SHLL2(Rn);		rlog(LRN);			break;
-	case 0x09: SHLR2(Rn);		rlog(LRN);			break;
-	case 0x0a: LDSMACH(Rn); 	rlog(LRN); rlog1(SHR_MACH);	break;
-	case 0x0b: JSR(Rn); 		rlog(LRN); rlog1(SHR_PR);	break;
-	case 0x0c: NOP();		rlog(0);			break;
-	case 0x0d: NOP();		rlog(0);			break;
-	case 0x0e: LDCSR(Rn);		rlog(LRN);			break;
-	case 0x0f: MAC_W(Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
-
-	case 0x10: DT(Rn);		rlog(LRN);			break;
-	case 0x11: CMPPZ(Rn);		rlog(LRN);			break;
-	case 0x12: STSMMACL(Rn);	rlog(LRN); rlog1(SHR_MACL);	break;
-	case 0x13: STCMGBR(Rn); 	rlog(LRN); rlog1(SHR_GBR);	break;
-	case 0x14: NOP();		rlog(0);			break;
-	case 0x15: CMPPL(Rn);		rlog(LRN);			break;
-	case 0x16: LDSMMACL(Rn);	rlog(LRN); rlog1(SHR_MACL);	break;
-	case 0x17: LDCMGBR(Rn); 	rlog(LRN); rlog1(SHR_GBR);	break;
-	case 0x18: SHLL8(Rn);		rlog(LRN);			break;
-	case 0x19: SHLR8(Rn);		rlog(LRN);			break;
-	case 0x1a: LDSMACL(Rn); 	rlog(LRN); rlog1(SHR_MACL);	break;
-	case 0x1b: TAS(Rn); 		rlog(LRN);			break;
-	case 0x1c: NOP();		rlog(0);			break;
-	case 0x1d: NOP();		rlog(0);			break;
-	case 0x1e: LDCGBR(Rn);		rlog(LRN); rlog1(SHR_GBR);	break;
-	case 0x1f: MAC_W(Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
-
-	case 0x20: SHAL(Rn);		rlog(LRN);			break;
-	case 0x21: SHAR(Rn);		rlog(LRN);			break;
-	case 0x22: STSMPR(Rn);		rlog(LRN); rlog1(SHR_PR);	break;
-	case 0x23: STCMVBR(Rn); 	rlog(LRN); rlog1(SHR_VBR);	break;
-	case 0x24: ROTCL(Rn);		rlog(LRN);			break;
-	case 0x25: ROTCR(Rn);		rlog(LRN);			break;
-	case 0x26: LDSMPR(Rn);		rlog(LRN); rlog1(SHR_PR);	break;
-	case 0x27: LDCMVBR(Rn); 	rlog(LRN); rlog1(SHR_VBR);	break;
-	case 0x28: SHLL16(Rn);		rlog(LRN);			break;
-	case 0x29: SHLR16(Rn);		rlog(LRN);			break;
-	case 0x2a: LDSPR(Rn);		rlog(LRN); rlog1(SHR_PR);	break;
-	case 0x2b: JMP(Rn); 		rlog(LRN);			break;
-	case 0x2c: NOP();		rlog(0);			break;
-	case 0x2d: NOP();		rlog(0);			break;
-	case 0x2e: LDCVBR(Rn);		rlog(LRN); rlog1(SHR_VBR);	break;
-	case 0x2f: MAC_W(Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
+	case 0x00: SHLL(sh2, Rn);	rlog(LRN);			break;
+	case 0x01: SHLR(sh2, Rn);	rlog(LRN);			break;
+	case 0x02: STSMMACH(sh2, Rn);	rlog(LRN); rlog1(SHR_MACH);	break;
+	case 0x03: STCMSR(sh2, Rn);	rlog(LRN);			break;
+	case 0x04: ROTL(sh2, Rn);	rlog(LRN);			break;
+	case 0x05: ROTR(sh2, Rn);	rlog(LRN);			break;
+	case 0x06: LDSMMACH(sh2, Rn);	rlog(LRN); rlog1(SHR_MACH);	break;
+	case 0x07: LDCMSR(sh2, Rn);	rlog(LRN);			break;
+	case 0x08: SHLL2(sh2, Rn);	rlog(LRN);			break;
+	case 0x09: SHLR2(sh2, Rn);	rlog(LRN);			break;
+	case 0x0a: LDSMACH(sh2, Rn); 	rlog(LRN); rlog1(SHR_MACH);	break;
+	case 0x0b: JSR(sh2, Rn); 	rlog(LRN); rlog1(SHR_PR);	break;
+	case 0x0c: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x0d: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x0e: LDCSR(sh2, Rn);	rlog(LRN);			break;
+	case 0x0f: MAC_W(sh2, Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
+
+	case 0x10: DT(sh2, Rn);		rlog(LRN);			break;
+	case 0x11: CMPPZ(sh2, Rn);	rlog(LRN);			break;
+	case 0x12: STSMMACL(sh2, Rn);	rlog(LRN); rlog1(SHR_MACL);	break;
+	case 0x13: STCMGBR(sh2, Rn); 	rlog(LRN); rlog1(SHR_GBR);	break;
+	case 0x14: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x15: CMPPL(sh2, Rn);	rlog(LRN);			break;
+	case 0x16: LDSMMACL(sh2, Rn);	rlog(LRN); rlog1(SHR_MACL);	break;
+	case 0x17: LDCMGBR(sh2, Rn); 	rlog(LRN); rlog1(SHR_GBR);	break;
+	case 0x18: SHLL8(sh2, Rn);	rlog(LRN);			break;
+	case 0x19: SHLR8(sh2, Rn);	rlog(LRN);			break;
+	case 0x1a: LDSMACL(sh2, Rn); 	rlog(LRN); rlog1(SHR_MACL);	break;
+	case 0x1b: TAS(sh2, Rn); 	rlog(LRN);			break;
+	case 0x1c: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x1d: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x1e: LDCGBR(sh2, Rn);	rlog(LRN); rlog1(SHR_GBR);	break;
+	case 0x1f: MAC_W(sh2, Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
+
+	case 0x20: SHAL(sh2, Rn);	rlog(LRN);			break;
+	case 0x21: SHAR(sh2, Rn);	rlog(LRN);			break;
+	case 0x22: STSMPR(sh2, Rn);	rlog(LRN); rlog1(SHR_PR);	break;
+	case 0x23: STCMVBR(sh2, Rn); 	rlog(LRN); rlog1(SHR_VBR);	break;
+	case 0x24: ROTCL(sh2, Rn);	rlog(LRN);			break;
+	case 0x25: ROTCR(sh2, Rn);	rlog(LRN);			break;
+	case 0x26: LDSMPR(sh2, Rn);	rlog(LRN); rlog1(SHR_PR);	break;
+	case 0x27: LDCMVBR(sh2, Rn); 	rlog(LRN); rlog1(SHR_VBR);	break;
+	case 0x28: SHLL16(sh2, Rn);	rlog(LRN);			break;
+	case 0x29: SHLR16(sh2, Rn);	rlog(LRN);			break;
+	case 0x2a: LDSPR(sh2, Rn);	rlog(LRN); rlog1(SHR_PR);	break;
+	case 0x2b: JMP(sh2, Rn); 	rlog(LRN);			break;
+	case 0x2c: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x2d: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x2e: LDCVBR(sh2, Rn);	rlog(LRN); rlog1(SHR_VBR);	break;
+	case 0x2f: MAC_W(sh2, Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
 
 	case 0x30:
 	case 0x31:
@@ -2018,129 +2039,129 @@ INLINE void op0100(UINT16 opcode)
 	case 0x3b:
 	case 0x3c:
 	case 0x3d:
-	case 0x3e: NOP();		rlog(0);			break;
-	case 0x3f: MAC_W(Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
+	case 0x3e: ILLEGAL(sh2);	rlog(0);			break;
+	case 0x3f: MAC_W(sh2, Rm, Rn);	rlog(LRNM); rlog2(SHR_MACL,SHR_MACH); break;
 	}
 }
 
-INLINE void op0101(UINT16 opcode)
+INLINE void op0101(sh2_state *sh2, UINT16 opcode)
 {
-	MOVLL4(Rm, opcode & 0x0f, Rn);
+	MOVLL4(sh2, Rm, opcode & 0x0f, Rn);
 	rlog(LRNM);
 }
 
-INLINE void op0110(UINT16 opcode)
+INLINE void op0110(sh2_state *sh2, UINT16 opcode)
 {
 	switch (opcode & 15)
 	{
-	case  0: MOVBL(Rm, Rn); 				break;
-	case  1: MOVWL(Rm, Rn); 				break;
-	case  2: MOVLL(Rm, Rn); 				break;
-	case  3: MOV(Rm, Rn);					break;
-	case  4: MOVBP(Rm, Rn); 				break;
-	case  5: MOVWP(Rm, Rn); 				break;
-	case  6: MOVLP(Rm, Rn); 				break;
-	case  7: NOT(Rm, Rn);					break;
-	case  8: SWAPB(Rm, Rn); 				break;
-	case  9: SWAPW(Rm, Rn); 				break;
-	case 10: NEGC(Rm, Rn);					break;
-	case 11: NEG(Rm, Rn);					break;
-	case 12: EXTUB(Rm, Rn); 				break;
-	case 13: EXTUW(Rm, Rn); 				break;
-	case 14: EXTSB(Rm, Rn); 				break;
-	case 15: EXTSW(Rm, Rn); 				break;
+	case  0: MOVBL(sh2, Rm, Rn); 				break;
+	case  1: MOVWL(sh2, Rm, Rn); 				break;
+	case  2: MOVLL(sh2, Rm, Rn); 				break;
+	case  3: MOV(sh2, Rm, Rn);				break;
+	case  4: MOVBP(sh2, Rm, Rn); 				break;
+	case  5: MOVWP(sh2, Rm, Rn); 				break;
+	case  6: MOVLP(sh2, Rm, Rn); 				break;
+	case  7: NOT(sh2, Rm, Rn);				break;
+	case  8: SWAPB(sh2, Rm, Rn); 				break;
+	case  9: SWAPW(sh2, Rm, Rn); 				break;
+	case 10: NEGC(sh2, Rm, Rn);				break;
+	case 11: NEG(sh2, Rm, Rn);				break;
+	case 12: EXTUB(sh2, Rm, Rn); 				break;
+	case 13: EXTUW(sh2, Rm, Rn); 				break;
+	case 14: EXTSB(sh2, Rm, Rn); 				break;
+	case 15: EXTSW(sh2, Rm, Rn); 				break;
 	}
 	rlog(LRNM);
 }
 
-INLINE void op0111(UINT16 opcode)
+INLINE void op0111(sh2_state *sh2, UINT16 opcode)
 {
-	ADDI(opcode & 0xff, Rn);
+	ADDI(sh2, opcode & 0xff, Rn);
 	rlog(LRN);
 }
 
-INLINE void op1000(UINT16 opcode)
+INLINE void op1000(sh2_state *sh2, UINT16 opcode)
 {
 	switch ( opcode  & (15<<8) )
 	{
-	case  0<< 8: MOVBS4(opcode & 0x0f, Rm); rlog(LRM); rlog1(0);	break;
-	case  1<< 8: MOVWS4(opcode & 0x0f, Rm); rlog(LRM); rlog1(0);	break;
-	case  2<< 8: NOP(); 			rlog(0);		break;
-	case  3<< 8: NOP(); 			rlog(0);		break;
-	case  4<< 8: MOVBL4(Rm, opcode & 0x0f); rlog(LRM); rlog1(0);	break;
-	case  5<< 8: MOVWL4(Rm, opcode & 0x0f); rlog(LRM); rlog1(0);	break;
-	case  6<< 8: NOP(); 			rlog(0);	break;
-	case  7<< 8: NOP(); 			rlog(0);	break;
-	case  8<< 8: CMPIM(opcode & 0xff);	rlog(0);   rlog1(0);	break;
-	case  9<< 8: BT(opcode & 0xff); 	rlog(0);	break;
-	case 10<< 8: NOP(); 			rlog(0);	break;
-	case 11<< 8: BF(opcode & 0xff); 	rlog(0);	break;
-	case 12<< 8: NOP(); 			rlog(0);	break;
-	case 13<< 8: BTS(opcode & 0xff);	rlog(0);	break;
-	case 14<< 8: NOP(); 			rlog(0);	break;
-	case 15<< 8: BFS(opcode & 0xff);	rlog(0);	break;
+	case  0<< 8: MOVBS4(sh2, opcode & 0x0f, Rm);	rlog(LRM); rlog1(0);	break;
+	case  1<< 8: MOVWS4(sh2, opcode & 0x0f, Rm);	rlog(LRM); rlog1(0);	break;
+	case  2<< 8: ILLEGAL(sh2); 			rlog(0);		break;
+	case  3<< 8: ILLEGAL(sh2); 			rlog(0);		break;
+	case  4<< 8: MOVBL4(sh2, Rm, opcode & 0x0f);	rlog(LRM); rlog1(0);	break;
+	case  5<< 8: MOVWL4(sh2, Rm, opcode & 0x0f);	rlog(LRM); rlog1(0);	break;
+	case  6<< 8: ILLEGAL(sh2); 			rlog(0);		break;
+	case  7<< 8: ILLEGAL(sh2); 			rlog(0);		break;
+	case  8<< 8: CMPIM(sh2, opcode & 0xff);		rlog(0);   rlog1(0);	break;
+	case  9<< 8: BT(sh2, opcode & 0xff); 		rlog(0);	break;
+	case 10<< 8: ILLEGAL(sh2); 			rlog(0);	break;
+	case 11<< 8: BF(sh2, opcode & 0xff); 		rlog(0);	break;
+	case 12<< 8: ILLEGAL(sh2); 			rlog(0);	break;
+	case 13<< 8: BTS(sh2, opcode & 0xff);		rlog(0);	break;
+	case 14<< 8: ILLEGAL(sh2); 			rlog(0);	break;
+	case 15<< 8: BFS(sh2, opcode & 0xff);		rlog(0);	break;
 	}
 }
 
 
-INLINE void op1001(UINT16 opcode)
+INLINE void op1001(sh2_state *sh2, UINT16 opcode)
 {
-	MOVWI(opcode & 0xff, Rn);
+	MOVWI(sh2, opcode & 0xff, Rn);
 	rlog(LRN);
 }
 
-INLINE void op1010(UINT16 opcode)
+INLINE void op1010(sh2_state *sh2, UINT16 opcode)
 {
-	BRA(opcode & 0xfff);
+	BRA(sh2, opcode & 0xfff);
 	rlog(0);
 }
 
-INLINE void op1011(UINT16 opcode)
+INLINE void op1011(sh2_state *sh2, UINT16 opcode)
 {
-	BSR(opcode & 0xfff);
+	BSR(sh2, opcode & 0xfff);
 	rlog(0);
 	rlog1(SHR_PR);
 }
 
-INLINE void op1100(UINT16 opcode)
+INLINE void op1100(sh2_state *sh2, UINT16 opcode)
 {
 	switch (opcode & (15<<8))
 	{
-	case  0<<8: MOVBSG(opcode & 0xff); 	rlog2(0, SHR_GBR);	break;
-	case  1<<8: MOVWSG(opcode & 0xff); 	rlog2(0, SHR_GBR);	break;
-	case  2<<8: MOVLSG(opcode & 0xff); 	rlog2(0, SHR_GBR);	break;
-	case  3<<8: TRAPA(opcode & 0xff);	rlog1(SHR_VBR);		break;
-	case  4<<8: MOVBLG(opcode & 0xff); 	rlog2(0, SHR_GBR);	break;
-	case  5<<8: MOVWLG(opcode & 0xff); 	rlog2(0, SHR_GBR);	break;
-	case  6<<8: MOVLLG(opcode & 0xff); 	rlog2(0, SHR_GBR);	break;
-	case  7<<8: MOVA(opcode & 0xff);	rlog1(0);		break;
-	case  8<<8: TSTI(opcode & 0xff);	rlog1(0);		break;
-	case  9<<8: ANDI(opcode & 0xff);	rlog1(0);		break;
-	case 10<<8: XORI(opcode & 0xff);	rlog1(0);		break;
-	case 11<<8: ORI(opcode & 0xff);		rlog1(0);		break;
-	case 12<<8: TSTM(opcode & 0xff);	rlog2(0, SHR_GBR);	break;
-	case 13<<8: ANDM(opcode & 0xff);	rlog2(0, SHR_GBR);	break;
-	case 14<<8: XORM(opcode & 0xff);	rlog2(0, SHR_GBR);	break;
-	case 15<<8: ORM(opcode & 0xff);		rlog2(0, SHR_GBR);	break;
+	case  0<<8: MOVBSG(sh2, opcode & 0xff); rlog2(0, SHR_GBR);	break;
+	case  1<<8: MOVWSG(sh2, opcode & 0xff); rlog2(0, SHR_GBR);	break;
+	case  2<<8: MOVLSG(sh2, opcode & 0xff); rlog2(0, SHR_GBR);	break;
+	case  3<<8: TRAPA(sh2, opcode & 0xff);	rlog1(SHR_VBR);		break;
+	case  4<<8: MOVBLG(sh2, opcode & 0xff); rlog2(0, SHR_GBR);	break;
+	case  5<<8: MOVWLG(sh2, opcode & 0xff); rlog2(0, SHR_GBR);	break;
+	case  6<<8: MOVLLG(sh2, opcode & 0xff); rlog2(0, SHR_GBR);	break;
+	case  7<<8: MOVA(sh2, opcode & 0xff);	rlog1(0);		break;
+	case  8<<8: TSTI(sh2, opcode & 0xff);	rlog1(0);		break;
+	case  9<<8: ANDI(sh2, opcode & 0xff);	rlog1(0);		break;
+	case 10<<8: XORI(sh2, opcode & 0xff);	rlog1(0);		break;
+	case 11<<8: ORI(sh2, opcode & 0xff);	rlog1(0);		break;
+	case 12<<8: TSTM(sh2, opcode & 0xff);	rlog2(0, SHR_GBR);	break;
+	case 13<<8: ANDM(sh2, opcode & 0xff);	rlog2(0, SHR_GBR);	break;
+	case 14<<8: XORM(sh2, opcode & 0xff);	rlog2(0, SHR_GBR);	break;
+	case 15<<8: ORM(sh2, opcode & 0xff);	rlog2(0, SHR_GBR);	break;
 	}
 	rlog(0);
 }
 
-INLINE void op1101(UINT16 opcode)
+INLINE void op1101(sh2_state *sh2, UINT16 opcode)
 {
-	MOVLI(opcode & 0xff, Rn);
+	MOVLI(sh2, opcode & 0xff, Rn);
 	rlog(LRN);
 }
 
-INLINE void op1110(UINT16 opcode)
+INLINE void op1110(sh2_state *sh2, UINT16 opcode)
 {
-	MOVI(opcode & 0xff, Rn);
+	MOVI(sh2, opcode & 0xff, Rn);
 	rlog(LRN);
 }
 
-INLINE void op1111(UINT16 opcode)
+INLINE void op1111(sh2_state *sh2, UINT16 opcode)
 {
-	NOP();
+	ILLEGAL(sh2);
 	rlog(0);
 }
 
diff --git a/cpu/sh2/mame/sh2pico.c b/cpu/sh2/mame/sh2pico.c
index d788316..cc6dce3 100644
--- a/cpu/sh2/mame/sh2pico.c
+++ b/cpu/sh2/mame/sh2pico.c
@@ -8,12 +8,12 @@ typedef unsigned int   UINT32;
 typedef unsigned short UINT16;
 typedef unsigned char  UINT8;
 
-#define RB(a) p32x_sh2_read8(a,sh2)
-#define RW(a) p32x_sh2_read16(a,sh2)
-#define RL(a) p32x_sh2_read32(a,sh2)
-#define WB(a,d) p32x_sh2_write8(a,d,sh2)
-#define WW(a,d) p32x_sh2_write16(a,d,sh2)
-#define WL(a,d) p32x_sh2_write32(a,d,sh2)
+#define RB(sh2, a) p32x_sh2_read8(a,sh2)
+#define RW(sh2, a) p32x_sh2_read16(a,sh2)
+#define RL(sh2, a) p32x_sh2_read32(a,sh2)
+#define WB(sh2, a, d) p32x_sh2_write8(a,d,sh2)
+#define WW(sh2, a, d) p32x_sh2_write16(a,d,sh2)
+#define WL(sh2, a, d) p32x_sh2_write32(a,d,sh2)
 
 // some stuff from sh2comn.h
 #define T	0x00000001
@@ -29,7 +29,10 @@ typedef unsigned char  UINT8;
 #define Rn	((opcode>>8)&15)
 #define Rm	((opcode>>4)&15)
 
-#define sh2_icount sh2->icount
+#define sh2_state SH2
+
+extern void lprintf(const char *fmt, ...);
+#define logerror lprintf
 
 #ifdef SH2_STATS
 static SH2 sh2_stats;
@@ -61,7 +64,7 @@ static unsigned int op_refs[0x10000];
 
 #ifndef DRC_SH2
 
-int sh2_execute(SH2 *sh2_, int cycles)
+int sh2_execute(SH2 *sh2, int cycles)
 {
 	sh2 = sh2_;
 	sh2->icount = cycles;
@@ -78,13 +81,13 @@ int sh2_execute(SH2 *sh2_, int cycles)
 		if (sh2->delay)
 		{
 			sh2->ppc = sh2->delay;
-			opcode = RW(sh2->delay);
+			opcode = RW(sh2, sh2->delay);
 			sh2->pc -= 2;
 		}
 		else
 		{
 			sh2->ppc = sh2->pc;
-			opcode = RW(sh2->pc);
+			opcode = RW(sh2, sh2->pc);
 		}
 
 		sh2->delay = 0;
@@ -92,22 +95,22 @@ int sh2_execute(SH2 *sh2_, int cycles)
 
 		switch (opcode & ( 15 << 12))
 		{
-		case  0<<12: op0000(opcode); break;
-		case  1<<12: op0001(opcode); break;
-		case  2<<12: op0010(opcode); break;
-		case  3<<12: op0011(opcode); break;
-		case  4<<12: op0100(opcode); break;
-		case  5<<12: op0101(opcode); break;
-		case  6<<12: op0110(opcode); break;
-		case  7<<12: op0111(opcode); break;
-		case  8<<12: op1000(opcode); break;
-		case  9<<12: op1001(opcode); break;
-		case 10<<12: op1010(opcode); break;
-		case 11<<12: op1011(opcode); break;
-		case 12<<12: op1100(opcode); break;
-		case 13<<12: op1101(opcode); break;
-		case 14<<12: op1110(opcode); break;
-		default: op1111(opcode); break;
+		case  0<<12: op0000(sh2, opcode); break;
+		case  1<<12: op0001(sh2, opcode); break;
+		case  2<<12: op0010(sh2, opcode); break;
+		case  3<<12: op0011(sh2, opcode); break;
+		case  4<<12: op0100(sh2, opcode); break;
+		case  5<<12: op0101(sh2, opcode); break;
+		case  6<<12: op0110(sh2, opcode); break;
+		case  7<<12: op0111(sh2, opcode); break;
+		case  8<<12: op1000(sh2, opcode); break;
+		case  9<<12: op1001(sh2, opcode); break;
+		case 10<<12: op1010(sh2, opcode); break;
+		case 11<<12: op1011(sh2, opcode); break;
+		case 12<<12: op1100(sh2, opcode); break;
+		case 13<<12: op1101(sh2, opcode); break;
+		case 14<<12: op1110(sh2, opcode); break;
+		default: op1111(sh2, opcode); break;
 		}
 
 		sh2->icount--;
@@ -135,29 +138,28 @@ int sh2_execute(SH2 *sh2_, int cycles)
 #endif
 
 // drc debug
-void REGPARM(2) sh2_do_op(SH2 *sh2_, int opcode)
+void REGPARM(2) sh2_do_op(SH2 *sh2, int opcode)
 {
-	sh2 = sh2_;
 	sh2->pc += 2;
 
 	switch (opcode & ( 15 << 12))
 	{
-		case  0<<12: op0000(opcode); break;
-		case  1<<12: op0001(opcode); break;
-		case  2<<12: op0010(opcode); break;
-		case  3<<12: op0011(opcode); break;
-		case  4<<12: op0100(opcode); break;
-		case  5<<12: op0101(opcode); break;
-		case  6<<12: op0110(opcode); break;
-		case  7<<12: op0111(opcode); break;
-		case  8<<12: op1000(opcode); break;
-		case  9<<12: op1001(opcode); break;
-		case 10<<12: op1010(opcode); break;
-		case 11<<12: op1011(opcode); break;
-		case 12<<12: op1100(opcode); break;
-		case 13<<12: op1101(opcode); break;
-		case 14<<12: op1110(opcode); break;
-		default: op1111(opcode); break;
+		case  0<<12: op0000(sh2, opcode); break;
+		case  1<<12: op0001(sh2, opcode); break;
+		case  2<<12: op0010(sh2, opcode); break;
+		case  3<<12: op0011(sh2, opcode); break;
+		case  4<<12: op0100(sh2, opcode); break;
+		case  5<<12: op0101(sh2, opcode); break;
+		case  6<<12: op0110(sh2, opcode); break;
+		case  7<<12: op0111(sh2, opcode); break;
+		case  8<<12: op1000(sh2, opcode); break;
+		case  9<<12: op1001(sh2, opcode); break;
+		case 10<<12: op1010(sh2, opcode); break;
+		case 11<<12: op1011(sh2, opcode); break;
+		case 12<<12: op1100(sh2, opcode); break;
+		case 13<<12: op1101(sh2, opcode); break;
+		case 14<<12: op1110(sh2, opcode); break;
+		default: op1111(sh2, opcode); break;
 	}
 }
 
diff --git a/cpu/sh2/sh2.c b/cpu/sh2/sh2.c
index 7b9f9a1..2e0e838 100644
--- a/cpu/sh2/sh2.c
+++ b/cpu/sh2/sh2.c
@@ -14,8 +14,6 @@
 
 #define I 0xf0
 
-SH2 *sh2; // active sh2
-
 int sh2_init(SH2 *sh2, int is_slave)
 {
 	int ret = 0;
diff --git a/cpu/sh2/sh2.h b/cpu/sh2/sh2.h
index 4603e84..bdb2fd9 100644
--- a/cpu/sh2/sh2.h
+++ b/cpu/sh2/sh2.h
@@ -66,8 +66,6 @@ typedef struct SH2_
 #define C_SH2_TO_M68K(xsh2, c) \
 	((int)((c + 3) * (xsh2).mult_sh2_to_m68k) >> CYCLE_MULT_SHIFT)
 
-extern SH2 *sh2; // active sh2. XXX: consider removing
-
 int  sh2_init(SH2 *sh2, int is_slave);
 void sh2_finish(SH2 *sh2);
 void sh2_reset(SH2 *sh2);
diff --git a/pico/32x/memory.c b/pico/32x/memory.c
index e694066..fc4f177 100644
--- a/pico/32x/memory.c
+++ b/pico/32x/memory.c
@@ -454,8 +454,8 @@ static u32 p32x_sh2reg_read16(u32 a, int cpuid)
     case 0x00: // adapter/irq ctl
       return (r[0] & P32XS_FM) | Pico32x.sh2_regs[0] | Pico32x.sh2irq_mask[cpuid];
     case 0x04: // H count (often as comm too)
-      if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0))
-        ash2_end_run(8);
+      if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(&sh2s[cpuid]), 0))
+        ash2_end_run(&sh2s[cpuid], 8);
       return Pico32x.sh2_regs[4 / 2];
     case 0x10: // DREQ len
       return r[a / 2];
@@ -469,8 +469,8 @@ static u32 p32x_sh2reg_read16(u32 a, int cpuid)
     int comreg = 1 << (a & 0x0f) / 2;
     if (Pico32x.comm_dirty_68k & comreg)
       Pico32x.comm_dirty_68k &= ~comreg;
-    else if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0))
-      ash2_end_run(8);
+    else if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(&sh2s[cpuid]), 0))
+      ash2_end_run(&sh2s[cpuid], 8);
     return r[a / 2];
   }
   if ((a & 0x30) == 0x30) {
@@ -695,7 +695,7 @@ static void sh2_peripheral_write32(u32 a, u32 d, int id)
     dmac0->tcr0 &= 0xffffff;
 
     // HACK: assume 68k starts writing soon and end the timeslice
-    ash2_end_run(16);
+    ash2_end_run(&sh2s[id], 16);
 
     // DREQ is only sent after first 4 words are written.
     // we do multiple of 4 words to avoid messing up alignment
@@ -1016,8 +1016,8 @@ static u32 sh2_read8_cs0(u32 a, int id)
 
   if ((a & 0x3ff00) == 0x4100) {
     d = p32x_vdp_read16(a);
-    if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1))
-      ash2_end_run(8);
+    if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(&sh2s[id]), 1))
+      ash2_end_run(&sh2s[id], 8);
     goto out_16to8;
   }
 
@@ -1071,8 +1071,8 @@ static u32 sh2_read16_cs0(u32 a, int id)
 
   if ((a & 0x3ff00) == 0x4100) {
     d = p32x_vdp_read16(a);
-    if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1))
-      ash2_end_run(8);
+    if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(&sh2s[id]), 1))
+      ash2_end_run(&sh2s[id], 8);
     goto out;
   }
 
diff --git a/pico/pico_int.h b/pico/pico_int.h
index bcb971e..8fb4a49 100644
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -237,23 +237,23 @@ extern SH2 sh2s[2];
 #define ssh2 sh2s[1]
 
 #ifndef DRC_SH2
-# define ash2_end_run(after) do { \
-  if (sh2->icount > (after)) { \
-    sh2->cycles_timeslice -= sh2->icount; \
-    sh2->icount = after; \
+# define ash2_end_run(sh2, after) do { \
+  if ((sh2)->icount > (after)) { \
+    (sh2)->cycles_timeslice -= (sh2)->icount; \
+    (sh2)->icount = after; \
   } \
 } while (0)
-# define ash2_cycles_done() (sh2->cycles_timeslice - sh2->icount)
+# define ash2_cycles_done(sh2) ((sh2)->cycles_timeslice - (sh2)->icount)
 #else
-# define ash2_end_run(after) do { \
-  int left = sh2->sr >> 12; \
+# define ash2_end_run(sh2, after) do { \
+  int left = (sh2)->sr >> 12; \
   if (left > (after)) { \
-    sh2->cycles_timeslice -= left; \
-    sh2->sr &= 0xfff; \
-    sh2->sr |= (after) << 12; \
+    (sh2)->cycles_timeslice -= left; \
+    (sh2)->sr &= 0xfff; \
+    (sh2)->sr |= (after) << 12; \
   } \
 } while (0)
-# define ash2_cycles_done() (sh2->cycles_timeslice - (sh2->sr >> 12))
+# define ash2_cycles_done(sh2) ((sh2)->cycles_timeslice - ((sh2)->sr >> 12))
 #endif
 
 //#define sh2_pc(c)     (c) ? ssh2.ppc : msh2.ppc
-- 
2.39.2