ips patches, 0.4 r162 rel?
[fceu.git] / Documentation / tech / ppu / loopy2.txt
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c62d2810 1Subject: [nesdev] Re: the skinny on nes scrolling\r
2Date: Tue, 13 Apr 1999 17:48:54 -0600\r
3From: loopy <zxcvzxcv@netzero.net>\r
4Reply-To: nesdev@onelist.com\r
5To: nesdev@onelist.com\r
6\r
7From: loopy <zxcvzxcv@netzero.net>\r
8\r
9(more notes on ppu logic)\r
10\r
11you can think of bits 0,1,2,3,4 of the vram address as the "x scroll"(*8)\r
12that the ppu increments as it draws. as it wraps from 31 to 0, bit 10 is\r
13switched. you should see how this causes horizontal wrapping between name\r
14tables (0,1) and (2,3).\r
15\r
16you can think of bits 5,6,7,8,9 as the "y scroll"(*8). this functions\r
17slightly different from the X. it wraps to 0 and bit 11 is switched when\r
18it's incremented from _29_ instead of 31. there are some odd side effects\r
19from this.. if you manually set the value above 29 (from either 2005 or\r
202006), the wrapping from 29 obviously won't happen, and attrib data will be\r
21used as name table data. the "y scroll" still wraps to 0 from 31, but\r
22without switching bit 11. this explains why writing 240+ to 'Y' in 2005\r
23appeared as a negative scroll value.\r
24\r
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