6003a768 |
1 | \r |
619b1824 |
2 | // This file is part of the Cyclone 68000 Emulator\r |
3 | \r |
d9d77995 |
4 | // Copyright (c) 2004,2011 FinalDave (emudave (at) gmail.com)\r |
5 | // Copyright (c) 2005-2011 GraÅžvydas "notaz" Ignotas (notasas (at) gmail.com)\r |
c41b9b97 |
6 | \r |
619b1824 |
7 | // This code is licensed under the GNU General Public License version 2.0 and the MAME License.\r |
8 | // You can choose the license that has the most advantages for you.\r |
9 | \r |
10 | // SVN repository can be found at http://code.google.com/p/cyclone68000/\r |
11 | \r |
d9d77995 |
12 | \r |
6003a768 |
13 | #include "app.h"\r |
14 | \r |
d9d77995 |
15 | int earead_check_addrerr = 1, eawrite_check_addrerr = 0;\r |
16 | \r |
17 | // some ops use non-standard cycle counts for EAs, so are listed here.\r |
18 | // all constants borrowed from the MUSASHI core by Karl Stenerud.\r |
19 | \r |
20 | /* Extra cycles for JMP instruction (000, 010) */\r |
21 | int g_jmp_cycle_table[8] =\r |
22 | {\r |
23 | 4, /* EA_MODE_AI */\r |
24 | 6, /* EA_MODE_DI */\r |
25 | 10, /* EA_MODE_IX */\r |
26 | 6, /* EA_MODE_AW */\r |
27 | 8, /* EA_MODE_AL */\r |
28 | 6, /* EA_MODE_PCDI */\r |
29 | 10, /* EA_MODE_PCIX */\r |
30 | 0, /* EA_MODE_I */\r |
31 | };\r |
32 | \r |
33 | /* Extra cycles for JSR instruction (000, 010) */\r |
34 | int g_jsr_cycle_table[8] =\r |
35 | {\r |
36 | 4, /* EA_MODE_AI */\r |
37 | 6, /* EA_MODE_DI */\r |
38 | 10, /* EA_MODE_IX */\r |
39 | 6, /* EA_MODE_AW */\r |
40 | 8, /* EA_MODE_AL */\r |
41 | 6, /* EA_MODE_PCDI */\r |
42 | 10, /* EA_MODE_PCIX */\r |
43 | 0, /* EA_MODE_I */\r |
44 | };\r |
45 | \r |
46 | /* Extra cycles for LEA instruction (000, 010) */\r |
47 | int g_lea_cycle_table[8] =\r |
48 | {\r |
49 | 4, /* EA_MODE_AI */\r |
50 | 8, /* EA_MODE_DI */\r |
51 | 12, /* EA_MODE_IX */\r |
52 | 8, /* EA_MODE_AW */\r |
53 | 12, /* EA_MODE_AL */\r |
54 | 8, /* EA_MODE_PCDI */\r |
55 | 12, /* EA_MODE_PCIX */\r |
56 | 0, /* EA_MODE_I */\r |
57 | };\r |
58 | \r |
59 | /* Extra cycles for PEA instruction (000, 010) */\r |
60 | int g_pea_cycle_table[8] =\r |
61 | {\r |
62 | 6, /* EA_MODE_AI */\r |
63 | 10, /* EA_MODE_DI */\r |
64 | 14, /* EA_MODE_IX */\r |
65 | 10, /* EA_MODE_AW */\r |
66 | 14, /* EA_MODE_AL */\r |
67 | 10, /* EA_MODE_PCDI */\r |
68 | 14, /* EA_MODE_PCIX */\r |
69 | 0, /* EA_MODE_I */\r |
70 | };\r |
71 | \r |
72 | /* Extra cycles for MOVEM instruction (000, 010) */\r |
73 | int g_movem_cycle_table[8] =\r |
74 | {\r |
75 | 0, /* EA_MODE_AI */\r |
76 | 4, /* EA_MODE_DI */\r |
77 | 6, /* EA_MODE_IX */\r |
78 | 4, /* EA_MODE_AW */\r |
79 | 8, /* EA_MODE_AL */\r |
80 | 0, /* EA_MODE_PCDI */\r |
81 | 0, /* EA_MODE_PCIX */\r |
82 | 0, /* EA_MODE_I */\r |
83 | };\r |
84 | \r |
85 | // add nonstandard EA\r |
86 | int Ea_add_ns(int *tab, int ea)\r |
87 | {\r |
88 | if(ea<0x10) return 0;\r |
89 | if((ea&0x38)==0x10) return tab[0]; // (An) (ai)\r |
90 | if(ea<0x28) return 0;\r |
91 | if(ea<0x30) return tab[1]; // ($nn,An) (di)\r |
92 | if(ea<0x38) return tab[2]; // ($nn,An,Rn) (ix)\r |
93 | if(ea==0x38) return tab[3]; // (aw)\r |
94 | if(ea==0x39) return tab[4]; // (al)\r |
95 | if(ea==0x3a) return tab[5]; // ($nn,PC) (pcdi)\r |
96 | if(ea==0x3b) return tab[6]; // ($nn,pc,Rn) (pcix)\r |
97 | if(ea==0x3c) return tab[7]; // #$nnnn (i)\r |
98 | return 0;\r |
99 | }\r |
100 | \r |
101 | \r |
6003a768 |
102 | // ---------------------------------------------------------------------------\r |
103 | // Gets the offset of a register for an ea, and puts it in 'r'\r |
104 | // Shifted left by 'shift'\r |
105 | // Doesn't trash anything\r |
d9d77995 |
106 | static int EaCalcReg(int r,int ea,int mask,int forceor,int shift,int noshift=0)\r |
6003a768 |
107 | {\r |
108 | int i=0,low=0,needor=0;\r |
109 | int lsl=0;\r |
110 | \r |
111 | for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is\r |
112 | mask&=0xf<<low; // This is the max we can do\r |
113 | \r |
d9d77995 |
114 | if (ea>=8)\r |
115 | {\r |
116 | needor=1; // Need to OR to access A0-7\r |
117 | if ((g_op>>low)&8) { needor=0; mask|=8<<low; } // Ah - no we don't actually need to or, since the bit is high in r8\r |
118 | if (forceor) needor=1; // Special case for 0x30-0x38 EAs ;)\r |
119 | }\r |
6003a768 |
120 | \r |
121 | ot(" and r%d,r8,#0x%.4x\n",r,mask);\r |
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122 | if (needor) ot(" orr r%d,r%d,#0x%x ;@ A0-7\n",r,r,8<<low);\r |
6003a768 |
123 | \r |
124 | // Find out amount to shift left:\r |
125 | lsl=shift-low;\r |
126 | \r |
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127 | if (lsl&&!noshift)\r |
6003a768 |
128 | {\r |
129 | ot(" mov r%d,r%d,",r,r);\r |
130 | if (lsl>0) ot("lsl #%d\n", lsl);\r |
131 | else ot("lsr #%d\n",-lsl);\r |
132 | }\r |
133 | \r |
6003a768 |
134 | return 0;\r |
135 | }\r |
136 | \r |
137 | // EaCalc - ARM Register 'a' = Effective Address\r |
d9d77995 |
138 | // If ea>=0x10, trashes r0,r2 and r3, else nothing\r |
139 | // size values 0, 1, 2 ~ byte, word, long\r |
140 | // mask shows usable bits in r8\r |
141 | int EaCalc(int a,int mask,int ea,int size,int top,int sign_extend)\r |
6003a768 |
142 | {\r |
143 | char text[32]="";\r |
6003a768 |
144 | \r |
145 | DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address\r |
6003a768 |
146 | \r |
147 | if (ea<0x10)\r |
148 | {\r |
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149 | int noshift=0;\r |
150 | if (size>=2||(size==0&&(top||!sign_extend))) noshift=1; // Saves one opcode\r |
6003a768 |
151 | \r |
152 | ot(";@ EaCalc : Get register index into r%d:\n",a);\r |
153 | \r |
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154 | EaCalcReg(a,ea,mask,0,2,noshift);\r |
6003a768 |
155 | return 0;\r |
156 | }\r |
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157 | \r |
6003a768 |
158 | ot(";@ EaCalc : Get '%s' into r%d:\n",text,a);\r |
d9d77995 |
159 | // (An), (An)+, -(An)\r |
6003a768 |
160 | if (ea<0x28)\r |
161 | {\r |
d9d77995 |
162 | int step=1<<size, strr=a;\r |
163 | int low=0,lsl=0,i;\r |
6003a768 |
164 | \r |
165 | if ((ea&7)==7 && step<2) step=2; // move.b (a7)+ or -(a7) steps by 2 not 1\r |
166 | \r |
d9d77995 |
167 | if (ea==0x1f||ea==0x27) // A7 handlers are always separate\r |
168 | {\r |
169 | ot(" ldr r%d,[r7,#0x3c] ;@ A7\n",a);\r |
170 | }\r |
171 | else\r |
172 | {\r |
173 | EaCalcReg(2,ea,mask,0,0,1);\r |
174 | if(mask)\r |
175 | for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is\r |
176 | lsl=2-low; // Having a lsl #x here saves one opcode\r |
177 | if (lsl>=0) ot(" ldr r%d,[r7,r2,lsl #%i]\n",a,lsl);\r |
178 | else if (lsl<0) ot(" ldr r%d,[r7,r2,lsr #%i]\n",a,-lsl);\r |
179 | }\r |
6003a768 |
180 | \r |
d9d77995 |
181 | if ((ea&0x38)==0x18) // (An)+\r |
6003a768 |
182 | {\r |
183 | ot(" add r3,r%d,#%d ;@ Post-increment An\n",a,step);\r |
d9d77995 |
184 | strr=3;\r |
6003a768 |
185 | }\r |
186 | \r |
d9d77995 |
187 | if ((ea&0x38)==0x20) // -(An)\r |
6003a768 |
188 | ot(" sub r%d,r%d,#%d ;@ Pre-decrement An\n",a,a,step);\r |
d9d77995 |
189 | \r |
190 | if ((ea&0x38)==0x18||(ea&0x38)==0x20)\r |
191 | {\r |
192 | if (ea==0x1f||ea==0x27)\r |
193 | {\r |
194 | ot(" str r%d,[r7,#0x3c] ;@ A7\n",strr);\r |
195 | }\r |
196 | else\r |
197 | {\r |
198 | if (lsl>=0) ot(" str r%d,[r7,r2,lsl #%i]\n",strr,lsl);\r |
199 | else if (lsl<0) ot(" str r%d,[r7,r2,lsr #%i]\n",strr,-lsl);\r |
200 | }\r |
6003a768 |
201 | }\r |
202 | \r |
203 | if ((ea&0x38)==0x20) Cycles+=size<2 ? 6:10; // -(An) Extra cycles\r |
204 | else Cycles+=size<2 ? 4:8; // (An),(An)+ Extra cycles\r |
205 | return 0;\r |
206 | }\r |
207 | \r |
d9d77995 |
208 | if (ea<0x30) // ($nn,An) (di)\r |
6003a768 |
209 | {\r |
d9d77995 |
210 | ot(" ldrsh r0,[r4],#2 ;@ Fetch offset\n"); pc_dirty=1;\r |
211 | EaCalcReg(2,8,mask,0,0);\r |
212 | ot(" ldr r2,[r7,r2,lsl #2]\n");\r |
6003a768 |
213 | ot(" add r%d,r0,r2 ;@ Add on offset\n",a);\r |
214 | Cycles+=size<2 ? 8:12; // Extra cycles\r |
215 | return 0;\r |
216 | }\r |
217 | \r |
d9d77995 |
218 | if (ea<0x38) // ($nn,An,Rn) (ix)\r |
6003a768 |
219 | {\r |
220 | ot(";@ Get extension word into r3:\n");\r |
d9d77995 |
221 | ot(" ldrh r3,[r4],#2 ;@ ($Disp,PC,Rn)\n"); pc_dirty=1;\r |
6003a768 |
222 | ot(" mov r2,r3,lsr #10\n");\r |
223 | ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n");\r |
224 | ot(" and r2,r2,#0x3c ;@ r2=Index of Rn\n");\r |
6003a768 |
225 | ot(" ldreqsh r2,[r7,r2] ;@ r2=Rn.w\n");\r |
226 | ot(" ldrne r2,[r7,r2] ;@ r2=Rn.l\n");\r |
d9d77995 |
227 | ot(" mov r0,r3,asl #24 ;@ r0=Get 8-bit signed Disp\n");\r |
6003a768 |
228 | ot(" add r3,r2,r0,asr #24 ;@ r3=Disp+Rn\n");\r |
229 | \r |
d9d77995 |
230 | EaCalcReg(2,8,mask,1,0);\r |
231 | ot(" ldr r2,[r7,r2,lsl #2]\n");\r |
6003a768 |
232 | ot(" add r%d,r2,r3 ;@ r%d=Disp+An+Rn\n",a,a);\r |
233 | Cycles+=size<2 ? 10:14; // Extra cycles\r |
234 | return 0;\r |
235 | }\r |
236 | \r |
d9d77995 |
237 | if (ea==0x38) // (aw)\r |
6003a768 |
238 | {\r |
d9d77995 |
239 | ot(" ldrsh r%d,[r4],#2 ;@ Fetch Absolute Short address\n",a); pc_dirty=1;\r |
6003a768 |
240 | Cycles+=size<2 ? 8:12; // Extra cycles\r |
241 | return 0;\r |
242 | }\r |
243 | \r |
d9d77995 |
244 | if (ea==0x39) // (al)\r |
6003a768 |
245 | {\r |
246 | ot(" ldrh r2,[r4],#2 ;@ Fetch Absolute Long address\n");\r |
d9d77995 |
247 | ot(" ldrh r0,[r4],#2\n"); pc_dirty=1;\r |
6003a768 |
248 | ot(" orr r%d,r0,r2,lsl #16\n",a);\r |
249 | Cycles+=size<2 ? 12:16; // Extra cycles\r |
250 | return 0;\r |
251 | }\r |
252 | \r |
d9d77995 |
253 | if (ea==0x3a) // ($nn,PC) (pcdi)\r |
6003a768 |
254 | {\r |
255 | ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n");\r |
256 | ot(" sub r0,r4,r0 ;@ Real PC\n");\r |
d9d77995 |
257 | ot(" ldrsh r2,[r4],#2 ;@ Fetch extension\n"); pc_dirty=1;\r |
2fc3c6ff |
258 | ot(" add r%d,r2,r0 ;@ ($nn,PC)\n",a);\r |
6003a768 |
259 | Cycles+=size<2 ? 8:12; // Extra cycles\r |
260 | return 0;\r |
261 | }\r |
262 | \r |
d9d77995 |
263 | if (ea==0x3b) // ($nn,pc,Rn) (pcix)\r |
6003a768 |
264 | {\r |
d9d77995 |
265 | ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n");\r |
266 | ot(" ldrh r3,[r4] ;@ Get extension word\n");\r |
267 | ot(" sub r0,r4,r0 ;@ r0=PC\n");\r |
268 | ot(" add r4,r4,#2\n"); pc_dirty=1;\r |
6003a768 |
269 | ot(" mov r2,r3,lsr #10\n");\r |
270 | ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n");\r |
271 | ot(" and r2,r2,#0x3c ;@ r2=Index of Rn\n");\r |
6003a768 |
272 | ot(" ldreqsh r2,[r7,r2] ;@ r2=Rn.w\n");\r |
273 | ot(" ldrne r2,[r7,r2] ;@ r2=Rn.l\n");\r |
d9d77995 |
274 | ot(" mov r3,r3,asl #24 ;@ r3=Get 8-bit signed Disp\n");\r |
275 | ot(" add r2,r2,r3,asr #24 ;@ r2=Disp+Rn\n");\r |
2fc3c6ff |
276 | ot(" add r%d,r2,r0 ;@ r%d=Disp+PC+Rn\n",a,a);\r |
6003a768 |
277 | Cycles+=size<2 ? 10:14; // Extra cycles\r |
278 | return 0;\r |
279 | }\r |
280 | \r |
d9d77995 |
281 | if (ea==0x3c) // #$nnnn (i)\r |
6003a768 |
282 | {\r |
283 | if (size<2)\r |
284 | {\r |
d9d77995 |
285 | ot(" ldr%s r%d,[r4],#2 ;@ Fetch immediate value\n",Sarm[size&3],a); pc_dirty=1;\r |
6003a768 |
286 | Cycles+=4; // Extra cycles\r |
287 | return 0;\r |
288 | }\r |
289 | \r |
290 | ot(" ldrh r2,[r4],#2 ;@ Fetch immediate value\n");\r |
d9d77995 |
291 | ot(" ldrh r3,[r4],#2\n"); pc_dirty=1;\r |
292 | ot(" orr r%d,r3,r2,lsl #16\n",a);\r |
6003a768 |
293 | Cycles+=8; // Extra cycles\r |
294 | return 0;\r |
295 | }\r |
296 | \r |
297 | return 1;\r |
298 | }\r |
299 | \r |
300 | // ---------------------------------------------------------------------------\r |
301 | // Read effective address in (ARM Register 'a') to ARM register 'v'\r |
302 | // 'a' and 'v' can be anything but 0 is generally best (for both)\r |
303 | // If (ea<0x10) nothing is trashed, else r0-r3 is trashed\r |
d9d77995 |
304 | // If 'top' is given, the ARM register v shifted to the top, e.g. 0xc000 -> 0xc0000000\r |
305 | // If top is 0 and sign_extend is not, then ARM register v is sign extended,\r |
306 | // e.g. 0xc000 -> 0xffffc000 (else it may or may not be sign extended)\r |
6003a768 |
307 | \r |
3504ce94 |
308 | int EaRead(int a,int v,int ea,int size,int mask,int top,int sign_extend,int set_nz)\r |
6003a768 |
309 | {\r |
310 | char text[32]="";\r |
3504ce94 |
311 | const char *s="";\r |
312 | int flags_set=0;\r |
6003a768 |
313 | int shift=0;\r |
d9d77995 |
314 | \r |
3504ce94 |
315 | if (set_nz) s="s";\r |
316 | \r |
6003a768 |
317 | shift=32-(8<<size);\r |
318 | \r |
319 | DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address\r |
320 | \r |
321 | if (ea<0x10)\r |
322 | {\r |
d9d77995 |
323 | int lsl=0,low=0,nsarm=size&3,i;\r |
324 | if (size>=2||(size==0&&(top||!sign_extend))) {\r |
325 | if(mask)\r |
326 | for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is\r |
327 | lsl=2-low; // Having a lsl #2 here saves one opcode\r |
328 | }\r |
329 | \r |
330 | if (top||!sign_extend) nsarm=3;\r |
6003a768 |
331 | \r |
332 | ot(";@ EaRead : Read register[r%d] into r%d:\n",a,v);\r |
333 | \r |
d9d77995 |
334 | if (lsl>0) ot(" ldr%s r%d,[r7,r%d,lsl #%i]\n",Narm[nsarm],v,a,lsl);\r |
335 | else if (lsl<0) ot(" ldr%s r%d,[r7,r%d,lsr #%i]\n",Narm[nsarm],v,a,-lsl);\r |
336 | else ot(" ldr%s r%d,[r7,r%d]\n",Sarm[nsarm],v,a);\r |
6003a768 |
337 | \r |
3504ce94 |
338 | if (top&&shift) ot(" mov%s r%d,r%d,asl #%d\n",s,v,v,shift);\r |
339 | else if(set_nz) ot(" tst r%d,r%d\n",v,v);\r |
6003a768 |
340 | \r |
341 | ot("\n"); return 0;\r |
342 | }\r |
343 | \r |
344 | ot(";@ EaRead : Read '%s' (address in r%d) into r%d:\n",text,a,v);\r |
345 | \r |
346 | if (ea==0x3c)\r |
347 | {\r |
348 | int asl=0;\r |
349 | \r |
350 | if (top) asl=shift;\r |
351 | \r |
3504ce94 |
352 | if (asl) ot(" mov%s r%d,r%d,asl #%d\n",s,v,a,asl);\r |
353 | else if (v!=a) ot(" mov%s r%d,r%d\n",s,v,a);\r |
354 | else if (set_nz) ot(" tst r%d,r%d\n",v,v);\r |
6003a768 |
355 | ot("\n"); return 0;\r |
356 | }\r |
357 | \r |
d9d77995 |
358 | if (ea>=0x3a && ea<=0x3b) MemHandler(2,size,a,earead_check_addrerr); // Fetch\r |
359 | else MemHandler(0,size,a,earead_check_addrerr); // Read\r |
6003a768 |
360 | \r |
d9d77995 |
361 | // defaults to 1, as most things begins with a read\r |
362 | earead_check_addrerr=1;\r |
6003a768 |
363 | \r |
d9d77995 |
364 | if (sign_extend)\r |
365 | {\r |
366 | int d_reg=0;\r |
367 | if (shift) {\r |
3504ce94 |
368 | ot(" mov%s r%d,r%d,asl #%d\n",s,v,d_reg,shift);\r |
d9d77995 |
369 | d_reg=v;\r |
3504ce94 |
370 | flags_set=1;\r |
d9d77995 |
371 | }\r |
372 | if (!top && shift) {\r |
3504ce94 |
373 | ot(" mov%s r%d,r%d,asr #%d\n",s,v,d_reg,shift);\r |
d9d77995 |
374 | d_reg=v;\r |
3504ce94 |
375 | flags_set=1;\r |
376 | }\r |
377 | if (d_reg != v) {\r |
378 | ot(" mov%s r%d,r%d\n",s,v,d_reg);\r |
379 | flags_set=1;\r |
d9d77995 |
380 | }\r |
d9d77995 |
381 | }\r |
382 | else\r |
383 | {\r |
3504ce94 |
384 | if (top && shift) {\r |
385 | ot(" mov%s r%d,r0,asl #%d\n",s,v,shift);\r |
386 | flags_set=1;\r |
387 | }\r |
388 | else if (v!=0) {\r |
389 | ot(" mov%s r%d,r0\n",s,v);\r |
390 | flags_set=1;\r |
391 | }\r |
d9d77995 |
392 | }\r |
6003a768 |
393 | \r |
3504ce94 |
394 | if (set_nz&&!flags_set)\r |
395 | ot(" tst r%d,r%d\n",v,v);\r |
396 | \r |
6003a768 |
397 | ot("\n"); return 0;\r |
398 | }\r |
399 | \r |
d9d77995 |
400 | // calculate EA and read\r |
401 | // if (ea < 0x10) nothing is trashed\r |
402 | // if (ea == 0x3c) r2 and r3 are trashed\r |
403 | // else r0-r3 are trashed\r |
404 | // size values 0, 1, 2 ~ byte, word, long\r |
405 | // r_ea is reg to store ea in (-1 means ea is not needed), r is dst reg\r |
406 | // if sign_extend is 0, non-32bit values will have MS bits undefined\r |
3504ce94 |
407 | int EaCalcRead(int r_ea,int r,int ea,int size,int mask,int sign_extend,int set_nz)\r |
d9d77995 |
408 | {\r |
409 | if (ea<0x10)\r |
410 | {\r |
411 | if (r_ea==-1)\r |
412 | {\r |
413 | r_ea=r;\r |
414 | if (!sign_extend) size=2;\r |
415 | }\r |
416 | }\r |
417 | else if (ea==0x3c) // #imm\r |
418 | {\r |
419 | r_ea=r;\r |
420 | }\r |
421 | else\r |
422 | {\r |
423 | if (r_ea==-1) r_ea=0;\r |
424 | }\r |
425 | \r |
426 | EaCalc (r_ea,mask,ea,size,0,sign_extend);\r |
3504ce94 |
427 | EaRead (r_ea, r,ea,size,mask,0,sign_extend,set_nz);\r |
d9d77995 |
428 | \r |
429 | return 0;\r |
430 | }\r |
431 | \r |
432 | int EaCalcReadNoSE(int r_ea,int r,int ea,int size,int mask)\r |
433 | {\r |
434 | return EaCalcRead(r_ea,r,ea,size,mask,0);\r |
435 | }\r |
436 | \r |
6003a768 |
437 | // Return 1 if we can read this ea\r |
438 | int EaCanRead(int ea,int size)\r |
439 | {\r |
440 | if (size<0)\r |
441 | {\r |
442 | // LEA:\r |
443 | // These don't make sense?:\r |
d9d77995 |
444 | if (ea< 0x10) return 0; // Register\r |
6003a768 |
445 | if (ea==0x3c) return 0; // Immediate\r |
446 | if (ea>=0x18 && ea<0x28) return 0; // Pre/Post inc/dec An\r |
447 | }\r |
448 | \r |
449 | if (ea<=0x3c) return 1;\r |
450 | return 0;\r |
451 | }\r |
452 | \r |
453 | // ---------------------------------------------------------------------------\r |
454 | // Write effective address (ARM Register 'a') with ARM register 'v'\r |
d9d77995 |
455 | // Trashes r0-r3,r12,lr; 'a' can be 0 or 2+, 'v' can be 1 or higher\r |
6003a768 |
456 | // If a==0 and v==1 it's faster though.\r |
d9d77995 |
457 | int EaWrite(int a,int v,int ea,int size,int mask,int top,int sign_extend_ea)\r |
6003a768 |
458 | {\r |
459 | char text[32]="";\r |
460 | int shift=0;\r |
461 | \r |
d9d77995 |
462 | if(a == 1) { printf("Error! EaWrite a==1 !\n"); return 1; }\r |
463 | \r |
6003a768 |
464 | if (top) shift=32-(8<<size);\r |
465 | \r |
466 | DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address\r |
467 | \r |
468 | if (ea<0x10)\r |
469 | {\r |
d9d77995 |
470 | int lsl=0,low=0,i;\r |
471 | if (size>=2||(size==0&&(top||!sign_extend_ea))) {\r |
472 | if(mask)\r |
473 | for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is\r |
474 | lsl=2-low; // Having a lsl #x here saves one opcode\r |
475 | }\r |
6003a768 |
476 | \r |
477 | ot(";@ EaWrite: r%d into register[r%d]:\n",v,a);\r |
d9d77995 |
478 | if (shift) ot(" mov r%d,r%d,asr #%d\n",v,v,shift);\r |
6003a768 |
479 | \r |
d9d77995 |
480 | if (lsl>0) ot(" str%s r%d,[r7,r%d,lsl #%i]\n",Narm[size&3],v,a,lsl);\r |
481 | else if (lsl<0) ot(" str%s r%d,[r7,r%d,lsr #%i]\n",Narm[size&3],v,a,-lsl);\r |
482 | else ot(" str%s r%d,[r7,r%d]\n",Narm[size&3],v,a);\r |
6003a768 |
483 | \r |
484 | ot("\n"); return 0;\r |
485 | }\r |
486 | \r |
487 | ot(";@ EaWrite: Write r%d into '%s' (address in r%d):\n",v,text,a);\r |
488 | \r |
489 | if (ea==0x3c) { ot("Error! Write EA=0x%x\n\n",ea); return 1; }\r |
490 | \r |
d9d77995 |
491 | if (shift) ot(" mov r1,r%d,asr #%d\n",v,shift);\r |
492 | else if (v!=1) ot(" mov r1,r%d\n",v);\r |
6003a768 |
493 | \r |
d9d77995 |
494 | MemHandler(1,size,a,eawrite_check_addrerr); // Call write handler\r |
495 | \r |
496 | // not check by default, because most cases are rmw and\r |
497 | // address was already checked before reading\r |
498 | eawrite_check_addrerr = 0;\r |
6003a768 |
499 | \r |
500 | ot("\n"); return 0;\r |
501 | }\r |
502 | \r |
503 | // Return 1 if we can write this ea\r |
504 | int EaCanWrite(int ea)\r |
505 | {\r |
d9d77995 |
506 | if (ea<=0x39) return 1; // 3b?\r |
6003a768 |
507 | return 0;\r |
508 | }\r |
509 | // ---------------------------------------------------------------------------\r |
d9d77995 |
510 | \r |
511 | // Return 1 if EA is An reg\r |
512 | int EaAn(int ea)\r |
513 | {\r |
514 | if((ea&0x38)==8) return 1;\r |
515 | return 0;\r |
516 | }\r |
517 | \r |