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1 | /* FCE Ultra - NES/Famicom Emulator\r |
2 | *\r |
3 | * Copyright notice for this file:\r |
4 | * Copyright (C) 2005 CaH4e3\r |
5 | *\r |
6 | * This program is free software; you can redistribute it and/or modify\r |
7 | * it under the terms of the GNU General Public License as published by\r |
8 | * the Free Software Foundation; either version 2 of the License, or\r |
9 | * (at your option) any later version.\r |
10 | *\r |
11 | * This program is distributed in the hope that it will be useful,\r |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of\r |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r |
14 | * GNU General Public License for more details.\r |
15 | *\r |
16 | * You should have received a copy of the GNU General Public License\r |
17 | * along with this program; if not, write to the Free Software\r |
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18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r |
19 | *\r |
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20 | * (VRC4 mapper)\r |
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21 | *\r |
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22 | */\r |
23 | \r |
24 | #include "mapinc.h"\r |
25 | \r |
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26 | static uint8 IRQCount;//, IRQPre;\r |
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27 | static uint8 IRQa;\r |
28 | static uint8 prg_reg[2];\r |
29 | static uint8 chr_reg[8];\r |
30 | static uint8 mirr;\r |
31 | \r |
32 | static SFORMAT StateRegs[]=\r |
33 | {\r |
34 | {&IRQCount, 1, "IRQC"},\r |
35 | {&IRQa, 1, "IRQA"},\r |
36 | {prg_reg, 2, "PRG"},\r |
37 | {chr_reg, 8, "CHR"},\r |
38 | {&mirr, 1, "MIRR"},\r |
39 | {0}\r |
40 | };\r |
41 | \r |
42 | static void M222IRQ(void)\r |
43 | {\r |
44 | if(IRQa)\r |
45 | {\r |
46 | IRQCount++;\r |
47 | if(IRQCount>=238)\r |
48 | {\r |
49 | X6502_IRQBegin(FCEU_IQEXT);\r |
50 | // IRQa=0;\r |
51 | }\r |
52 | }\r |
53 | }\r |
54 | \r |
55 | static void Sync(void)\r |
56 | {\r |
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57 | setprg8(0x8000,prg_reg[0]);\r |
58 | setprg8(0xA000,prg_reg[1]);\r |
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59 | int i;\r |
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60 | for(i=0; i<8; i++)\r |
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61 | setchr1(i<<10,chr_reg[i]); \r |
62 | setmirror(mirr^1); \r |
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63 | }\r |
64 | \r |
65 | static DECLFW(M222Write)\r |
66 | {\r |
67 | switch(A&0xF003)\r |
68 | {\r |
69 | case 0x8000: prg_reg[0]=V; break;\r |
70 | case 0x9000: mirr=V&1; break;\r |
71 | case 0xA000: prg_reg[1]=V; break;\r |
72 | case 0xB000: chr_reg[0]=V; break;\r |
73 | case 0xB002: chr_reg[1]=V; break;\r |
74 | case 0xC000: chr_reg[2]=V; break;\r |
75 | case 0xC002: chr_reg[3]=V; break;\r |
76 | case 0xD000: chr_reg[4]=V; break;\r |
77 | case 0xD002: chr_reg[5]=V; break;\r |
78 | case 0xE000: chr_reg[6]=V; break;\r |
79 | case 0xE002: chr_reg[7]=V; break;\r |
80 | // case 0xF000: FCEU_printf("%04x:%02x %d\n",A,V,scanline); IRQa=V; if(!V)IRQPre=0; X6502_IRQEnd(FCEU_IQEXT); break;\r |
81 | // / case 0xF001: FCEU_printf("%04x:%02x %d\n",A,V,scanline); IRQCount=V; break;\r |
82 | // case 0xF002: FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;\r |
83 | // case 0xD001: IRQa=V; X6502_IRQEnd(FCEU_IQEXT); FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;\r |
84 | // case 0xC001: IRQPre=16; FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;\r |
85 | case 0xF000: IRQa=IRQCount=V; if(scanline<240) IRQCount-=8; else IRQCount+=4; X6502_IRQEnd(FCEU_IQEXT); break;\r |
86 | }\r |
87 | Sync();\r |
88 | }\r |
89 | \r |
90 | static void M222Power(void)\r |
91 | {\r |
92 | setprg16(0xC000,~0);\r |
93 | SetReadHandler(0x8000,0xFFFF,CartBR);\r |
94 | SetWriteHandler(0x8000,0xFFFF,M222Write);\r |
95 | }\r |
96 | \r |
97 | static void StateRestore(int version)\r |
98 | {\r |
99 | Sync();\r |
100 | }\r |
101 | \r |
102 | void Mapper222_Init(CartInfo *info)\r |
103 | {\r |
104 | info->Power=M222Power;\r |
105 | GameHBIRQHook=M222IRQ;\r |
106 | GameStateRestore=StateRestore;\r |
107 | AddExState(&StateRegs, ~0, 0, 0);\r |
108 | }\r |