| 1 | \r |
| 2 | // This file is part of the Cyclone 68000 Emulator\r |
| 3 | \r |
| 4 | // Copyright (c) 2011 FinalDave (emudave (at) gmail.com)\r |
| 5 | \r |
| 6 | // This code is licensed under the GNU General Public License version 2.0 and the MAME License.\r |
| 7 | // You can choose the license that has the most advantages for you.\r |
| 8 | \r |
| 9 | // SVN repository can be found at http://code.google.com/p/cyclone68000/\r |
| 10 | \r |
| 11 | #include "app.h"\r |
| 12 | \r |
| 13 | // ---------------------------------------------------------------------------\r |
| 14 | // Gets the offset of a register for an ea, and puts it in 'r'\r |
| 15 | // Shifted left by 'shift'\r |
| 16 | // Doesn't trash anything\r |
| 17 | static int EaCalcReg(int r,int ea,int mask,int forceor,int shift)\r |
| 18 | {\r |
| 19 | int i=0,low=0,needor=0;\r |
| 20 | int lsl=0;\r |
| 21 | \r |
| 22 | for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is\r |
| 23 | mask&=0xf<<low; // This is the max we can do\r |
| 24 | \r |
| 25 | if (ea>=8) needor=1; // Need to OR to access A0-7\r |
| 26 | \r |
| 27 | if ((mask>>low)&8) if (ea&8) needor=0; // Ah - no we don't actually need to or, since the bit is high in r8\r |
| 28 | \r |
| 29 | if (forceor) needor=1; // Special case for 0x30-0x38 EAs ;)\r |
| 30 | \r |
| 31 | ot(" and r%d,r8,#0x%.4x\n",r,mask);\r |
| 32 | \r |
| 33 | // Find out amount to shift left:\r |
| 34 | lsl=shift-low;\r |
| 35 | \r |
| 36 | if (lsl)\r |
| 37 | {\r |
| 38 | ot(" mov r%d,r%d,",r,r);\r |
| 39 | if (lsl>0) ot("lsl #%d\n", lsl);\r |
| 40 | else ot("lsr #%d\n",-lsl);\r |
| 41 | }\r |
| 42 | \r |
| 43 | if (needor) ot(" orr r%d,r%d,#0x%x ;@ A0-7\n",r,r,8<<shift);\r |
| 44 | return 0;\r |
| 45 | }\r |
| 46 | \r |
| 47 | // EaCalc - ARM Register 'a' = Effective Address\r |
| 48 | // Trashes r0,r2 and r3\r |
| 49 | int EaCalc(int a,int mask,int ea,int size)\r |
| 50 | {\r |
| 51 | char text[32]="";\r |
| 52 | int func=0;\r |
| 53 | \r |
| 54 | DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address\r |
| 55 | func=0x68+(size<<2); // Get correct read handler\r |
| 56 | \r |
| 57 | if (ea<0x10)\r |
| 58 | {\r |
| 59 | int lsl=2;\r |
| 60 | if (size>=2) lsl=0; // Saves one opcode\r |
| 61 | \r |
| 62 | ot(";@ EaCalc : Get register index into r%d:\n",a);\r |
| 63 | \r |
| 64 | EaCalcReg(a,ea,mask,0,lsl);\r |
| 65 | return 0;\r |
| 66 | }\r |
| 67 | \r |
| 68 | ot(";@ EaCalc : Get '%s' into r%d:\n",text,a);\r |
| 69 | // (An), (An)+, -(An):\r |
| 70 | if (ea<0x28)\r |
| 71 | {\r |
| 72 | int step=1<<size;\r |
| 73 | \r |
| 74 | if ((ea&7)==7 && step<2) step=2; // move.b (a7)+ or -(a7) steps by 2 not 1\r |
| 75 | \r |
| 76 | EaCalcReg(2,ea,mask,0,2);\r |
| 77 | ot(" ldr r%d,[r7,r2]\n",a);\r |
| 78 | \r |
| 79 | if ((ea&0x38)==0x18)\r |
| 80 | {\r |
| 81 | ot(" add r3,r%d,#%d ;@ Post-increment An\n",a,step);\r |
| 82 | ot(" str r3,[r7,r2]\n");\r |
| 83 | }\r |
| 84 | \r |
| 85 | if ((ea&0x38)==0x20)\r |
| 86 | {\r |
| 87 | ot(" sub r%d,r%d,#%d ;@ Pre-decrement An\n",a,a,step);\r |
| 88 | ot(" str r%d,[r7,r2]\n",a);\r |
| 89 | }\r |
| 90 | \r |
| 91 | if ((ea&0x38)==0x20) Cycles+=size<2 ? 6:10; // -(An) Extra cycles\r |
| 92 | else Cycles+=size<2 ? 4:8; // (An),(An)+ Extra cycles\r |
| 93 | return 0;\r |
| 94 | }\r |
| 95 | \r |
| 96 | if (ea<0x30) // ($nn,An)\r |
| 97 | {\r |
| 98 | EaCalcReg(2,8,mask,0,2);\r |
| 99 | ot(" ldr r2,[r7,r2]\n");\r |
| 100 | ot(" ldrsh r0,[r4],#2 ;@ Fetch offset\n");\r |
| 101 | ot(" add r%d,r0,r2 ;@ Add on offset\n",a);\r |
| 102 | Cycles+=size<2 ? 8:12; // Extra cycles\r |
| 103 | return 0;\r |
| 104 | }\r |
| 105 | \r |
| 106 | if (ea<0x38) // ($nn,An,Rn)\r |
| 107 | {\r |
| 108 | ot(";@ Get extension word into r3:\n");\r |
| 109 | ot(" ldrh r3,[r4],#2 ;@ ($Disp,PC,Rn)\n");\r |
| 110 | ot(" mov r2,r3,lsr #10\n");\r |
| 111 | ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n");\r |
| 112 | ot(" and r2,r2,#0x3c ;@ r2=Index of Rn\n");\r |
| 113 | ot(" mov r0,r3,asl #24 ;@ r0=Get 8-bit signed Disp\n");\r |
| 114 | ot(" ldreqsh r2,[r7,r2] ;@ r2=Rn.w\n");\r |
| 115 | ot(" ldrne r2,[r7,r2] ;@ r2=Rn.l\n");\r |
| 116 | ot(" add r3,r2,r0,asr #24 ;@ r3=Disp+Rn\n");\r |
| 117 | \r |
| 118 | EaCalcReg(2,8,mask,1,2);\r |
| 119 | ot(" ldr r2,[r7,r2]\n");\r |
| 120 | ot(" add r%d,r2,r3 ;@ r%d=Disp+An+Rn\n",a,a);\r |
| 121 | Cycles+=size<2 ? 10:14; // Extra cycles\r |
| 122 | return 0;\r |
| 123 | }\r |
| 124 | \r |
| 125 | if (ea==0x38)\r |
| 126 | {\r |
| 127 | ot(" ldrsh r%d,[r4],#2 ;@ Fetch Absolute Short address\n",a);\r |
| 128 | Cycles+=size<2 ? 8:12; // Extra cycles\r |
| 129 | return 0;\r |
| 130 | }\r |
| 131 | \r |
| 132 | if (ea==0x39)\r |
| 133 | {\r |
| 134 | ot(" ldrh r2,[r4],#2 ;@ Fetch Absolute Long address\n");\r |
| 135 | ot(" ldrh r0,[r4],#2\n");\r |
| 136 | ot(" orr r%d,r0,r2,lsl #16\n",a);\r |
| 137 | Cycles+=size<2 ? 12:16; // Extra cycles\r |
| 138 | return 0;\r |
| 139 | }\r |
| 140 | \r |
| 141 | if (ea==0x3a)\r |
| 142 | {\r |
| 143 | ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n");\r |
| 144 | ot(" sub r0,r4,r0 ;@ Real PC\n");\r |
| 145 | ot(" ldrsh r2,[r4],#2 ;@ Fetch extension\n");\r |
| 146 | ot(" add r%d,r0,r2 ;@ ($nn,PC)\n",a);\r |
| 147 | Cycles+=size<2 ? 8:12; // Extra cycles\r |
| 148 | return 0;\r |
| 149 | }\r |
| 150 | \r |
| 151 | if (ea==0x3b) // ($nn,pc,Rn)\r |
| 152 | {\r |
| 153 | ot(";@ Get extension word into r3:\n");\r |
| 154 | ot(" ldrh r3,[r4]\n");\r |
| 155 | ot(" mov r2,r3,lsr #10\n");\r |
| 156 | ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n");\r |
| 157 | ot(" and r2,r2,#0x3c ;@ r2=Index of Rn\n");\r |
| 158 | ot(" mov r0,r3,asl #24 ;@ r0=Get 8-bit signed Disp\n");\r |
| 159 | ot(" ldreqsh r2,[r7,r2] ;@ r2=Rn.w\n");\r |
| 160 | ot(" ldrne r2,[r7,r2] ;@ r2=Rn.l\n");\r |
| 161 | ot(" add r2,r2,r0,asr #24 ;@ r2=Disp+Rn\n");\r |
| 162 | ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n");\r |
| 163 | ot(" add r2,r2,r4 ;@ r2=Disp+Rn + Base+PC\n");\r |
| 164 | ot(" add r4,r4,#2 ;@ Increase PC\n");\r |
| 165 | ot(" sub r%d,r2,r0 ;@ r%d=Disp+PC+Rn\n",a,a);\r |
| 166 | Cycles+=size<2 ? 10:14; // Extra cycles\r |
| 167 | return 0;\r |
| 168 | }\r |
| 169 | \r |
| 170 | if (ea==0x3c)\r |
| 171 | {\r |
| 172 | if (size<2)\r |
| 173 | {\r |
| 174 | ot(" ldr%s r%d,[r4],#2 ;@ Fetch immediate value\n",Sarm[size&3],a);\r |
| 175 | Cycles+=4; // Extra cycles\r |
| 176 | return 0;\r |
| 177 | }\r |
| 178 | \r |
| 179 | ot(" ldrh r2,[r4],#2 ;@ Fetch immediate value\n");\r |
| 180 | ot(" ldrh r0,[r4],#2\n");\r |
| 181 | ot(" orr r%d,r0,r2,lsl #16\n",a);\r |
| 182 | Cycles+=8; // Extra cycles\r |
| 183 | return 0;\r |
| 184 | }\r |
| 185 | \r |
| 186 | return 1;\r |
| 187 | }\r |
| 188 | \r |
| 189 | // ---------------------------------------------------------------------------\r |
| 190 | // Read effective address in (ARM Register 'a') to ARM register 'v'\r |
| 191 | // 'a' and 'v' can be anything but 0 is generally best (for both)\r |
| 192 | // If (ea<0x10) nothing is trashed, else r0-r3 is trashed\r |
| 193 | // If 'top' is 1, the ARM register v shifted to the top, e.g. 0xc000 -> 0xc0000000\r |
| 194 | // Otherwise the ARM register v is sign extended, e.g. 0xc000 -> 0xffffc000\r |
| 195 | \r |
| 196 | int EaRead(int a,int v,int ea,int size,int top)\r |
| 197 | {\r |
| 198 | char text[32]="";\r |
| 199 | int shift=0;\r |
| 200 | \r |
| 201 | shift=32-(8<<size);\r |
| 202 | \r |
| 203 | DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address\r |
| 204 | \r |
| 205 | if (ea<0x10)\r |
| 206 | {\r |
| 207 | int lsl=2;\r |
| 208 | if (size>=2) lsl=0; // Having a lsl #2 here saves one opcode\r |
| 209 | \r |
| 210 | ot(";@ EaRead : Read register[r%d] into r%d:\n",a,v);\r |
| 211 | \r |
| 212 | if (lsl==0) ot(" ldr r%d,[r7,r%d,lsl #2]\n",v,a);\r |
| 213 | else ot(" ldr%s r%d,[r7,r%d]\n",Sarm[size&3],v,a);\r |
| 214 | \r |
| 215 | if (top && shift) ot(" mov r%d,r%d,asl #%d\n",v,v,shift);\r |
| 216 | \r |
| 217 | ot("\n"); return 0;\r |
| 218 | }\r |
| 219 | \r |
| 220 | ot(";@ EaRead : Read '%s' (address in r%d) into r%d:\n",text,a,v);\r |
| 221 | \r |
| 222 | if (ea==0x3c)\r |
| 223 | {\r |
| 224 | int asl=0;\r |
| 225 | \r |
| 226 | if (top) asl=shift;\r |
| 227 | \r |
| 228 | if (v!=a || asl) ot(" mov r%d,r%d,asl #%d\n",v,a,asl);\r |
| 229 | ot("\n"); return 0;\r |
| 230 | }\r |
| 231 | \r |
| 232 | if (a!=0) ot(" mov r0,r%d\n",a);\r |
| 233 | \r |
| 234 | if (ea>=0x3a && ea<=0x3b) MemHandler(2,size); // Fetch\r |
| 235 | else MemHandler(0,size); // Read\r |
| 236 | \r |
| 237 | if (v!=0 || shift) ot(" mov r%d,r0,asl #%d\n",v,shift);\r |
| 238 | if (top==0 && shift) ot(" mov r%d,r%d,asr #%d\n",v,v,shift);\r |
| 239 | \r |
| 240 | ot("\n"); return 0;\r |
| 241 | }\r |
| 242 | \r |
| 243 | // Return 1 if we can read this ea\r |
| 244 | int EaCanRead(int ea,int size)\r |
| 245 | {\r |
| 246 | if (size<0)\r |
| 247 | {\r |
| 248 | // LEA:\r |
| 249 | // These don't make sense?:\r |
| 250 | if (ea<0x10) return 0; // Register\r |
| 251 | if (ea==0x3c) return 0; // Immediate\r |
| 252 | if (ea>=0x18 && ea<0x28) return 0; // Pre/Post inc/dec An\r |
| 253 | }\r |
| 254 | \r |
| 255 | if (ea<=0x3c) return 1;\r |
| 256 | return 0;\r |
| 257 | }\r |
| 258 | \r |
| 259 | // ---------------------------------------------------------------------------\r |
| 260 | // Write effective address (ARM Register 'a') with ARM register 'v'\r |
| 261 | // Trashes r0-r3, 'a' can be 0 or 2+, 'v' can be 1 or higher\r |
| 262 | // If a==0 and v==1 it's faster though.\r |
| 263 | int EaWrite(int a,int v,int ea,int size,int top)\r |
| 264 | {\r |
| 265 | char text[32]="";\r |
| 266 | int shift=0;\r |
| 267 | \r |
| 268 | if (top) shift=32-(8<<size);\r |
| 269 | \r |
| 270 | DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address\r |
| 271 | \r |
| 272 | if (ea<0x10)\r |
| 273 | {\r |
| 274 | int lsl=2;\r |
| 275 | if (size>=2) lsl=0; // Having a lsl #2 here saves one opcode\r |
| 276 | \r |
| 277 | ot(";@ EaWrite: r%d into register[r%d]:\n",v,a);\r |
| 278 | if (shift) ot(" mov r%d,r%d,asr #%d\n",v,v,shift);\r |
| 279 | \r |
| 280 | if (lsl==0) ot(" str r%d,[r7,r%d,lsl #2]\n",v,a);\r |
| 281 | else ot(" str%s r%d,[r7,r%d]\n",Narm[size&3],v,a);\r |
| 282 | \r |
| 283 | ot("\n"); return 0;\r |
| 284 | }\r |
| 285 | \r |
| 286 | ot(";@ EaWrite: Write r%d into '%s' (address in r%d):\n",v,text,a);\r |
| 287 | \r |
| 288 | if (ea==0x3c) { ot("Error! Write EA=0x%x\n\n",ea); return 1; }\r |
| 289 | \r |
| 290 | if (a!=0 && v!=0) ot(" mov r0,r%d\n",a);\r |
| 291 | if (v!=1 || shift) ot(" mov r1,r%d,asr #%d\n",v,shift);\r |
| 292 | if (a!=0 && v==0) ot(" mov r0,r%d\n",a);\r |
| 293 | \r |
| 294 | MemHandler(1,size); // Call write handler\r |
| 295 | \r |
| 296 | ot("\n"); return 0;\r |
| 297 | }\r |
| 298 | \r |
| 299 | // Return 1 if we can write this ea\r |
| 300 | int EaCanWrite(int ea)\r |
| 301 | {\r |
| 302 | if (ea<=0x3b) return 1;\r |
| 303 | return 0;\r |
| 304 | }\r |
| 305 | // ---------------------------------------------------------------------------\r |