| 1 | /* FCE Ultra - NES/Famicom Emulator\r |
| 2 | *\r |
| 3 | * Copyright notice for this file:\r |
| 4 | * Copyright (C) 2005 CaH4e3\r |
| 5 | *\r |
| 6 | * This program is free software; you can redistribute it and/or modify\r |
| 7 | * it under the terms of the GNU General Public License as published by\r |
| 8 | * the Free Software Foundation; either version 2 of the License, or\r |
| 9 | * (at your option) any later version.\r |
| 10 | *\r |
| 11 | * This program is distributed in the hope that it will be useful,\r |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of\r |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r |
| 14 | * GNU General Public License for more details.\r |
| 15 | *\r |
| 16 | * You should have received a copy of the GNU General Public License\r |
| 17 | * along with this program; if not, write to the Free Software\r |
| 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA\r |
| 19 | */\r |
| 20 | \r |
| 21 | #include "mapinc.h"\r |
| 22 | \r |
| 23 | static uint8 is_large_banks, hw_switch;\r |
| 24 | static uint8 large_bank;\r |
| 25 | static uint8 prg_bank;\r |
| 26 | static uint8 chr_bank;\r |
| 27 | static uint8 bank_mode;\r |
| 28 | static uint8 mirroring;\r |
| 29 | static SFORMAT StateRegs[]=\r |
| 30 | {\r |
| 31 | {&large_bank, 1, "LB"},\r |
| 32 | {&hw_switch, 1, "DIPSW"},\r |
| 33 | {&prg_bank, 1, "PRG"},\r |
| 34 | {&chr_bank, 1, "CHR"},\r |
| 35 | {&bank_mode, 1, "BM"},\r |
| 36 | {&mirroring, 1, "MIRR"},\r |
| 37 | {0}\r |
| 38 | };\r |
| 39 | \r |
| 40 | static void Sync(void)\r |
| 41 | {\r |
| 42 | switch (bank_mode)\r |
| 43 | {\r |
| 44 | case 0x00:\r |
| 45 | case 0x10: setprg16(0x8000,large_bank|prg_bank);\r |
| 46 | setprg16(0xC000,large_bank|7);\r |
| 47 | break;\r |
| 48 | case 0x20: setprg32(0x8000,(large_bank|prg_bank)>>1);\r |
| 49 | break;\r |
| 50 | case 0x30: setprg16(0x8000,large_bank|prg_bank);\r |
| 51 | setprg16(0xC000,large_bank|prg_bank);\r |
| 52 | break;\r |
| 53 | }\r |
| 54 | setmirror(mirroring);\r |
| 55 | if(!is_large_banks)\r |
| 56 | setchr8(chr_bank);\r |
| 57 | }\r |
| 58 | \r |
| 59 | static DECLFR(BMC70in1Read)\r |
| 60 | {\r |
| 61 | if(bank_mode==0x10)\r |
| 62 | // if(is_large_banks)\r |
| 63 | return CartBR((A&0xFFF0)|hw_switch);\r |
| 64 | // else\r |
| 65 | // return CartBR((A&0xFFF0)|hw_switch);\r |
| 66 | else\r |
| 67 | return CartBR(A);\r |
| 68 | }\r |
| 69 | \r |
| 70 | static DECLFW(BMC70in1Write)\r |
| 71 | {\r |
| 72 | if(A&0x4000)\r |
| 73 | {\r |
| 74 | bank_mode=A&0x30;\r |
| 75 | prg_bank=A&7;\r |
| 76 | }\r |
| 77 | else\r |
| 78 | {\r |
| 79 | mirroring=((A&0x20)>>5)^1;\r |
| 80 | if(is_large_banks)\r |
| 81 | large_bank=(A&3)<<3;\r |
| 82 | else\r |
| 83 | chr_bank=A&7;\r |
| 84 | }\r |
| 85 | Sync();\r |
| 86 | }\r |
| 87 | \r |
| 88 | static void BMC70in1Reset(void)\r |
| 89 | {\r |
| 90 | bank_mode=0;\r |
| 91 | large_bank=0;\r |
| 92 | Sync();\r |
| 93 | hw_switch++;\r |
| 94 | hw_switch&=0xf;\r |
| 95 | }\r |
| 96 | \r |
| 97 | static void BMC70in1Power(void)\r |
| 98 | {\r |
| 99 | setchr8(0);\r |
| 100 | bank_mode=0;\r |
| 101 | large_bank=0;\r |
| 102 | Sync();\r |
| 103 | SetReadHandler(0x8000,0xFFFF,BMC70in1Read);\r |
| 104 | SetWriteHandler(0x8000,0xffff,BMC70in1Write);\r |
| 105 | }\r |
| 106 | \r |
| 107 | static void StateRestore(int version)\r |
| 108 | {\r |
| 109 | Sync();\r |
| 110 | }\r |
| 111 | \r |
| 112 | void BMC70in1_Init(CartInfo *info)\r |
| 113 | {\r |
| 114 | is_large_banks=0;\r |
| 115 | hw_switch=0xd;\r |
| 116 | info->Power=BMC70in1Power;\r |
| 117 | info->Reset=BMC70in1Reset;\r |
| 118 | GameStateRestore=StateRestore;\r |
| 119 | AddExState(&StateRegs, ~0, 0, 0);\r |
| 120 | }\r |
| 121 | \r |
| 122 | void BMC70in1B_Init(CartInfo *info)\r |
| 123 | {\r |
| 124 | is_large_banks=1;\r |
| 125 | hw_switch=0x6;\r |
| 126 | info->Power=BMC70in1Power;\r |
| 127 | info->Reset=BMC70in1Reset;\r |
| 128 | GameStateRestore=StateRestore;\r |
| 129 | AddExState(&StateRegs, ~0, 0, 0);\r |
| 130 | }\r |