| 1 | /* FCE Ultra - NES/Famicom Emulator |
| 2 | * |
| 3 | * Copyright notice for this file: |
| 4 | * Copyright (C) 2002 Ben Parnell |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | #include "mapinc.h" |
| 22 | |
| 23 | static uint8 cmd; |
| 24 | static uint8 latch[8]; |
| 25 | #define CHRRAM (GameMemBlock) |
| 26 | |
| 27 | static void S74LS374NSynco(void) |
| 28 | { |
| 29 | setprg32(0x8000,latch[0]); |
| 30 | X6502_Rebase(); |
| 31 | setchr8(latch[1]); |
| 32 | setmirror(latch[2]&1); |
| 33 | // setchr8(6); |
| 34 | } |
| 35 | |
| 36 | static DECLFW(S74LS374NWrite) |
| 37 | { |
| 38 | //printf("$%04x:$%02x\n",A,V); |
| 39 | A&=0x4101; |
| 40 | if(A==0x4100) |
| 41 | cmd=V&7; |
| 42 | else |
| 43 | { |
| 44 | switch(cmd) |
| 45 | { |
| 46 | case 0:latch[0]=0;latch[1]=3;break; |
| 47 | case 4:latch[1]&=3;latch[1]|=(V<<2);break; |
| 48 | case 5:latch[0]=V&0x7;break; |
| 49 | case 6:latch[1]&=0x1C;latch[1]|=V&3;break; |
| 50 | case 7:latch[2]=V&1;break; |
| 51 | } |
| 52 | S74LS374NSynco(); |
| 53 | } |
| 54 | } |
| 55 | |
| 56 | static void S74LS374NReset(void) |
| 57 | { |
| 58 | latch[0]=latch[2]=0; |
| 59 | latch[1]=3; |
| 60 | S74LS374NSynco(); |
| 61 | SetReadHandler(0x8000,0xFFFF,CartBR); |
| 62 | SetWriteHandler(0x4100,0x7FFF,S74LS374NWrite); |
| 63 | } |
| 64 | |
| 65 | static void S74LS374NRestore(int version) |
| 66 | { |
| 67 | S74LS374NSynco(); |
| 68 | } |
| 69 | |
| 70 | void S74LS374N_Init(void) |
| 71 | { |
| 72 | BoardPower=S74LS374NReset; |
| 73 | GameStateRestore=S74LS374NRestore; |
| 74 | AddExState(latch, 3, 0, "LATC"); |
| 75 | AddExState(&cmd, 1, 0, "CMD"); |
| 76 | } |
| 77 | |
| 78 | static int type; |
| 79 | static void S8259Synco(void) |
| 80 | { |
| 81 | int x; |
| 82 | |
| 83 | setprg32(0x8000,latch[5]&7); |
| 84 | X6502_Rebase(); |
| 85 | |
| 86 | if(!UNIFchrrama) // No CHR RAM? Then BS'ing is ok. |
| 87 | { |
| 88 | if(!type) |
| 89 | { |
| 90 | for(x=0;x<4;x++) |
| 91 | setchr2(0x800*x,(x&1)|((latch[x]&7)<<1)|((latch[4]&7)<<4)); |
| 92 | } |
| 93 | else |
| 94 | { |
| 95 | for(x=0;x<4;x++) |
| 96 | setchr2(0x800*x,(latch[x]&0x7)|((latch[4]&7)<<3)); |
| 97 | } |
| 98 | } |
| 99 | switch((latch[7]>>1)&3) |
| 100 | { |
| 101 | case 0:setmirrorw(0,0,0,1);break; |
| 102 | case 1:setmirror(MI_H);break; |
| 103 | case 2:setmirror(MI_V);break; |
| 104 | case 3:setmirror(MI_0);break; |
| 105 | } |
| 106 | } |
| 107 | |
| 108 | static DECLFW(S8259Write) |
| 109 | { |
| 110 | A&=0x4101; |
| 111 | if(A==0x4100) cmd=V; |
| 112 | else |
| 113 | { |
| 114 | latch[cmd&7]=V; |
| 115 | S8259Synco(); |
| 116 | } |
| 117 | } |
| 118 | |
| 119 | static void S8259Reset(void) |
| 120 | { |
| 121 | int x; |
| 122 | cmd=0; |
| 123 | |
| 124 | for(x=0;x<8;x++) latch[x]=0; |
| 125 | if(UNIFchrrama) setchr8(0); |
| 126 | |
| 127 | S8259Synco(); |
| 128 | SetReadHandler(0x8000,0xFFFF,CartBR); |
| 129 | SetWriteHandler(0x4100,0x7FFF,S8259Write); |
| 130 | } |
| 131 | |
| 132 | static void S8259Restore(int version) |
| 133 | { |
| 134 | S8259Synco(); |
| 135 | } |
| 136 | |
| 137 | void S8259A_Init(void) |
| 138 | { |
| 139 | BoardPower=S8259Reset; |
| 140 | GameStateRestore=S8259Restore; |
| 141 | AddExState(latch, 8, 0, "LATC"); |
| 142 | AddExState(&cmd, 1, 0, "CMD"); |
| 143 | type=0; |
| 144 | |
| 145 | //if(!CHRsize[0]) |
| 146 | //{ |
| 147 | // SetupCartCHRMapping(0,CHRRAM,8192,1); |
| 148 | // AddExState(CHRRAM, 8192, 0, "CHRR"); |
| 149 | //} |
| 150 | } |
| 151 | |
| 152 | void S8259B_Init(void) |
| 153 | { |
| 154 | BoardPower=S8259Reset; |
| 155 | GameStateRestore=S8259Restore; |
| 156 | AddExState(latch, 8, 0, "LATC"); |
| 157 | AddExState(&cmd, 1, 0, "CMD"); |
| 158 | type=1; |
| 159 | } |
| 160 | |
| 161 | static void(*WSync)(void); |
| 162 | |
| 163 | static void SA0161MSynco() |
| 164 | { |
| 165 | setprg32(0x8000,(latch[0]>>3)&1); |
| 166 | X6502_Rebase(); |
| 167 | setchr8(latch[0]&7); |
| 168 | } |
| 169 | |
| 170 | static DECLFW(SAWrite) |
| 171 | { |
| 172 | if(A&0x100) |
| 173 | { |
| 174 | latch[0]=V; |
| 175 | WSync(); |
| 176 | } |
| 177 | } |
| 178 | |
| 179 | static void SAReset(void) |
| 180 | { |
| 181 | latch[0]=0; |
| 182 | WSync(); |
| 183 | SetReadHandler(0x8000,0xFFFF,CartBR); |
| 184 | SetWriteHandler(0x4100,0x5FFF,SAWrite); |
| 185 | } |
| 186 | |
| 187 | void SA0161M_Init(void) |
| 188 | { |
| 189 | WSync=SA0161MSynco; |
| 190 | GameStateRestore=SA0161MSynco; |
| 191 | BoardPower=SAReset; |
| 192 | AddExState(&latch[0], 1, 0, "LATC"); |
| 193 | } |
| 194 | |
| 195 | static void SA72007Synco() |
| 196 | { |
| 197 | setprg32(0x8000,0); |
| 198 | X6502_Rebase(); |
| 199 | setchr8(latch[0]>>7); |
| 200 | } |
| 201 | |
| 202 | void SA72007_Init(void) |
| 203 | { |
| 204 | WSync=SA72007Synco; |
| 205 | GameStateRestore=SA72007Synco; |
| 206 | BoardPower=SAReset; |
| 207 | AddExState(&latch[0], 1, 0, "LATC"); |
| 208 | } |
| 209 | |
| 210 | static void SA72008Synco() |
| 211 | { |
| 212 | setprg32(0x8000,(latch[0]>>2)&1); |
| 213 | X6502_Rebase(); |
| 214 | setchr8(latch[0]&3); |
| 215 | } |
| 216 | |
| 217 | void SA72008_Init(void) |
| 218 | { |
| 219 | WSync=SA72008Synco; |
| 220 | GameStateRestore=SA72008Synco; |
| 221 | BoardPower=SAReset; |
| 222 | AddExState(&latch[0], 1, 0, "LATC"); |
| 223 | } |
| 224 | |
| 225 | static DECLFW(SADWrite) |
| 226 | { |
| 227 | latch[0]=V; |
| 228 | WSync(); |
| 229 | } |
| 230 | |
| 231 | static void SADReset(void) |
| 232 | { |
| 233 | latch[0]=0; |
| 234 | WSync(); |
| 235 | SetReadHandler(0x8000,0xFFFF,CartBR); |
| 236 | SetWriteHandler(0x8000,0xFFFF,SADWrite); |
| 237 | } |
| 238 | |
| 239 | static void SA0036Synco() |
| 240 | { |
| 241 | setprg32(0x8000,0); |
| 242 | X6502_Rebase(); |
| 243 | setchr8(latch[0]>>7); |
| 244 | } |
| 245 | |
| 246 | static void SA0037Synco() |
| 247 | { |
| 248 | setprg32(0x8000,(latch[0]>>3)&1); |
| 249 | X6502_Rebase(); |
| 250 | setchr8(latch[0]&7); |
| 251 | } |
| 252 | |
| 253 | void SA0036_Init(void) |
| 254 | { |
| 255 | WSync=SA0036Synco; |
| 256 | GameStateRestore=SA0036Synco; |
| 257 | BoardPower=SADReset; |
| 258 | AddExState(&latch[0], 1, 0, "LATC"); |
| 259 | } |
| 260 | |
| 261 | void SA0037_Init(void) |
| 262 | { |
| 263 | WSync=SA0037Synco; |
| 264 | GameStateRestore=SA0037Synco; |
| 265 | BoardPower=SADReset; |
| 266 | AddExState(&latch[0], 1, 0, "LATC"); |
| 267 | } |
| 268 | |
| 269 | static void TCU01Synco() |
| 270 | { |
| 271 | setprg32(0x8000,(latch[0]>>2)&1); |
| 272 | X6502_Rebase(); |
| 273 | setchr8((latch[0]>>3)&0xF); |
| 274 | } |
| 275 | |
| 276 | static DECLFW(TCWrite) |
| 277 | { |
| 278 | if((A&0x103)==0x102) |
| 279 | latch[0]=V; |
| 280 | TCU01Synco(); |
| 281 | } |
| 282 | |
| 283 | static void TCU01Reset(void) |
| 284 | { |
| 285 | latch[0]=0; |
| 286 | SetReadHandler(0x8000,0xFFFF,CartBR); |
| 287 | SetWriteHandler(0x4100,0xFFFF,TCWrite); |
| 288 | TCU01Synco(); |
| 289 | } |
| 290 | |
| 291 | void TCU01_Init(void) |
| 292 | { |
| 293 | GameStateRestore=TCU01Synco; |
| 294 | BoardPower=TCU01Reset; |
| 295 | AddExState(&latch[0], 1, 0, "LATC"); |
| 296 | } |
| 297 | |