| 1 | /************************************* |
| 2 | Little John GP32 |
| 3 | File : ncpu.S |
| 4 | Authors : FCA author |
| 5 | modified and adapted by Yoyo. |
| 6 | timing fixed, missing opcodes added |
| 7 | and adapted for fceu by notaz, 2007. |
| 8 | **************************************/ |
| 9 | |
| 10 | #include "ncpu.h" |
| 11 | |
| 12 | /* emulate (some) dummy reads (may need that because they affect open bus) */ |
| 13 | #define DO_DUMMY_READS 1 |
| 14 | |
| 15 | @@@ |
| 16 | @@@ Offets from REG_OP_TABLE |
| 17 | @@@ |
| 18 | #define OTOFFS_NES_RAM (nes_internal_ram - cpu_exec_table) |
| 19 | #define OTOFFS_NES_STACK (nes_stack - cpu_exec_table) |
| 20 | #define OTOFFS_NES_REGS (nes_registers - cpu_exec_table) |
| 21 | #define OTOFFS_PC_BASE (pc_base - cpu_exec_table) |
| 22 | #define OTOFFS_IRQ_HOOK (MapIRQHook - cpu_exec_table) |
| 23 | #define OTOFFS_TIMESTAMP (timestamp - cpu_exec_table) |
| 24 | #define OTOFFS_X (X_ - cpu_exec_table) |
| 25 | |
| 26 | @ fceu |
| 27 | #define FCEU_IQNMI 0x08 |
| 28 | #define FCEU_IQTEMP 0x80 |
| 29 | |
| 30 | |
| 31 | @@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 32 | |
| 33 | |
| 34 | @ SECTION_FAST |
| 35 | SECTION_TEXT |
| 36 | ALIGN |
| 37 | |
| 38 | /* |
| 39 | bbbb: |
| 40 | .ascii "ab_a: %04x" |
| 41 | .byte 0x0a,0 |
| 42 | .align 4 |
| 43 | stmfd sp!,{r0-r3,r12,lr} |
| 44 | mov r1,r0 |
| 45 | ldr r0,=bbbb |
| 46 | bl printf |
| 47 | ldmfd sp!,{r0-r3,r12,lr} |
| 48 | */ |
| 49 | |
| 50 | @@@ |
| 51 | @@@ r0 = Address (unbased) |
| 52 | @@@ uses REG_OP_TABLE; sets REG_PC; trashes r1,r2; keeps r0 |
| 53 | @@@ |
| 54 | .macro REBASE_PC |
| 55 | @ FIXME: do something with mem not in Page[]. |
| 56 | @ stmfd sp!, {r0-r3,r12,lr} |
| 57 | @ mov r1, r0 |
| 58 | @ ldr r0, =bbbb |
| 59 | @ bl printf |
| 60 | @ ldmfd sp!, {r0-r3,r12,lr} |
| 61 | |
| 62 | cmp r0, #0x2000 |
| 63 | ldrge r1, =Page |
| 64 | movge r2, r0, lsr #11 |
| 65 | ldrge r2, [r1, r2, lsl #2] |
| 66 | andlt r2, r0, #0xf800 |
| 67 | addlt r1, REG_OP_TABLE, #OTOFFS_NES_RAM |
| 68 | sublt r2, r1, r2 |
| 69 | str r2, [REG_OP_TABLE, #OTOFFS_PC_BASE] |
| 70 | add REG_PC, r2, r0 |
| 71 | .endm |
| 72 | |
| 73 | |
| 74 | @ updates fceu "timestamp" variable |
| 75 | @ loads cycles to reg, reg!=r1, trashes r1, kills flags |
| 76 | .macro FLUSH_TIMESTAMP reg |
| 77 | ands \reg, REG_CYCLE, #0xff |
| 78 | beq 1f |
| 79 | ldr r1, [REG_OP_TABLE, #OTOFFS_TIMESTAMP] |
| 80 | orr REG_CYCLE, REG_CYCLE, \reg, lsl #8 @ put cycles for do_irq_hook |
| 81 | add r1, r1, \reg |
| 82 | bic REG_CYCLE, REG_CYCLE, #0xff |
| 83 | str r1, [REG_OP_TABLE, #OTOFFS_TIMESTAMP] |
| 84 | 1: |
| 85 | .endm |
| 86 | |
| 87 | |
| 88 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 89 | @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
| 90 | @@@ |
| 91 | @@@ CYCLE_NEXT |
| 92 | @@@ |
| 93 |