| 1 | /* |
| 2 | * z64 |
| 3 | * |
| 4 | * Copyright (C) 2007 ziggy |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along |
| 17 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. |
| 19 | * |
| 20 | **/ |
| 21 | |
| 22 | #ifndef _Z64_H_ |
| 23 | #define _Z64_H_ |
| 24 | #include <stdint.h> |
| 25 | |
| 26 | #define DACRATE_NTSC (48681812) |
| 27 | #define DACRATE_PAL (49656530) |
| 28 | #define DACRATE_MPAL (48628316) |
| 29 | |
| 30 | #define SP_INTERRUPT 0x1 |
| 31 | #define SI_INTERRUPT 0x2 |
| 32 | #define AI_INTERRUPT 0x4 |
| 33 | #define VI_INTERRUPT 0x8 |
| 34 | #define PI_INTERRUPT 0x10 |
| 35 | #define DP_INTERRUPT 0x20 |
| 36 | |
| 37 | #define SP_STATUS_HALT 0x0001 |
| 38 | #define SP_STATUS_BROKE 0x0002 |
| 39 | #define SP_STATUS_DMABUSY 0x0004 |
| 40 | #define SP_STATUS_DMAFULL 0x0008 |
| 41 | #define SP_STATUS_IOFULL 0x0010 |
| 42 | #define SP_STATUS_SSTEP 0x0020 |
| 43 | #define SP_STATUS_INTR_BREAK 0x0040 |
| 44 | #define SP_STATUS_SIGNAL0 0x0080 |
| 45 | #define SP_STATUS_SIGNAL1 0x0100 |
| 46 | #define SP_STATUS_SIGNAL2 0x0200 |
| 47 | #define SP_STATUS_SIGNAL3 0x0400 |
| 48 | #define SP_STATUS_SIGNAL4 0x0800 |
| 49 | #define SP_STATUS_SIGNAL5 0x1000 |
| 50 | #define SP_STATUS_SIGNAL6 0x2000 |
| 51 | #define SP_STATUS_SIGNAL7 0x4000 |
| 52 | |
| 53 | #define DP_STATUS_XBUS_DMA 0x01 |
| 54 | #define DP_STATUS_FREEZE 0x02 |
| 55 | #define DP_STATUS_FLUSH 0x04 |
| 56 | #define DP_STATUS_START_GCLK 0x008 |
| 57 | #define DP_STATUS_TMEM_BUSY 0x010 |
| 58 | #define DP_STATUS_PIPE_BUSY 0x020 |
| 59 | #define DP_STATUS_CMD_BUSY 0x040 |
| 60 | #define DP_STATUS_CBUF_READY 0x080 |
| 61 | #define DP_STATUS_DMA_BUSY 0x100 |
| 62 | #define DP_STATUS_END_VALID 0x200 |
| 63 | #define DP_STATUS_START_VALID 0x400 |
| 64 | |
| 65 | #define R4300i_SP_Intr 1 |
| 66 | |
| 67 | |
| 68 | #define LSB_FIRST 1 // TODO : check for platform |
| 69 | #ifdef LSB_FIRST |
| 70 | #define BYTE_ADDR_XOR 3 |
| 71 | #define WORD_ADDR_XOR 1 |
| 72 | #define BYTE4_XOR_BE(a) ((a) ^ 3) /* read/write a byte to a 32-bit space */ |
| 73 | #else |
| 74 | #define BYTE_ADDR_XOR 0 |
| 75 | #define WORD_ADDR_XOR 0 |
| 76 | #define BYTE4_XOR_BE(a) (a) |
| 77 | #endif |
| 78 | |
| 79 | |
| 80 | typedef uint64_t UINT64; |
| 81 | typedef int64_t INT64; |
| 82 | typedef uint32_t UINT32; |
| 83 | typedef int32_t INT32; |
| 84 | typedef uint16_t UINT16; |
| 85 | typedef int16_t INT16; |
| 86 | typedef uint8_t UINT8; |
| 87 | typedef int8_t INT8; |
| 88 | typedef unsigned int offs_t; |
| 89 | #endif |
| 90 | |