4 // --------------------- Opcodes 0x0000+ ---------------------
\r
5 // Emit an Ori/And/Sub/Add/Eor/Cmp Immediate opcode, 0000ttt0 00aaaaaa
\r
12 // Get source and target EA
\r
13 type=(op>>9)&7; if (type==4 || type>=7) return 1;
\r
14 size=(op>>6)&3; if (size>=3) return 1;
\r
18 // See if we can do this opcode:
\r
19 if (EaCanRead(tea,size)==0) return 1;
\r
20 if (type!=6 && EaCanWrite(tea)==0) return 1;
\r
23 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
25 OpStart(op); Cycles=4;
\r
27 EaCalc(10,0x0000, sea,size);
\r
28 EaRead(10, 10, sea,size,1);
\r
30 EaCalc(11,0x003f, tea,size);
\r
31 EaRead(11, 0, tea,size,1);
\r
33 ot(";@ Do arithmetic:\n");
\r
35 if (type==0) ot(" orr r1,r0,r10\n");
\r
36 if (type==1) ot(" and r1,r0,r10\n");
\r
37 if (type==2) ot(" subs r1,r0,r10 ;@ Defines NZCV\n");
\r
38 if (type==3) ot(" adds r1,r0,r10 ;@ Defines NZCV\n");
\r
39 if (type==5) ot(" eor r1,r0,r10\n");
\r
40 if (type==6) ot(" cmp r0,r10 ;@ Defines NZCV\n");
\r
42 if (type<2 || type==5) ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); // 0,1,5
\r
44 if (type< 2) OpGetFlags(0,0); // Ori/And
\r
45 if (type==2) OpGetFlags(1,1); // Sub: Subtract/X-bit
\r
46 if (type==3) OpGetFlags(0,1); // Add: X-bit
\r
47 if (type==5) OpGetFlags(0,0); // Eor
\r
48 if (type==6) OpGetFlags(1,0); // Cmp: Subtract
\r
53 EaWrite(11, 1, tea,size,1);
\r
59 if (size>=2 && tea<0x10) Cycles+=2;
\r
63 if (size>=2) Cycles+=4;
\r
64 if (tea>=0x10) Cycles+=4;
\r
65 if (Amatch && type==1 && size>=2 && tea<0x10) Cycles-=2;
\r
73 // --------------------- Opcodes 0x5000+ ---------------------
\r
76 // 0101nnnt xxeeeeee (nnn=#8,1-7 t=addq/subq xx=size, eeeeee=EA)
\r
77 int num=0,type=0,size=0,ea=0;
\r
82 num =(op>>9)&7; if (num==0) num=8;
\r
84 size=(op>>6)&3; if (size>=3) return 1;
\r
87 // See if we can do this opcode:
\r
88 if (EaCanRead (ea,size)==0) return 1;
\r
89 if (EaCanWrite(ea )==0) return 1;
\r
91 use=op; if (ea<0x38) use&=~7;
\r
92 if ((ea&0x38)==0x08) { size=2; use&=~0xc0; } // Every addq #n,An is 32-bit
\r
94 if (num!=8) use|=0x0e00; // If num is not 8, use same handler
\r
95 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
99 if (size>=2 && ea!=8) Cycles+=4;
\r
101 EaCalc(10,0x003f, ea,size);
\r
102 EaRead(10, 0, ea,size,1);
\r
104 shift=32-(8<<size);
\r
110 if (lsr>=0) ot(" mov r2,r8,lsr #%d ;@ Get quick value\n", lsr);
\r
111 else ot(" mov r2,r8,lsl #%d ;@ Get quick value\n",-lsr);
\r
113 ot(" and r2,r2,#0x%.4x\n",7<<shift);
\r
115 strcpy(count,"r2");
\r
118 if (num==8) sprintf(count,"#0x%.4x",8<<shift);
\r
120 if (type==0) ot(" adds r1,r0,%s\n",count);
\r
121 if (type==1) ot(" subs r1,r0,%s\n",count);
\r
123 if ((ea&0x38)!=0x08) OpGetFlags(type,1);
\r
126 EaWrite(10, 1, ea,size,1);
\r
133 // --------------------- Opcodes 0x8000+ ---------------------
\r
134 // 1t0tnnnd xxeeeeee (tt=type:or/sub/and/add xx=size, eeeeee=EA)
\r
135 int OpArithReg(int op)
\r
138 int type=0,size=0,dir=0,rea=0,ea=0;
\r
143 size=(op>> 6)&3; if (size>=3) return 1;
\r
146 if (dir && ea<0x10) return 1; // addx/subx opcode
\r
148 // See if we can do this opcode:
\r
149 if (dir==0 && EaCanWrite(rea)==0) return 1;
\r
150 if (dir && EaCanWrite( ea)==0) return 1;
\r
153 use&=~0x0e00; // Use same opcode for Dn
\r
154 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
156 OpStart(op); Cycles=4;
\r
158 ot(";@ Get r10=EA r11=EA value\n");
\r
159 EaCalc(10,0x003f, ea,size);
\r
160 EaRead(10, 11, ea,size,1);
\r
161 ot(";@ Get r0=Register r1=Register value\n");
\r
162 EaCalc( 0,0x0e00,rea,size);
\r
163 EaRead( 0, 1,rea,size,1);
\r
165 ot(";@ Do arithmetic:\n");
\r
166 if (type==0) ot(" orr ");
\r
167 if (type==1) ot(" subs ");
\r
168 if (type==4) ot(" and ");
\r
169 if (type==5) ot(" adds ");
\r
170 if (dir) ot("r1,r11,r1\n");
\r
171 else ot("r1,r1,r11\n");
\r
173 if ((type&1)==0) ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
\r
175 OpGetFlags(type==1,type&1); // 1==subtract
\r
178 ot(";@ Save result:\n");
\r
179 if (dir) EaWrite(10, 1, ea,size,1);
\r
180 else EaWrite( 0, 1,rea,size,1);
\r
182 if (size==1 && ea>=0x10) Cycles+=4;
\r
183 if (size>=2) { if (ea<0x10) Cycles+=4; else Cycles+=2; }
\r
190 // --------------------- Opcodes 0x80c0+ ---------------------
\r
193 // Div/Mul: 1m00nnns 11eeeeee (m=Mul, nnn=Register Dn, s=signed, eeeeee=EA)
\r
194 int type=0,rea=0,sign=0,ea=0;
\r
197 type=(op>>14)&1; // div/mul
\r
202 // See if we can do this opcode:
\r
203 if (EaCanRead(ea,1)==0) return 1;
\r
206 use&=~0x0e00; // Use same for all registers
\r
207 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
209 OpStart(op); Cycles=type?70:133;
\r
211 EaCalc(10,0x003f, ea, 1);
\r
212 EaRead(10, 10, ea, 1);
\r
214 EaCalc (0,0x0e00,rea, 2);
\r
215 EaRead (0, 2,rea, 2);
\r
219 ot(" cmp r10,#0\n");
\r
220 ot(" moveq r10,#1 ;@ Divide by zero\n");
\r
225 ot(" mov r11,#0 ;@ r11 = 1 if the result is negative\n");
\r
226 ot(" eorlt r11,r11,#1\n");
\r
227 ot(" rsblt r10,r10,#0 ;@ Make r10 positive\n");
\r
229 ot(" cmp r2,#0\n");
\r
230 ot(" eorlt r11,r11,#1\n");
\r
231 ot(" rsblt r2,r2,#0 ;@ Make r2 positive\n");
\r
235 ot(";@ Divide r2 by r10\n");
\r
236 ot(" mov r3,#0\n");
\r
237 ot(" mov r1,r10\n");
\r
239 ot(";@ Shift up divisor till it's just less than numerator\n");
\r
240 ot("Shift%.4x%s\n",op,ms?"":":");
\r
241 ot(" cmp r1,r2,lsr #1\n");
\r
242 ot(" movls r1,r1,lsl #1\n");
\r
243 ot(" bcc Shift%.4x\n",op);
\r
246 ot("Divide%.4x%s\n",op,ms?"":":");
\r
247 ot(" cmp r2,r1\n");
\r
248 ot(" adc r3,r3,r3 ;@ Double r3 and add 1 if carry set\n");
\r
249 ot(" subcs r2,r2,r1\n");
\r
250 ot(" teq r1,r10\n");
\r
251 ot(" movne r1,r1,lsr #1\n");
\r
252 ot(" bne Divide%.4x\n",op);
\r
257 ot(" tst r11,r11\n");
\r
258 ot(" rsbne r3,r3,#0 ;@ Negate if result is negative\n");
\r
261 ot(" mov r11,r2 ;@ Remainder\n");
\r
263 ot(" adds r1,r3,#0 ;@ Defines NZ, clears CV\n");
\r
266 ot(" mov r1,r1,lsl #16 ;@ Clip to 16-bits\n");
\r
267 ot(" mov r1,r1,lsr #16\n");
\r
268 ot(" orr r1,r1,r11,lsl #16 ;@ Insert remainder\n");
\r
275 ot(";@ Get 16-bit signs right:\n");
\r
276 if (sign==0) { ot(" mov r10,r10,lsl #16\n"); shift="lsr"; }
\r
277 ot(" mov r2,r2,lsl #16\n");
\r
279 if (sign==0) ot(" mov r10,r10,lsr #16\n");
\r
280 ot(" mov r2,r2,%s #16\n",shift);
\r
283 ot(" mul r1,r2,r10\n");
\r
284 ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
\r
287 if (Amatch && ea==0x3c) Cycles-=4;
\r
291 EaWrite(0, 1,rea, 2);
\r
299 // Get X Bit into carry - trashes r2
\r
300 static int GetXBit(int subtract)
\r
302 ot(";@ Get X bit:\n");
\r
303 ot(" ldrb r2,[r7,#0x45]\n");
\r
304 if (subtract) ot(" mvn r2,r2,lsl #28 ;@ Invert it\n");
\r
305 else ot(" mov r2,r2,lsl #28\n");
\r
306 ot(" msr cpsr_flg,r2 ;@ Get into Carry\n");
\r
311 // --------------------- Opcodes 0x8100+ ---------------------
\r
312 // 1t00ddd1 0000asss - sbcd/abcd Ds,Dd or -(As),-(Ad)
\r
316 int type=0,sea=0,addr=0,dea=0;
\r
323 if (addr) { sea|=0x20; dea|=0x20; }
\r
325 use=op&~0x0e07; // Use same opcode for all registers
\r
326 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
328 OpStart(op); Cycles=6;
\r
330 EaCalc( 0,0x0007, sea,0);
\r
331 EaRead( 0, 10, sea,0,1);
\r
332 EaCalc(11,0x0e00, dea,0);
\r
333 EaRead(11, 1, dea,0,1);
\r
335 ot(" ldrb r2,[r7,#0x45] ;@ Get X bit\n");
\r
336 ot(" tst r2,#2\n");
\r
337 ot(" addne r10,r10,#0x01000000 ;@ Add carry bit\n");
\r
341 ot(";@ Add units into r2:\n");
\r
342 ot(" and r2,r1, #0x0f000000\n");
\r
343 ot(" and r0,r10,#0x0f000000\n");
\r
344 ot(" add r2,r2,r0\n");
\r
345 ot(" cmp r2,#0x0a000000\n");
\r
346 ot(" addpl r1,r1,#0x06000000 ;@ Decimal adjust units\n");
\r
347 ot(" add r1,r1,r10 ;@ Add BCD\n");
\r
348 ot(" mov r0,r1,lsr #24\n");
\r
349 ot(" cmp r0,#0xa0\n");
\r
350 ot(" addpl r1,r1,#0x60000000 ;@ Decimal adjust tens\n");
\r
355 ot(";@ Sub units into r2:\n");
\r
356 ot(" and r2,r1, #0x0f000000\n");
\r
357 ot(" and r0,r10,#0x0f000000\n");
\r
358 ot(" subs r2,r2,r0\n");
\r
359 ot(" submi r1,r1,#0x06000000 ;@ Decimal adjust units\n");
\r
360 ot(" subs r1,r1,r10 ;@ Subtract BCD\n");
\r
361 ot(" submis r1,r1,#0x60000000 ;@ Decimal adjust tens\n");
\r
366 EaWrite(11, 1, dea,0,1);
\r
373 // --------------------- Opcodes 0x90c0+ ---------------------
\r
374 // Suba/Cmpa/Adda 1tt1nnnx 11eeeeee (tt=type, x=size, eeeeee=Source EA)
\r
375 int OpAritha(int op)
\r
378 int type=0,size=0,sea=0,dea=0;
\r
380 // Suba/Cmpa/Adda/(invalid):
\r
381 type=(op>>13)&3; if (type>=3) return 1;
\r
383 size=(op>>8)&1; size++;
\r
384 dea=(op>>9)&7; dea|=8; // Dest=An
\r
385 sea=op&0x003f; // Source
\r
387 // See if we can do this opcode:
\r
388 if (EaCanRead(sea,size)==0) return 1;
\r
391 use&=~0x0e00; // Use same opcode for An
\r
392 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
394 OpStart(op); Cycles=4;
\r
395 EaCalc ( 0,0x003f, sea,size);
\r
396 EaRead ( 0, 10, sea,size);
\r
398 EaCalc ( 0,0x0e00, dea,2);
\r
399 EaRead ( 0, 1, dea,2);
\r
401 if (type==0) ot(" sub r1,r1,r10\n");
\r
402 if (type==1) ot(" cmp r1,r10 ;@ Defines NZCV\n");
\r
403 if (type==1) OpGetFlags(1,0); // Get Cmp flags
\r
404 if (type==2) ot(" add r1,r1,r10\n");
\r
407 EaWrite( 0, 1, dea,2);
\r
409 if (Amatch && sea==0x3c) Cycles-=size<2?4:8; // Correct?
\r
410 if (size>=2) { if (sea<0x10) Cycles+=4; else Cycles+=2; }
\r
417 // --------------------- Opcodes 0x9100+ ---------------------
\r
418 // Emit a Subx/Addx opcode, 1t01ddd1 zz000sss addx.z Ds,Dd
\r
422 int type=0,size=0,dea=0,sea=0;
\r
426 size=(op>> 6)&3; if (size>=3) return 1;
\r
429 // See if we can do this opcode:
\r
430 if (EaCanRead(sea,size)==0) return 1;
\r
431 if (EaCanWrite(dea)==0) return 1;
\r
434 use&=~0x0e00; // Use same opcode for Dn
\r
435 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
437 OpStart(op); Cycles=8;
\r
439 ot(";@ Get r10=EA r11=EA value\n");
\r
440 EaCalc( 0,0x003f,sea,size);
\r
441 EaRead( 0, 11,sea,size,1);
\r
442 ot(";@ Get r0=Register r1=Register value\n");
\r
443 EaCalc( 0,0x0e00,dea,size);
\r
444 EaRead( 0, 1,dea,size,1);
\r
446 ot(";@ Do arithmetic:\n");
\r
449 if (type==5 && size<2)
\r
451 ot(";@ Make sure the carry bit will tip the balance:\n");
\r
452 if (size==0) ot(" ldr r2,=0x00ffffff\n");
\r
453 else ot(" ldr r2,=0x0000ffff\n");
\r
454 ot(" orr r11,r11,r2\n");
\r
458 if (type==1) ot(" sbcs r1,r1,r11\n");
\r
459 if (type==5) ot(" adcs r1,r1,r11\n");
\r
460 OpGetFlags(type==1,1); // subtract
\r
463 ot(";@ Save result:\n");
\r
464 EaWrite( 0, 1, dea,size,1);
\r
471 // --------------------- Opcodes 0xb000+ ---------------------
\r
472 // Emit a Cmp/Eor opcode, 1011rrrt xxeeeeee (rrr=Dn, t=cmp/eor, xx=size extension, eeeeee=ea)
\r
473 int OpCmpEor(int op)
\r
476 int size=0,ea=0,use=0;
\r
478 // Get EA and register EA
\r
481 size=(op>>6)&3; if (size>=3) return 1;
\r
484 // See if we can do this opcode:
\r
485 if (EaCanRead(ea,size)==0) return 1;
\r
486 if (eor && EaCanWrite(ea)==0) return 1;
\r
489 use&=~0x0e00; // Use 1 handler for register d0-7
\r
490 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
492 OpStart(op); Cycles=eor?8:4;
\r
494 ot(";@ Get EA into r10 and value into r0:\n");
\r
495 EaCalc (10,0x003f, ea,size);
\r
496 EaRead (10, 0, ea,size,1);
\r
498 ot(";@ Get register operand into r1:\n");
\r
499 EaCalc (1 ,0x0e00, rea,size);
\r
500 EaRead (1, 1, rea,size,1);
\r
502 ot(";@ Do arithmetic:\n");
\r
503 if (eor==0) ot(" cmp r1,r0\n");
\r
506 ot(" eor r1,r0,r1\n");
\r
507 ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
\r
510 OpGetFlags(eor==0,0); // Cmp like subtract
\r
513 if (size>=2) Cycles+=4; // Correct?
\r
514 if (ea==0x3c) Cycles-=4;
\r
516 if (eor) EaWrite(10, 1,ea,size,1);
\r