2 // This file is part of the Cyclone 68000 Emulator
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4 // Copyright (c) 2011 FinalDave (emudave (at) gmail.com)
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6 // This code is licensed under the GNU General Public License version 2.0 and the MAME License.
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7 // You can choose the license that has the most advantages for you.
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9 // SVN repository can be found at http://code.google.com/p/cyclone68000/
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13 static void CheckPc()
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15 ot(";@ Check Memory Base+pc (r4)\n");
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16 ot(" add lr,pc,#4\n");
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18 ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");
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23 // Push 32-bit value in r1 - trashes r0-r3
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26 ot(";@ Push r1 onto stack\n");
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27 ot(" ldr r0,[r7,#0x3c]\n");
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28 ot(" sub r0,r0,#4 ;@ Predecrement A7\n");
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29 ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
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34 // Push SR - trashes r0-r3
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35 void OpPushSr(int high)
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37 ot(";@ Push SR:\n");
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39 ot(" ldr r0,[r7,#0x3c]\n");
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40 ot(" sub r0,r0,#2 ;@ Predecrement A7\n");
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41 ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
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46 // Pop SR - trashes r0-r3
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47 static void PopSr(int high)
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50 ot(" ldr r0,[r7,#0x3c]\n");
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51 ot(" add r1,r0,#2 ;@ Postincrement A7\n");
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52 ot(" str r1,[r7,#0x3c] ;@ Save A7\n");
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58 // Pop PC - assumes r10=Memory Base - trashes r0-r3
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62 ot(" ldr r0,[r7,#0x3c]\n");
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63 ot(" add r1,r0,#4 ;@ Postincrement A7\n");
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64 ot(" str r1,[r7,#0x3c] ;@ Save A7\n");
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66 ot(" add r4,r0,r10 ;@ r4=Memory Base+PC\n");
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76 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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79 ot(" and r0,r8,#0xf ;@ Get trap number\n");
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80 ot(" orr r0,r0,#0x20\n");
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81 ot(" mov r0,r0,asl #2\n");
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82 ot(" str r0,[r7,#0x50] ;@ Save Exception Vector\n");
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83 ot(" bl Exception\n");
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91 // --------------------- Opcodes 0x4e50+ ---------------------
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97 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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102 EaCalc(10, 7, 8, 2);
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103 EaRead(10, 1, 8, 2, 1);
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105 ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");
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106 ot(" sub r0,r0,#4 ;@ A7-=4\n");
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107 ot(" mov r11,r0\n");
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110 ot(";@ Write An to Stack\n");
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113 ot(";@ Save to An\n");
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114 EaWrite(10,11, 8, 2, 1);
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116 ot(";@ Get offset:\n");
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117 EaCalc(0,0,0x3c,1);
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118 EaRead(0,0,0x3c,1);
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120 ot(" add r11,r11,r0 ;@ Add offset to A7\n");
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121 ot(" str r11,[r7,#0x3c]\n");
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129 // --------------------- Opcodes 0x4e58+ ---------------------
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135 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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140 EaCalc(10, 7, 8, 2);
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141 EaRead(10, 0, 8, 2, 1);
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143 ot(" add r11,r0,#4 ;@ A7+=4\n");
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145 ot(";@ Pop An from stack:\n");
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148 ot(" str r11,[r7,#0x3c] ;@ Save A7\n");
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150 ot(";@ An = value from stack:\n");
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151 EaWrite(10, 0, 8, 2, 1);
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158 // --------------------- Opcodes 0x4e70+ ---------------------
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164 // 01001110 01110ttt, reset/nop/stop/rte/rtd/rts/trapv/rtr
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165 if (type==1) { OpStart(op); Cycles=4; OpEnd(); return 0; } // nop
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167 if (type==3 || type==7) // rte/rtr
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169 OpStart(op); Cycles=20;
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171 ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
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173 if (type==3) CheckInterrupt();
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178 if (type==5) // rts
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180 OpStart(op); Cycles=16;
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181 ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
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190 // --------------------- Opcodes 0x4e80+ ---------------------
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191 // Emit a Jsr/Jmp opcode, 01001110 1mEEEeee
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199 // See if we can do this opcode:
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200 if (EaCanRead(sea,-1)==0) return 1;
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203 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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205 OpStart(op); Cycles=14; // Correct?
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207 ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
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209 EaCalc(0,0x003f,sea,0);
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211 ot(";@ Jump - Get new PC from r0\n");
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214 // Jmp - Get new PC from r0
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215 ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");
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220 ot(";@ Jsr - Push old PC first\n");
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221 ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");
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222 ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");
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229 if (Amatch && sea==0x10) Cycles-=2; // (An) Correct?
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238 // --------------------- Opcodes 0x50c8+ ---------------------
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240 // ARM version of 68000 condition codes:
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241 static char *Cond[16]=
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243 "", "", "hi","ls","cc","cs","ne","eq",
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244 "vc","vs","pl","mi","ge","lt","gt","le"
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247 // Emit a Dbra opcode, 0101cccc 11001nnn vv
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253 use=op&~7; // Use same handler
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256 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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257 OpStart(op); Cycles=10;
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259 ot(";@ Decrement Dn.w\n");
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260 ot(" and r1,r8,#0x0007\n");
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261 ot(" mov r1,r1,lsl #2\n");
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262 ot(" ldrsh r0,[r7,r1]\n");
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263 ot(" sub r0,r0,#1\n");
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264 ot(" strh r0,[r7,r1]\n");
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269 ot(";@ Is the condition true?\n");
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270 if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");
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271 ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");
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272 if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000\n");
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273 ot(";@ If so, don't dbra\n");
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274 ot(" b%s DbraEnd%.4x\n",Cond[cc],op);
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278 ot(";@ Check if Dn.w is -1\n");
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279 ot(" cmps r0,#-1\n");
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280 ot(" beq DbraEnd%.4x\n",op);
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283 ot(";@ Get Branch offset:\n");
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284 ot(" ldrsh r0,[r4]\n");
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285 ot(" add r4,r4,r0 ;@ r4 = New PC\n");
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289 ot("DbraEnd%.4x%s\n", op, ms?"":":");
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291 ot(" add r4,r4,#2 ;@ Skip branch offset\n");
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298 // --------------------- Opcodes 0x6000+ ---------------------
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299 // Emit a Branch opcode 0110cccc nn (cccc=condition)
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300 int OpBranch(int op)
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306 offset=(char)(op&0xff);
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309 // Special offsets:
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310 if (offset==0) size=1;
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311 if (offset==-1) size=2;
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313 if (size) use=op; // 16-bit or 32-bit
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314 else use=(op&0xff00)+1; // Use same opcode for all 8-bit branches
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316 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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317 OpStart(op); Cycles=10; // Assume branch taken
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319 ot(";@ Get Branch offset:\n");
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322 EaCalc(0,0,0x3c,size);
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323 EaRead(0,0,0x3c,size);
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324 if (Amatch && size==1) Cycles-=4;
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327 if (size==0) ot(" mov r0,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n");
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331 ot(";@ Is the condition true?\n");
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332 if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");
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333 ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");
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334 if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000\n");
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336 if (size==0) ot(" mov r0,r0,asr #24 ;@ ...shift down\n\n");
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338 ot(" b%s DontBranch%.4x\n",Cond[cc^1],op);
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344 if (size==0) ot(" mov r0,r0,asr #24 ;@ ...shift down\n\n");
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347 ot(";@ Branch taken - Add on r0 to PC\n");
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351 ot(";@ Bsr - remember old PC\n");
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352 ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
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353 ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");
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355 if (size) ot(" sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);
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356 ot(" add r4,r4,r0 ;@ r4 = New PC\n");
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363 if (size) ot(" sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);
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364 ot(" add r4,r4,r0 ;@ r4 = New PC\n");
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368 if (offset==0 || offset==-1)
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370 ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");
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378 ot("DontBranch%.4x%s\n", op, ms?"":":");
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379 Cycles-=2; // Branch not taken
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