2 // This file is part of the Cyclone 68000 Emulator
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4 // Copyright (c) 2004,2011 FinalDave (emudave (at) gmail.com)
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5 // Copyright (c) 2005-2011 GraÅžvydas "notaz" Ignotas (notasas (at) gmail.com)
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7 // This code is licensed under the GNU General Public License version 2.0 and the MAME License.
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8 // You can choose the license that has the most advantages for you.
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10 // SVN repository can be found at http://code.google.com/p/cyclone68000/
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15 int opend_op_changes_cycles, opend_check_interrupt, opend_check_trace;
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17 static unsigned char OpData[16]={0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
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19 static unsigned short OpRead16(unsigned int a)
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21 return (unsigned short)( (OpData[a&15]<<8) | OpData[(a+1)&15] );
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24 // For opcode 'op' use handler 'use'
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25 void OpUse(int op,int use)
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30 if (op!=use) return;
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32 // Disassemble opcode
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38 ot(";@ ---------- [%.4x] %s uses Op%.4x ----------\n",op,text,use);
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41 void OpStart(int op, int sea, int tea, int op_changes_cycles, int supervisor_check)
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43 int last_op_count=arm_op_count;
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46 OpUse(op,op); // This opcode obviously uses this handler
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47 ot("Op%.4x%s\n", op, ms?"":":");
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49 if (supervisor_check)
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51 // checks for supervisor bit, if not set, jumps to SuperEnd()
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52 // also sets r11 to SR high value, SuperChange() uses this
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53 ot(" ldr r11,[r7,#0x44] ;@ Get SR high\n");
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55 if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))
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57 #if MEMHANDLERS_NEED_PREV_PC
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58 ot(" str r4,[r7,#0x50] ;@ Save prev PC + 2\n");
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60 #if MEMHANDLERS_NEED_CYCLES
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61 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
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64 if (supervisor_check)
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66 ot(" tst r11,#0x20 ;@ Check we are in supervisor mode\n");
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67 ot(" beq WrongPrivilegeMode ;@ No\n");
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69 if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c)) {
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70 #if MEMHANDLERS_CHANGE_CYCLES
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71 if (op_changes_cycles)
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75 if (last_op_count!=arm_op_count)
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78 opend_op_changes_cycles = opend_check_interrupt = opend_check_trace = 0;
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81 void OpEnd(int sea, int tea)
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84 opend_check_trace = opend_check_trace && EMULATE_TRACE;
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85 #if MEMHANDLERS_CHANGE_CYCLES
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86 if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))
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88 if (opend_op_changes_cycles)
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90 ot(" ldr r0,[r7,#0x5c] ;@ Load Cycles\n");
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91 ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");
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92 ot(" add r5,r0,r5\n");
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97 ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
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102 ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");
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103 if (opend_check_trace)
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104 ot(" ldr r1,[r7,#0x44]\n");
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105 ot(" subs r5,r5,#%d ;@ Subtract cycles\n",Cycles);
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106 if (opend_check_trace)
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108 ot(";@ CheckTrace:\n");
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109 ot(" tst r1,#0x80\n");
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110 ot(" bne CycloneDoTraceWithChecks\n");
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111 ot(" cmp r5,#0\n");
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113 if (opend_check_interrupt)
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115 ot(" ble CycloneEnd\n");
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116 ot(";@ CheckInterrupt:\n");
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117 if (!opend_check_trace)
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118 ot(" ldr r1,[r7,#0x44]\n");
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119 ot(" movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as ldrb r0,[r7,#0x47]
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120 ot(" ldreq pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");
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121 ot(" cmp r0,#6 ;@ irq>6 ?\n");
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122 ot(" andle r1,r1,#7 ;@ Get interrupt mask\n");
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123 ot(" cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");
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124 ot(" ldrle pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");
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125 ot(" b CycloneDoInterruptGoBack\n");
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129 ot(" ldrgt pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");
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130 ot(" b CycloneEnd\n");
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135 int OpBase(int op,int size,int sepa)
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137 int ea=op&0x3f; // Get Effective Address
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138 if (ea<0x10) return sepa?(op&~0x7):(op&~0xf); // Use 1 handler for d0-d7 and a0-a7
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139 if (size==0&&(ea==0x1f || ea==0x27)) return op; // Specific handler for (a7)+ and -(a7)
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140 if (ea<0x38) return op&~7; // Use 1 handler for (a0)-(a7), etc...
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144 // Get flags, trashes r2
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145 int OpGetFlags(int subtract,int xbit,int specialz)
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147 if (specialz) ot(" orr r2,r10,#0xb0000000 ;@ for old Z\n");
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149 ot(" mrs r10,cpsr ;@ r10=flags\n");
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151 if (specialz) ot(" andeq r10,r10,r2 ;@ fix Z\n");
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153 if (subtract) ot(" eor r10,r10,#0x20000000 ;@ Invert carry\n");
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157 ot(" str r10,[r7,#0x4c] ;@ Save X bit\n");
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162 // -----------------------------------------------------------------
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168 memset(OpData,0x33,sizeof(OpData));
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169 OpData[0]=(unsigned char)(op>>8);
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170 OpData[1]=(unsigned char)op;
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173 if ((op&0xf100)==0x0000) OpArith(op); // +
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174 if ((op&0xc000)==0x0000) OpMove(op); // +
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175 if ((op&0xf5bf)==0x003c) OpArithSr(op); // + Ori/Andi/Eori $nnnn,sr
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176 if ((op&0xf100)==0x0100) OpBtstReg(op); // +
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177 if ((op&0xf138)==0x0108) OpMovep(op); // +
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178 if ((op&0xff00)==0x0800) OpBtstImm(op); // +
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179 if ((op&0xf900)==0x4000) OpNeg(op); // +
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180 if ((op&0xf140)==0x4100) OpChk(op); // +
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181 if ((op&0xf1c0)==0x41c0) OpLea(op); // +
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182 if ((op&0xf9c0)==0x40c0) OpMoveSr(op); // +
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183 if ((op&0xffc0)==0x4800) OpNbcd(op); // +
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184 if ((op&0xfff8)==0x4840) OpSwap(op); // +
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185 if ((op&0xffc0)==0x4840) OpPea(op); // +
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186 if ((op&0xffb8)==0x4880) OpExt(op); // +
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187 if ((op&0xfb80)==0x4880) OpMovem(op); // +
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188 if ((op&0xff00)==0x4a00) OpTst(op); // +
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189 if ((op&0xffc0)==0x4ac0) OpTas(op); // +
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190 if ((op&0xfff0)==0x4e40) OpTrap(op); // +
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191 if ((op&0xfff8)==0x4e50) OpLink(op); // +
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192 if ((op&0xfff8)==0x4e58) OpUnlk(op); // +
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193 if ((op&0xfff0)==0x4e60) OpMoveUsp(op); // +
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194 if ((op&0xfff8)==0x4e70) Op4E70(op); // + Reset/Rts etc
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195 if ((op&0xfffd)==0x4e70) OpStopReset(op);// +
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196 if ((op&0xff80)==0x4e80) OpJsr(op); // +
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197 if ((op&0xf000)==0x5000) OpAddq(op); // +
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198 if ((op&0xf0c0)==0x50c0) OpSet(op); // +
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199 if ((op&0xf0f8)==0x50c8) OpDbra(op); // +
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200 if ((op&0xf000)==0x6000) OpBranch(op); // +
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201 if ((op&0xf100)==0x7000) OpMoveq(op); // +
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202 if ((op&0xa000)==0x8000) OpArithReg(op); // + Or/Sub/And/Add
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203 if ((op&0xb1f0)==0x8100) OpAbcd(op); // +
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204 if ((op&0xb0c0)==0x80c0) OpMul(op); // +
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205 if ((op&0x90c0)==0x90c0) OpAritha(op); // +
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206 if ((op&0xb130)==0x9100) OpAddx(op); // +
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207 if ((op&0xf000)==0xb000) OpCmpEor(op); // +
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208 if ((op&0xf138)==0xb108) OpCmpm(op); // +
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209 if ((op&0xf130)==0xc100) OpExg(op); // +
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210 if ((op&0xf000)==0xe000) OpAsr(op); // + Asr/l/Ror/l etc
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211 if ((op&0xf8c0)==0xe0c0) OpAsrEa(op); // +
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