1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus/PCSX - assem_arm.c *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2021 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
25 #include "../gte_arm.h"
26 #include "../gte_neon.h"
28 #include "arm_features.h"
30 #define unused __attribute__((unused))
33 #pragma GCC diagnostic ignored "-Wunused-function"
34 #pragma GCC diagnostic ignored "-Wunused-variable"
35 #pragma GCC diagnostic ignored "-Wunused-but-set-variable"
38 void indirect_jump_indexed();
51 void jump_vaddr_r10();
52 void jump_vaddr_r12();
54 void * const jump_vaddr_reg[16] = {
73 void invalidate_addr_r0();
74 void invalidate_addr_r1();
75 void invalidate_addr_r2();
76 void invalidate_addr_r3();
77 void invalidate_addr_r4();
78 void invalidate_addr_r5();
79 void invalidate_addr_r6();
80 void invalidate_addr_r7();
81 void invalidate_addr_r8();
82 void invalidate_addr_r9();
83 void invalidate_addr_r10();
84 void invalidate_addr_r12();
86 const u_int invalidate_addr_reg[16] = {
87 (int)invalidate_addr_r0,
88 (int)invalidate_addr_r1,
89 (int)invalidate_addr_r2,
90 (int)invalidate_addr_r3,
91 (int)invalidate_addr_r4,
92 (int)invalidate_addr_r5,
93 (int)invalidate_addr_r6,
94 (int)invalidate_addr_r7,
95 (int)invalidate_addr_r8,
96 (int)invalidate_addr_r9,
97 (int)invalidate_addr_r10,
99 (int)invalidate_addr_r12,
106 static void set_jump_target(void *addr, void *target_)
108 u_int target = (u_int)target_;
110 u_int *ptr2=(u_int *)ptr;
112 assert((target-(u_int)ptr2-8)<1024);
113 assert(((uintptr_t)addr&3)==0);
114 assert((target&3)==0);
115 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
116 //printf("target=%x addr=%p insn=%x\n",target,addr,*ptr2);
118 else if(ptr[3]==0x72) {
119 // generated by emit_jno_unlikely
120 if((target-(u_int)ptr2-8)<1024) {
121 assert(((uintptr_t)addr&3)==0);
122 assert((target&3)==0);
123 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
125 else if((target-(u_int)ptr2-8)<4096&&!((target-(u_int)ptr2-8)&15)) {
126 assert(((uintptr_t)addr&3)==0);
127 assert((target&3)==0);
128 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>4)|0xE00;
130 else *ptr2=(0x7A000000)|(((target-(u_int)ptr2-8)<<6)>>8);
133 assert((ptr[3]&0x0e)==0xa);
134 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
138 // This optionally copies the instruction from the target of the branch into
139 // the space before the branch. Works, but the difference in speed is
140 // usually insignificant.
142 static void set_jump_target_fillslot(int addr,u_int target,int copy)
144 u_char *ptr=(u_char *)addr;
145 u_int *ptr2=(u_int *)ptr;
146 assert(!copy||ptr2[-1]==0xe28dd000);
149 assert((target-(u_int)ptr2-8)<4096);
150 *ptr2=(*ptr2&0xFFFFF000)|(target-(u_int)ptr2-8);
153 assert((ptr[3]&0x0e)==0xa);
154 u_int target_insn=*(u_int *)target;
155 if((target_insn&0x0e100000)==0) { // ALU, no immediate, no flags
158 if((target_insn&0x0c100000)==0x04100000) { // Load
161 if(target_insn&0x08000000) {
165 ptr2[-1]=target_insn;
168 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
174 static void add_literal(int addr,int val)
176 assert(literalcount<sizeof(literals)/sizeof(literals[0]));
177 literals[literalcount][0]=addr;
178 literals[literalcount][1]=val;
182 // from a pointer to external jump stub (which was produced by emit_extjump2)
183 // find where the jumping insn is
184 static void *find_extjump_insn(void *stub)
186 int *ptr=(int *)(stub+4);
187 assert((*ptr&0x0fff0000)==0x059f0000); // ldr rx, [pc, #ofs]
188 u_int offset=*ptr&0xfff;
189 void **l_ptr=(void *)ptr+offset+8;
193 // find where external branch is liked to using addr of it's stub:
194 // get address that insn one after stub loads (dyna_linker arg1),
195 // treat it as a pointer to branch insn,
196 // return addr where that branch jumps to
198 static void *get_pointer(void *stub)
200 //printf("get_pointer(%x)\n",(int)stub);
201 int *i_ptr=find_extjump_insn(stub);
202 assert((*i_ptr&0x0f000000)==0x0a000000); // b
203 return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
207 // Allocate a specific ARM register.
208 static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
213 // see if it's already allocated (and dealloc it)
214 for(n=0;n<HOST_REGS;n++)
216 if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {
217 dirty=(cur->dirty>>n)&1;
223 cur->dirty&=~(1<<hr);
224 cur->dirty|=dirty<<hr;
225 cur->isconst&=~(1<<hr);
228 // Alloc cycle count into dedicated register
229 static void alloc_cc(struct regstat *cur,int i)
231 alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
236 static unused char regname[16][4] = {
254 static void output_w32(u_int word)
256 *((u_int *)out)=word;
260 static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
265 return((rn<<16)|(rd<<12)|rm);
268 static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
273 assert((shift&1)==0);
274 return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
277 static u_int genimm(u_int imm,u_int *encoded)
285 *encoded=((i&30)<<7)|imm;
288 imm=(imm>>2)|(imm<<30);i-=2;
293 static void genimm_checked(u_int imm,u_int *encoded)
295 u_int ret=genimm(imm,encoded);
300 static u_int genjmp(u_int addr)
302 if (addr < 3) return 0; // a branch that will be patched later
303 int offset = addr-(int)out-8;
304 if (offset < -33554432 || offset >= 33554432) {
305 SysPrintf("genjmp: out of range: %08x\n", offset);
309 return ((u_int)offset>>2)&0xffffff;
312 static unused void emit_breakpoint(void)
314 assem_debug("bkpt #0\n");
315 //output_w32(0xe1200070);
316 output_w32(0xe7f001f0);
319 static void emit_mov(int rs,int rt)
321 assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
322 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
325 static void emit_movs(int rs,int rt)
327 assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
328 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
331 static void emit_add(int rs1,int rs2,int rt)
333 assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
334 output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
337 static void emit_adds(int rs1,int rs2,int rt)
339 assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
340 output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
342 #define emit_adds_ptr emit_adds
344 static void emit_adcs(int rs1,int rs2,int rt)
346 assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
347 output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
350 static void emit_neg(int rs, int rt)
352 assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
353 output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
356 static void emit_sub(int rs1,int rs2,int rt)
358 assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
359 output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
362 static void emit_zeroreg(int rt)
364 assem_debug("mov %s,#0\n",regname[rt]);
365 output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
368 static void emit_loadlp(u_int imm,u_int rt)
370 add_literal((int)out,imm);
371 assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
372 output_w32(0xe5900000|rd_rn_rm(rt,15,0));
376 static void emit_movw(u_int imm,u_int rt)
379 assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
380 output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
383 static void emit_movt(u_int imm,u_int rt)
385 assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
386 output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
390 static void emit_movimm(u_int imm,u_int rt)
393 if(genimm(imm,&armval)) {
394 assem_debug("mov %s,#%d\n",regname[rt],imm);
395 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
396 }else if(genimm(~imm,&armval)) {
397 assem_debug("mvn %s,#%d\n",regname[rt],imm);
398 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
399 }else if(imm<65536) {
401 assem_debug("mov %s,#%d\n",regname[rt],imm&0xFF00);
402 output_w32(0xe3a00000|rd_rn_imm_shift(rt,0,imm>>8,8));
403 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
404 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
412 emit_movw(imm&0x0000FFFF,rt);
413 emit_movt(imm&0xFFFF0000,rt);
418 static void emit_pcreladdr(u_int rt)
420 assem_debug("add %s,pc,#?\n",regname[rt]);
421 output_w32(0xe2800000|rd_rn_rm(rt,15,0));
424 static void emit_loadreg(int r, int hr)
426 assert(hr != EXCLUDE_REG);
432 //case HIREG: addr = &hi; break;
433 //case LOREG: addr = &lo; break;
434 case CCREG: addr = &cycle_count; break;
435 case CSREG: addr = &Status; break;
436 case INVCP: addr = &invc_ptr; break;
437 case ROREG: addr = &ram_offset; break;
440 addr = &psxRegs.GPR.r[r];
443 u_int offset = (u_char *)addr - (u_char *)&dynarec_local;
445 assem_debug("ldr %s,fp+%d # r%d\n",regname[hr],offset,r);
446 output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
450 static void emit_storereg(int r, int hr)
452 assert(hr != EXCLUDE_REG);
453 int addr = (int)&psxRegs.GPR.r[r];
455 //case HIREG: addr = &hi; break;
456 //case LOREG: addr = &lo; break;
457 case CCREG: addr = (int)&cycle_count; break;
458 default: assert(r < 34); break;
460 u_int offset = addr-(u_int)&dynarec_local;
462 assem_debug("str %s,fp+%d # r%d\n",regname[hr],offset,r);
463 output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
466 static void emit_test(int rs, int rt)
468 assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
469 output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
472 static void emit_testimm(int rs,int imm)
475 assem_debug("tst %s,#%d\n",regname[rs],imm);
476 genimm_checked(imm,&armval);
477 output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
480 static void emit_testeqimm(int rs,int imm)
483 assem_debug("tsteq %s,$%d\n",regname[rs],imm);
484 genimm_checked(imm,&armval);
485 output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
488 static void emit_not(int rs,int rt)
490 assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
491 output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
494 static void emit_and(u_int rs1,u_int rs2,u_int rt)
496 assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
497 output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
500 static void emit_or(u_int rs1,u_int rs2,u_int rt)
502 assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
503 output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
506 static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
511 assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs],imm);
512 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
515 static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
520 assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm);
521 output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
524 static void emit_xor(u_int rs1,u_int rs2,u_int rt)
526 assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
527 output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
530 static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt)
532 assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm);
533 output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7));
536 static void emit_addimm(u_int rs,int imm,u_int rt)
542 if(genimm(imm,&armval)) {
543 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
544 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
545 }else if(genimm(-imm,&armval)) {
546 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
547 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
549 }else if(rt!=rs&&(u_int)imm<65536) {
550 emit_movw(imm&0x0000ffff,rt);
552 }else if(rt!=rs&&(u_int)-imm<65536) {
553 emit_movw(-imm&0x0000ffff,rt);
556 }else if((u_int)-imm<65536) {
557 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
558 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
559 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
560 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
563 int shift = (ffs(imm) - 1) & ~1;
564 int imm8 = imm & (0xff << shift);
565 genimm_checked(imm8,&armval);
566 assem_debug("add %s,%s,#0x%x\n",regname[rt],regname[rs],imm8);
567 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
574 else if(rs!=rt) emit_mov(rs,rt);
577 static void emit_addimm_and_set_flags(int imm,int rt)
579 assert(imm>-65536&&imm<65536);
581 if(genimm(imm,&armval)) {
582 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm);
583 output_w32(0xe2900000|rd_rn_rm(rt,rt,0)|armval);
584 }else if(genimm(-imm,&armval)) {
585 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],imm);
586 output_w32(0xe2500000|rd_rn_rm(rt,rt,0)|armval);
588 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF00);
589 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
590 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)>>8,8));
591 output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
593 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF00);
594 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
595 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm>>8,8));
596 output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
600 static void emit_addnop(u_int r)
603 assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
604 output_w32(0xe2800000|rd_rn_rm(r,r,0));
607 static void emit_andimm(int rs,int imm,int rt)
612 }else if(genimm(imm,&armval)) {
613 assem_debug("and %s,%s,#%d\n",regname[rt],regname[rs],imm);
614 output_w32(0xe2000000|rd_rn_rm(rt,rs,0)|armval);
615 }else if(genimm(~imm,&armval)) {
616 assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm);
617 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval);
618 }else if(imm==65535) {
620 assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]);
621 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF);
622 assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]);
623 output_w32(0xe3c00000|rd_rn_rm(rt,rt,0)|0x8FF);
625 assem_debug("uxth %s,%s\n",regname[rt],regname[rs]);
626 output_w32(0xe6ff0070|rd_rn_rm(rt,0,rs));
629 assert(imm>0&&imm<65535);
631 assem_debug("mov r14,#%d\n",imm&0xFF00);
632 output_w32(0xe3a00000|rd_rn_imm_shift(HOST_TEMPREG,0,imm>>8,8));
633 assem_debug("add r14,r14,#%d\n",imm&0xFF);
634 output_w32(0xe2800000|rd_rn_imm_shift(HOST_TEMPREG,HOST_TEMPREG,imm&0xff,0));
636 emit_movw(imm,HOST_TEMPREG);
638 assem_debug("and %s,%s,r14\n",regname[rt],regname[rs]);
639 output_w32(0xe0000000|rd_rn_rm(rt,rs,HOST_TEMPREG));
643 static void emit_orimm(int rs,int imm,int rt)
647 if(rs!=rt) emit_mov(rs,rt);
648 }else if(genimm(imm,&armval)) {
649 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm);
650 output_w32(0xe3800000|rd_rn_rm(rt,rs,0)|armval);
652 assert(imm>0&&imm<65536);
653 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
654 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
655 output_w32(0xe3800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
656 output_w32(0xe3800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
660 static void emit_xorimm(int rs,int imm,int rt)
664 if(rs!=rt) emit_mov(rs,rt);
665 }else if(genimm(imm,&armval)) {
666 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm);
667 output_w32(0xe2200000|rd_rn_rm(rt,rs,0)|armval);
669 assert(imm>0&&imm<65536);
670 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
671 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
672 output_w32(0xe2200000|rd_rn_imm_shift(rt,rs,imm>>8,8));
673 output_w32(0xe2200000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
677 static void emit_shlimm(int rs,u_int imm,int rt)
682 assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
683 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
686 static void emit_lsls_imm(int rs,int imm,int rt)
690 assem_debug("lsls %s,%s,#%d\n",regname[rt],regname[rs],imm);
691 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
694 static unused void emit_lslpls_imm(int rs,int imm,int rt)
698 assem_debug("lslpls %s,%s,#%d\n",regname[rt],regname[rs],imm);
699 output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
702 static void emit_shrimm(int rs,u_int imm,int rt)
706 assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
707 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
710 static void emit_sarimm(int rs,u_int imm,int rt)
714 assem_debug("asr %s,%s,#%d\n",regname[rt],regname[rs],imm);
715 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
718 static void emit_rorimm(int rs,u_int imm,int rt)
722 assem_debug("ror %s,%s,#%d\n",regname[rt],regname[rs],imm);
723 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
726 static void emit_signextend16(int rs,int rt)
729 emit_shlimm(rs,16,rt);
730 emit_sarimm(rt,16,rt);
732 assem_debug("sxth %s,%s\n",regname[rt],regname[rs]);
733 output_w32(0xe6bf0070|rd_rn_rm(rt,0,rs));
737 static void emit_signextend8(int rs,int rt)
740 emit_shlimm(rs,24,rt);
741 emit_sarimm(rt,24,rt);
743 assem_debug("sxtb %s,%s\n",regname[rt],regname[rs]);
744 output_w32(0xe6af0070|rd_rn_rm(rt,0,rs));
748 static void emit_shl(u_int rs,u_int shift,u_int rt)
754 assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
755 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
758 static void emit_shr(u_int rs,u_int shift,u_int rt)
763 assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
764 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
767 static void emit_sar(u_int rs,u_int shift,u_int rt)
772 assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
773 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
776 static unused void emit_orrshl(u_int rs,u_int shift,u_int rt)
781 assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
782 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
785 static unused void emit_orrshr(u_int rs,u_int shift,u_int rt)
790 assem_debug("orr %s,%s,%s,lsr %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
791 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
794 static void emit_cmpimm(int rs,int imm)
797 if(genimm(imm,&armval)) {
798 assem_debug("cmp %s,#%d\n",regname[rs],imm);
799 output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval);
800 }else if(genimm(-imm,&armval)) {
801 assem_debug("cmn %s,#%d\n",regname[rs],imm);
802 output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
805 emit_movimm(imm,HOST_TEMPREG);
806 assem_debug("cmp %s,r14\n",regname[rs]);
807 output_w32(0xe1500000|rd_rn_rm(0,rs,HOST_TEMPREG));
810 emit_movimm(-imm,HOST_TEMPREG);
811 assem_debug("cmn %s,r14\n",regname[rs]);
812 output_w32(0xe1700000|rd_rn_rm(0,rs,HOST_TEMPREG));
816 static void emit_cmovne_imm(int imm,int rt)
818 assem_debug("movne %s,#%d\n",regname[rt],imm);
820 genimm_checked(imm,&armval);
821 output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
824 static void emit_cmovl_imm(int imm,int rt)
826 assem_debug("movlt %s,#%d\n",regname[rt],imm);
828 genimm_checked(imm,&armval);
829 output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
832 static void emit_cmovb_imm(int imm,int rt)
834 assem_debug("movcc %s,#%d\n",regname[rt],imm);
836 genimm_checked(imm,&armval);
837 output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
840 static void emit_cmovae_imm(int imm,int rt)
842 assem_debug("movcs %s,#%d\n",regname[rt],imm);
844 genimm_checked(imm,&armval);
845 output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
848 static void emit_cmovs_imm(int imm,int rt)
850 assem_debug("movmi %s,#%d\n",regname[rt],imm);
852 genimm_checked(imm,&armval);
853 output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
856 static void emit_cmovne_reg(int rs,int rt)
858 assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
859 output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
862 static void emit_cmovl_reg(int rs,int rt)
864 assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
865 output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
868 static void emit_cmovb_reg(int rs,int rt)
870 assem_debug("movcc %s,%s\n",regname[rt],regname[rs]);
871 output_w32(0x31a00000|rd_rn_rm(rt,0,rs));
874 static void emit_cmovs_reg(int rs,int rt)
876 assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
877 output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
880 static void emit_slti32(int rs,int imm,int rt)
882 if(rs!=rt) emit_zeroreg(rt);
884 if(rs==rt) emit_movimm(0,rt);
885 emit_cmovl_imm(1,rt);
888 static void emit_sltiu32(int rs,int imm,int rt)
890 if(rs!=rt) emit_zeroreg(rt);
892 if(rs==rt) emit_movimm(0,rt);
893 emit_cmovb_imm(1,rt);
896 static void emit_cmp(int rs,int rt)
898 assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
899 output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
902 static void emit_set_gz32(int rs, int rt)
904 //assem_debug("set_gz32\n");
907 emit_cmovl_imm(0,rt);
910 static void emit_set_nz32(int rs, int rt)
912 //assem_debug("set_nz32\n");
913 if(rs!=rt) emit_movs(rs,rt);
914 else emit_test(rs,rs);
915 emit_cmovne_imm(1,rt);
918 static void emit_set_if_less32(int rs1, int rs2, int rt)
920 //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
921 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
923 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
924 emit_cmovl_imm(1,rt);
927 static void emit_set_if_carry32(int rs1, int rs2, int rt)
929 //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
930 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
932 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
933 emit_cmovb_imm(1,rt);
936 static int can_jump_or_call(const void *a)
938 intptr_t offset = (u_char *)a - out - 8;
939 return (-33554432 <= offset && offset < 33554432);
942 static void emit_call(const void *a_)
945 assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
946 u_int offset=genjmp(a);
947 output_w32(0xeb000000|offset);
950 static void emit_jmp(const void *a_)
953 assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
954 u_int offset=genjmp(a);
955 output_w32(0xea000000|offset);
958 static void emit_jne(const void *a_)
961 assem_debug("bne %x\n",a);
962 u_int offset=genjmp(a);
963 output_w32(0x1a000000|offset);
966 static void emit_jeq(const void *a_)
969 assem_debug("beq %x\n",a);
970 u_int offset=genjmp(a);
971 output_w32(0x0a000000|offset);
974 static void emit_js(const void *a_)
977 assem_debug("bmi %x\n",a);
978 u_int offset=genjmp(a);
979 output_w32(0x4a000000|offset);
982 static void emit_jns(const void *a_)
985 assem_debug("bpl %x\n",a);
986 u_int offset=genjmp(a);
987 output_w32(0x5a000000|offset);
990 static void emit_jl(const void *a_)
993 assem_debug("blt %x\n",a);
994 u_int offset=genjmp(a);
995 output_w32(0xba000000|offset);
998 static void emit_jge(const void *a_)
1001 assem_debug("bge %x\n",a);
1002 u_int offset=genjmp(a);
1003 output_w32(0xaa000000|offset);
1006 static void emit_jno(const void *a_)
1009 assem_debug("bvc %x\n",a);
1010 u_int offset=genjmp(a);
1011 output_w32(0x7a000000|offset);
1014 static void emit_jc(const void *a_)
1017 assem_debug("bcs %x\n",a);
1018 u_int offset=genjmp(a);
1019 output_w32(0x2a000000|offset);
1022 static void emit_jcc(const void *a_)
1025 assem_debug("bcc %x\n",a);
1026 u_int offset=genjmp(a);
1027 output_w32(0x3a000000|offset);
1030 static unused void emit_callreg(u_int r)
1033 assem_debug("blx %s\n",regname[r]);
1034 output_w32(0xe12fff30|r);
1037 static void emit_jmpreg(u_int r)
1039 assem_debug("mov pc,%s\n",regname[r]);
1040 output_w32(0xe1a00000|rd_rn_rm(15,0,r));
1043 static void emit_ret(void)
1048 static void emit_readword_indexed(int offset, int rs, int rt)
1050 assert(offset>-4096&&offset<4096);
1051 assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
1053 output_w32(0xe5900000|rd_rn_rm(rt,rs,0)|offset);
1055 output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
1059 static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
1061 assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
1062 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
1064 #define emit_readptr_dualindexedx_ptrlen emit_readword_dualindexedx4
1066 static void emit_ldr_dualindexed(int rs1, int rs2, int rt)
1068 assem_debug("ldr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1069 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2));
1072 static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
1074 assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1075 output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
1078 static void emit_ldrb_dualindexed(int rs1, int rs2, int rt)
1080 assem_debug("ldrb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1081 output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2));
1084 static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
1086 assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1087 output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
1090 static void emit_ldrsb_dualindexed(int rs1, int rs2, int rt)
1092 assem_debug("ldrsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1093 output_w32(0xe19000d0|rd_rn_rm(rt,rs1,rs2));
1096 static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
1098 assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1099 output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
1102 static void emit_ldrh_dualindexed(int rs1, int rs2, int rt)
1104 assem_debug("ldrh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1105 output_w32(0xe19000b0|rd_rn_rm(rt,rs1,rs2));
1108 static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
1110 assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1111 output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
1114 static void emit_ldrsh_dualindexed(int rs1, int rs2, int rt)
1116 assem_debug("ldrsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1117 output_w32(0xe19000f0|rd_rn_rm(rt,rs1,rs2));
1120 static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
1122 assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1123 output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
1126 static void emit_str_dualindexed(int rs1, int rs2, int rt)
1128 assem_debug("str %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1129 output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2));
1132 static void emit_strb_dualindexed(int rs1, int rs2, int rt)
1134 assem_debug("strb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1135 output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2));
1138 static void emit_strh_dualindexed(int rs1, int rs2, int rt)
1140 assem_debug("strh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1141 output_w32(0xe18000b0|rd_rn_rm(rt,rs1,rs2));
1144 static void emit_movsbl_indexed(int offset, int rs, int rt)
1146 assert(offset>-256&&offset<256);
1147 assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
1149 output_w32(0xe1d000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1151 output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1155 static void emit_movswl_indexed(int offset, int rs, int rt)
1157 assert(offset>-256&&offset<256);
1158 assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
1160 output_w32(0xe1d000f0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1162 output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1166 static void emit_movzbl_indexed(int offset, int rs, int rt)
1168 assert(offset>-4096&&offset<4096);
1169 assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
1171 output_w32(0xe5d00000|rd_rn_rm(rt,rs,0)|offset);
1173 output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
1177 static void emit_movzwl_indexed(int offset, int rs, int rt)
1179 assert(offset>-256&&offset<256);
1180 assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
1182 output_w32(0xe1d000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1184 output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1188 static void emit_ldrd(int offset, int rs, int rt)
1190 assert(offset>-256&&offset<256);
1191 assem_debug("ldrd %s,%s+%d\n",regname[rt],regname[rs],offset);
1193 output_w32(0xe1c000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1195 output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1199 static void emit_readword(void *addr, int rt)
1201 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1202 assert(offset<4096);
1203 assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
1204 output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
1206 #define emit_readptr emit_readword
1208 static void emit_writeword_indexed(int rt, int offset, int rs)
1210 assert(offset>-4096&&offset<4096);
1211 assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
1213 output_w32(0xe5800000|rd_rn_rm(rt,rs,0)|offset);
1215 output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
1219 static void emit_writehword_indexed(int rt, int offset, int rs)
1221 assert(offset>-256&&offset<256);
1222 assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
1224 output_w32(0xe1c000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1226 output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1230 static void emit_writebyte_indexed(int rt, int offset, int rs)
1232 assert(offset>-4096&&offset<4096);
1233 assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
1235 output_w32(0xe5c00000|rd_rn_rm(rt,rs,0)|offset);
1237 output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
1241 static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
1243 assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1244 output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
1247 static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
1249 assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1250 output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
1253 static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
1255 assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1256 output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
1259 static void emit_writeword(int rt, void *addr)
1261 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1262 assert(offset<4096);
1263 assem_debug("str %s,fp+%d\n",regname[rt],offset);
1264 output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
1267 static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1269 assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1274 output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1277 static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1279 assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1284 output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1287 static void emit_clz(int rs,int rt)
1289 assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
1290 output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
1293 static void emit_subcs(int rs1,int rs2,int rt)
1295 assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1296 output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
1299 static void emit_shrcc_imm(int rs,u_int imm,int rt)
1303 assem_debug("lsrcc %s,%s,#%d\n",regname[rt],regname[rs],imm);
1304 output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1307 static void emit_shrne_imm(int rs,u_int imm,int rt)
1311 assem_debug("lsrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1312 output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1315 static void emit_negmi(int rs, int rt)
1317 assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
1318 output_w32(0x42600000|rd_rn_rm(rt,rs,0));
1321 static void emit_negsmi(int rs, int rt)
1323 assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
1324 output_w32(0x42700000|rd_rn_rm(rt,rs,0));
1327 static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
1329 assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1330 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
1333 static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
1335 assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1336 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
1339 static void emit_teq(int rs, int rt)
1341 assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
1342 output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
1345 static unused void emit_rsbimm(int rs, int imm, int rt)
1348 genimm_checked(imm,&armval);
1349 assem_debug("rsb %s,%s,#%d\n",regname[rt],regname[rs],imm);
1350 output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
1353 // Conditionally select one of two immediates, optimizing for small code size
1354 // This will only be called if HAVE_CMOV_IMM is defined
1355 static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
1358 if(genimm(imm2-imm1,&armval)) {
1359 emit_movimm(imm1,rt);
1360 assem_debug("addne %s,%s,#%d\n",regname[rt],regname[rt],imm2-imm1);
1361 output_w32(0x12800000|rd_rn_rm(rt,rt,0)|armval);
1362 }else if(genimm(imm1-imm2,&armval)) {
1363 emit_movimm(imm1,rt);
1364 assem_debug("subne %s,%s,#%d\n",regname[rt],regname[rt],imm1-imm2);
1365 output_w32(0x12400000|rd_rn_rm(rt,rt,0)|armval);
1369 emit_movimm(imm1,rt);
1370 add_literal((int)out,imm2);
1371 assem_debug("ldrne %s,pc+? [=%x]\n",regname[rt],imm2);
1372 output_w32(0x15900000|rd_rn_rm(rt,15,0));
1374 emit_movw(imm1&0x0000FFFF,rt);
1375 if((imm1&0xFFFF)!=(imm2&0xFFFF)) {
1376 assem_debug("movwne %s,#%d (0x%x)\n",regname[rt],imm2&0xFFFF,imm2&0xFFFF);
1377 output_w32(0x13000000|rd_rn_rm(rt,0,0)|(imm2&0xfff)|((imm2<<4)&0xf0000));
1379 emit_movt(imm1&0xFFFF0000,rt);
1380 if((imm1&0xFFFF0000)!=(imm2&0xFFFF0000)) {
1381 assem_debug("movtne %s,#%d (0x%x)\n",regname[rt],imm2&0xffff0000,imm2&0xffff0000);
1382 output_w32(0x13400000|rd_rn_rm(rt,0,0)|((imm2>>16)&0xfff)|((imm2>>12)&0xf0000));
1388 // special case for checking invalid_code
1389 static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
1391 assert(imm<128&&imm>=0);
1393 assem_debug("ldrb lr,%s,%s lsr #12\n",regname[base],regname[r]);
1394 output_w32(0xe7d00000|rd_rn_rm(HOST_TEMPREG,base,r)|0x620);
1395 emit_cmpimm(HOST_TEMPREG,imm);
1398 static void emit_callne(int a)
1400 assem_debug("blne %x\n",a);
1401 u_int offset=genjmp(a);
1402 output_w32(0x1b000000|offset);
1405 // Used to preload hash table entries
1406 static unused void emit_prefetchreg(int r)
1408 assem_debug("pld %s\n",regname[r]);
1409 output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
1412 // Special case for mini_ht
1413 static void emit_ldreq_indexed(int rs, u_int offset, int rt)
1415 assert(offset<4096);
1416 assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
1417 output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
1420 static void emit_orrne_imm(int rs,int imm,int rt)
1423 genimm_checked(imm,&armval);
1424 assem_debug("orrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1425 output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
1428 static unused void emit_addpl_imm(int rs,int imm,int rt)
1431 genimm_checked(imm,&armval);
1432 assem_debug("addpl %s,%s,#%d\n",regname[rt],regname[rs],imm);
1433 output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
1436 static void emit_jno_unlikely(int a)
1439 assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
1440 output_w32(0x72800000|rd_rn_rm(15,15,0));
1443 static void save_regs_all(u_int reglist)
1446 if(!reglist) return;
1447 assem_debug("stmia fp,{");
1450 assem_debug("r%d,",i);
1452 output_w32(0xe88b0000|reglist);
1455 static void restore_regs_all(u_int reglist)
1458 if(!reglist) return;
1459 assem_debug("ldmia fp,{");
1462 assem_debug("r%d,",i);
1464 output_w32(0xe89b0000|reglist);
1467 // Save registers before function call
1468 static void save_regs(u_int reglist)
1470 reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
1471 save_regs_all(reglist);
1474 // Restore registers after function call
1475 static void restore_regs(u_int reglist)
1477 reglist&=CALLER_SAVE_REGS;
1478 restore_regs_all(reglist);
1481 /* Stubs/epilogue */
1483 static void literal_pool(int n)
1485 if(!literalcount) return;
1487 if((int)out-literals[0][0]<4096-n) return;
1491 for(i=0;i<literalcount;i++)
1493 u_int l_addr=(u_int)out;
1496 if(literals[j][1]==literals[i][1]) {
1497 //printf("dup %08x\n",literals[i][1]);
1498 l_addr=literals[j][0];
1502 ptr=(u_int *)literals[i][0];
1503 u_int offset=l_addr-(u_int)ptr-8;
1504 assert(offset<4096);
1505 assert(!(offset&3));
1507 if(l_addr==(u_int)out) {
1508 literals[i][0]=l_addr; // remember for dupes
1509 output_w32(literals[i][1]);
1515 static void literal_pool_jumpover(int n)
1517 if(!literalcount) return;
1519 if((int)out-literals[0][0]<4096-n) return;
1524 set_jump_target(jaddr, out);
1527 // parsed by get_pointer, find_extjump_insn
1528 static void emit_extjump(u_char *addr, u_int target)
1530 u_char *ptr=(u_char *)addr;
1531 assert((ptr[3]&0x0e)==0xa);
1534 emit_loadlp(target,0);
1535 emit_loadlp((u_int)addr,1);
1536 assert(ndrc->translation_cache <= addr &&
1537 addr < ndrc->translation_cache + sizeof(ndrc->translation_cache));
1538 emit_far_jump(dyna_linker);
1541 static void check_extjump2(void *src)
1544 assert((ptr[1] & 0x0fff0000) == 0x059f0000); // ldr rx, [pc, #ofs]
1548 // put rt_val into rt, potentially making use of rs with value rs_val
1549 static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
1553 if(genimm(rt_val,&armval)) {
1554 assem_debug("mov %s,#%d\n",regname[rt],rt_val);
1555 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
1558 if(genimm(~rt_val,&armval)) {
1559 assem_debug("mvn %s,#%d\n",regname[rt],rt_val);
1560 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
1564 if(genimm(diff,&armval)) {
1565 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],diff);
1566 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
1568 }else if(genimm(-diff,&armval)) {
1569 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-diff);
1570 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
1573 emit_movimm(rt_val,rt);
1576 // return 1 if above function can do it's job cheaply
1577 static int is_similar_value(u_int v1,u_int v2)
1581 if(v1==v2) return 1;
1583 for(xs=diff;xs!=0&&(xs&3)==0;xs>>=2)
1585 if(xs<0x100) return 1;
1586 for(xs=-diff;xs!=0&&(xs&3)==0;xs>>=2)
1588 if(xs<0x100) return 1;
1592 static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
1595 case LOADB_STUB: emit_signextend8(rs,rt); break;
1596 case LOADBU_STUB: emit_andimm(rs,0xff,rt); break;
1597 case LOADH_STUB: emit_signextend16(rs,rt); break;
1598 case LOADHU_STUB: emit_andimm(rs,0xffff,rt); break;
1599 case LOADW_STUB: if(rs!=rt) emit_mov(rs,rt); break;
1604 #include "pcsxmem.h"
1605 #include "pcsxmem_inline.c"
1607 static void do_readstub(int n)
1609 assem_debug("do_readstub %x\n",start+stubs[n].a*4);
1611 set_jump_target(stubs[n].addr, out);
1612 enum stub_type type=stubs[n].type;
1615 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1616 u_int reglist=stubs[n].e;
1617 const signed char *i_regmap=i_regs->regmap;
1619 if(dops[i].itype==C1LS||dops[i].itype==C2LS||dops[i].itype==LOADLR) {
1620 rt=get_reg(i_regmap,FTEMP);
1622 rt=get_reg(i_regmap,dops[i].rt1);
1625 int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1626 void *restore_jump = NULL;
1628 for(r=0;r<=12;r++) {
1629 if(((1<<r)&0x13ff)&&((1<<r)®list)==0) {
1633 if(rt>=0&&dops[i].rt1!=0)
1640 if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
1642 emit_readword(&mem_rtab,temp);
1643 emit_shrimm(rs,12,temp2);
1644 emit_readword_dualindexedx4(temp,temp2,temp2);
1645 emit_lsls_imm(temp2,1,temp2);
1646 if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1648 case LOADB_STUB: emit_ldrccsb_dualindexed(temp2,rs,rt); break;
1649 case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
1650 case LOADH_STUB: emit_ldrccsh_dualindexed(temp2,rs,rt); break;
1651 case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
1652 case LOADW_STUB: emit_ldrcc_dualindexed(temp2,rs,rt); break;
1658 emit_jcc(0); // jump to reg restore
1661 emit_jcc(stubs[n].retaddr); // return address
1666 if(type==LOADB_STUB||type==LOADBU_STUB)
1667 handler=jump_handler_read8;
1668 if(type==LOADH_STUB||type==LOADHU_STUB)
1669 handler=jump_handler_read16;
1670 if(type==LOADW_STUB)
1671 handler=jump_handler_read32;
1673 pass_args(rs,temp2);
1674 int cc=get_reg(i_regmap,CCREG);
1676 emit_loadreg(CCREG,2);
1677 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1678 emit_far_call(handler);
1679 if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1680 mov_loadtype_adj(type,0,rt);
1683 set_jump_target(restore_jump, out);
1684 restore_regs(reglist);
1685 emit_jmp(stubs[n].retaddr); // return address
1688 static void inline_readstub(enum stub_type type, int i, u_int addr,
1689 const signed char regmap[], int target, int adj, u_int reglist)
1691 int rs=get_reg(regmap,target);
1692 int rt=get_reg(regmap,target);
1693 if(rs<0) rs=get_reg_temp(regmap);
1696 uintptr_t host_addr = 0;
1698 int cc=get_reg(regmap,CCREG);
1699 if(pcsx_direct_read(type,addr,adj,cc,target?rs:-1,rt))
1701 handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
1702 if (handler == NULL) {
1703 if(rt<0||dops[i].rt1==0)
1706 emit_movimm_from(addr,rs,host_addr,rs);
1708 case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
1709 case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
1710 case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
1711 case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
1712 case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
1717 is_dynamic=pcsxmem_is_handler_dynamic(addr);
1719 if(type==LOADB_STUB||type==LOADBU_STUB)
1720 handler=jump_handler_read8;
1721 if(type==LOADH_STUB||type==LOADHU_STUB)
1722 handler=jump_handler_read16;
1723 if(type==LOADW_STUB)
1724 handler=jump_handler_read32;
1727 // call a memhandler
1728 if(rt>=0&&dops[i].rt1!=0)
1732 emit_movimm(addr,0);
1736 emit_loadreg(CCREG,2);
1738 emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
1739 emit_addimm(cc<0?2:cc,adj,2);
1742 emit_readword(&last_count,3);
1743 emit_addimm(cc<0?2:cc,adj,2);
1745 emit_writeword(2,&Count);
1748 emit_far_call(handler);
1750 if(rt>=0&&dops[i].rt1!=0) {
1752 case LOADB_STUB: emit_signextend8(0,rt); break;
1753 case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
1754 case LOADH_STUB: emit_signextend16(0,rt); break;
1755 case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
1756 case LOADW_STUB: if(rt!=0) emit_mov(0,rt); break;
1760 restore_regs(reglist);
1763 static void do_writestub(int n)
1765 assem_debug("do_writestub %x\n",start+stubs[n].a*4);
1767 set_jump_target(stubs[n].addr, out);
1768 enum stub_type type=stubs[n].type;
1771 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1772 u_int reglist=stubs[n].e;
1773 const signed char *i_regmap=i_regs->regmap;
1775 if(dops[i].itype==C1LS||dops[i].itype==C2LS) {
1776 rt=get_reg(i_regmap,r=FTEMP);
1778 rt=get_reg(i_regmap,r=dops[i].rs2);
1782 int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1783 void *restore_jump = NULL;
1784 int reglist2=reglist|(1<<rs)|(1<<rt);
1785 for(rtmp=0;rtmp<=12;rtmp++) {
1786 if(((1<<rtmp)&0x13ff)&&((1<<rtmp)®list2)==0) {
1793 for(rtmp=0;rtmp<=3;rtmp++)
1794 if(rtmp!=rs&&rtmp!=rt)
1797 if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
1799 emit_readword(&mem_wtab,temp);
1800 emit_shrimm(rs,12,temp2);
1801 emit_readword_dualindexedx4(temp,temp2,temp2);
1802 emit_lsls_imm(temp2,1,temp2);
1804 case STOREB_STUB: emit_strccb_dualindexed(temp2,rs,rt); break;
1805 case STOREH_STUB: emit_strcch_dualindexed(temp2,rs,rt); break;
1806 case STOREW_STUB: emit_strcc_dualindexed(temp2,rs,rt); break;
1811 emit_jcc(0); // jump to reg restore
1814 emit_jcc(stubs[n].retaddr); // return address (invcode check)
1820 case STOREB_STUB: handler=jump_handler_write8; break;
1821 case STOREH_STUB: handler=jump_handler_write16; break;
1822 case STOREW_STUB: handler=jump_handler_write32; break;
1829 int cc=get_reg(i_regmap,CCREG);
1831 emit_loadreg(CCREG,2);
1832 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1833 // returns new cycle_count
1834 emit_far_call(handler);
1835 emit_addimm(0,-(int)stubs[n].d,cc<0?2:cc);
1837 emit_storereg(CCREG,2);
1839 set_jump_target(restore_jump, out);
1840 restore_regs(reglist);
1841 emit_jmp(stubs[n].retaddr);
1844 static void inline_writestub(enum stub_type type, int i, u_int addr,
1845 const signed char regmap[], int target, int adj, u_int reglist)
1847 int rs=get_reg_temp(regmap);
1848 int rt=get_reg(regmap,target);
1851 uintptr_t host_addr = 0;
1852 void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
1853 if (handler == NULL) {
1855 emit_movimm_from(addr,rs,host_addr,rs);
1857 case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
1858 case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
1859 case STOREW_STUB: emit_writeword_indexed(rt,0,rs); break;
1865 // call a memhandler
1868 int cc=get_reg(regmap,CCREG);
1870 emit_loadreg(CCREG,2);
1871 emit_addimm(cc<0?2:cc,adj,2);
1872 emit_movimm((u_int)handler,3);
1873 // returns new cycle_count
1874 emit_far_call(jump_handler_write_h);
1875 emit_addimm(0,-adj,cc<0?2:cc);
1877 emit_storereg(CCREG,2);
1878 restore_regs(reglist);
1883 static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist)
1885 save_regs_all(reglist);
1886 cop2_do_stall_check(op, i, i_regs, 0);
1889 emit_far_call(pcnt_gte_start);
1891 emit_addimm(FP, (u_char *)&psxRegs.CP2D.r[0] - (u_char *)&dynarec_local, 0); // cop2 regs
1894 static void c2op_epilogue(u_int op,u_int reglist)
1898 emit_far_call(pcnt_gte_end);
1900 restore_regs_all(reglist);
1903 static void c2op_call_MACtoIR(int lm,int need_flags)
1906 emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
1908 emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
1911 static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
1913 emit_far_call(func);
1914 // func is C code and trashes r0
1915 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
1916 if(need_flags||need_ir)
1917 c2op_call_MACtoIR(lm,need_flags);
1918 emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
1921 static void c2op_assemble(int i, const struct regstat *i_regs)
1923 u_int c2op = source[i] & 0x3f;
1924 u_int reglist_full = get_host_reglist(i_regs->regmap);
1925 u_int reglist = reglist_full & CALLER_SAVE_REGS;
1926 int need_flags, need_ir;
1928 if (gte_handlers[c2op]!=NULL) {
1929 need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
1930 need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
1931 assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
1932 source[i],gte_unneeded[i+1],need_flags,need_ir);
1933 if(HACK_ENABLED(NDHACK_GTE_NO_FLAGS))
1935 int shift = (source[i] >> 19) & 1;
1936 int lm = (source[i] >> 10) & 1;
1941 int v = (source[i] >> 15) & 3;
1942 int cv = (source[i] >> 13) & 3;
1943 int mx = (source[i] >> 17) & 3;
1944 reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
1945 c2op_prologue(c2op,i,i_regs,reglist);
1946 /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
1950 emit_movzwl_indexed(9*4,0,4); // gteIR
1951 emit_movzwl_indexed(10*4,0,6);
1952 emit_movzwl_indexed(11*4,0,5);
1953 emit_orrshl_imm(6,16,4);
1956 emit_addimm(0,32*4+mx*8*4,6);
1958 emit_readword(&zeromem_ptr,6);
1960 emit_addimm(0,32*4+(cv*8+5)*4,7);
1962 emit_readword(&zeromem_ptr,7);
1964 emit_movimm(source[i],1); // opcode
1965 emit_far_call(gteMVMVA_part_neon);
1968 emit_far_call(gteMACtoIR_flags_neon);
1972 emit_far_call(gteMVMVA_part_cv3sh12_arm);
1974 emit_movimm(shift,1);
1975 emit_far_call(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm);
1977 if(need_flags||need_ir)
1978 c2op_call_MACtoIR(lm,need_flags);
1980 #else /* if not HAVE_ARMV5 */
1981 c2op_prologue(c2op,i,i_regs,reglist);
1982 emit_movimm(source[i],1); // opcode
1983 emit_writeword(1,&psxRegs.code);
1984 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
1989 c2op_prologue(c2op,i,i_regs,reglist);
1990 emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift);
1991 if(need_flags||need_ir) {
1992 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
1993 c2op_call_MACtoIR(lm,need_flags);
1997 c2op_prologue(c2op,i,i_regs,reglist);
1998 c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
2001 c2op_prologue(c2op,i,i_regs,reglist);
2002 c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
2005 c2op_prologue(c2op,i,i_regs,reglist);
2006 emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
2007 if(need_flags||need_ir) {
2008 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2009 c2op_call_MACtoIR(lm,need_flags);
2013 c2op_prologue(c2op,i,i_regs,reglist);
2014 c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
2017 c2op_prologue(c2op,i,i_regs,reglist);
2018 c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
2021 c2op_prologue(c2op,i,i_regs,reglist);
2022 c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
2026 c2op_prologue(c2op,i,i_regs,reglist);
2028 emit_movimm(source[i],1); // opcode
2029 emit_writeword(1,&psxRegs.code);
2031 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2034 c2op_epilogue(c2op,reglist);
2038 static void c2op_ctc2_31_assemble(signed char sl, signed char temp)
2040 //value = value & 0x7ffff000;
2041 //if (value & 0x7f87e000) value |= 0x80000000;
2042 emit_shrimm(sl,12,temp);
2043 emit_shlimm(temp,12,temp);
2044 emit_testimm(temp,0x7f000000);
2045 emit_testeqimm(temp,0x00870000);
2046 emit_testeqimm(temp,0x0000e000);
2047 emit_orrne_imm(temp,0x80000000,temp);
2050 static void do_mfc2_31_one(u_int copr,signed char temp)
2052 emit_readword(®_cop2d[copr],temp);
2053 emit_lsls_imm(temp,16,temp);
2054 emit_cmovs_imm(0,temp);
2055 emit_cmpimm(temp,0xf80<<16);
2056 emit_andimm(temp,0xf80<<16,temp);
2057 emit_cmovae_imm(0xf80<<16,temp);
2060 static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
2063 host_tempreg_acquire();
2064 temp = HOST_TEMPREG;
2066 do_mfc2_31_one(9,temp);
2067 emit_shrimm(temp,7+16,tl);
2068 do_mfc2_31_one(10,temp);
2069 emit_orrshr_imm(temp,2+16,tl);
2070 do_mfc2_31_one(11,temp);
2071 emit_orrshr_imm(temp,-3+16,tl);
2072 emit_writeword(tl,®_cop2d[29]);
2073 if (temp == HOST_TEMPREG)
2074 host_tempreg_release();
2077 static void multdiv_assemble_arm(int i, const struct regstat *i_regs)
2084 // case 0x1D: DMULTU
2087 if(dops[i].rs1&&dops[i].rs2)
2089 if((dops[i].opcode2&4)==0) // 32-bit
2091 if(dops[i].opcode2==0x18) // MULT
2093 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2094 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2095 signed char hi=get_reg(i_regs->regmap,HIREG);
2096 signed char lo=get_reg(i_regs->regmap,LOREG);
2101 emit_smull(m1,m2,hi,lo);
2103 if(dops[i].opcode2==0x19) // MULTU
2105 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2106 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2107 signed char hi=get_reg(i_regs->regmap,HIREG);
2108 signed char lo=get_reg(i_regs->regmap,LOREG);
2113 emit_umull(m1,m2,hi,lo);
2115 if(dops[i].opcode2==0x1A) // DIV
2117 signed char d1=get_reg(i_regs->regmap,dops[i].rs1);
2118 signed char d2=get_reg(i_regs->regmap,dops[i].rs2);
2121 signed char quotient=get_reg(i_regs->regmap,LOREG);
2122 signed char remainder=get_reg(i_regs->regmap,HIREG);
2123 assert(quotient>=0);
2124 assert(remainder>=0);
2125 emit_movs(d1,remainder);
2126 emit_movimm(0xffffffff,quotient);
2127 emit_negmi(quotient,quotient); // .. quotient and ..
2128 emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
2129 emit_movs(d2,HOST_TEMPREG);
2130 emit_jeq(out+52); // Division by zero
2131 emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
2133 emit_clz(HOST_TEMPREG,quotient);
2134 emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG);
2136 emit_movimm(0,quotient);
2137 emit_addpl_imm(quotient,1,quotient);
2138 emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2141 emit_orimm(quotient,1<<31,quotient);
2142 emit_shr(quotient,quotient,quotient);
2143 emit_cmp(remainder,HOST_TEMPREG);
2144 emit_subcs(remainder,HOST_TEMPREG,remainder);
2145 emit_adcs(quotient,quotient,quotient);
2146 emit_shrimm(HOST_TEMPREG,1,HOST_TEMPREG);
2147 emit_jcc(out-16); // -4
2149 emit_negmi(quotient,quotient);
2151 emit_negmi(remainder,remainder);
2153 if(dops[i].opcode2==0x1B) // DIVU
2155 signed char d1=get_reg(i_regs->regmap,dops[i].rs1); // dividend
2156 signed char d2=get_reg(i_regs->regmap,dops[i].rs2); // divisor
2159 signed char quotient=get_reg(i_regs->regmap,LOREG);
2160 signed char remainder=get_reg(i_regs->regmap,HIREG);
2161 assert(quotient>=0);
2162 assert(remainder>=0);
2163 emit_mov(d1,remainder);
2164 emit_movimm(0xffffffff,quotient); // div0 case
2166 emit_jeq(out+40); // Division by zero
2168 emit_clz(d2,HOST_TEMPREG);
2169 emit_movimm(1<<31,quotient);
2170 emit_shl(d2,HOST_TEMPREG,d2);
2172 emit_movimm(0,HOST_TEMPREG);
2173 emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2174 emit_lslpls_imm(d2,1,d2);
2176 emit_movimm(1<<31,quotient);
2178 emit_shr(quotient,HOST_TEMPREG,quotient);
2179 emit_cmp(remainder,d2);
2180 emit_subcs(remainder,d2,remainder);
2181 emit_adcs(quotient,quotient,quotient);
2182 emit_shrcc_imm(d2,1,d2);
2183 emit_jcc(out-16); // -4
2191 // Multiply by zero is zero.
2192 // MIPS does not have a divide by zero exception.
2193 // The result is undefined, we return zero.
2194 signed char hr=get_reg(i_regs->regmap,HIREG);
2195 signed char lr=get_reg(i_regs->regmap,LOREG);
2196 if(hr>=0) emit_zeroreg(hr);
2197 if(lr>=0) emit_zeroreg(lr);
2200 #define multdiv_assemble multdiv_assemble_arm
2202 static void do_jump_vaddr(int rs)
2204 emit_far_jump(jump_vaddr_reg[rs]);
2207 static void do_preload_rhash(int r) {
2208 // Don't need this for ARM. On x86, this puts the value 0xf8 into the
2209 // register. On ARM the hash can be done with a single instruction (below)
2212 static void do_preload_rhtbl(int ht) {
2213 emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
2216 static void do_rhash(int rs,int rh) {
2217 emit_andimm(rs,0xf8,rh);
2220 static void do_miniht_load(int ht,int rh) {
2221 assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
2222 output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
2225 static void do_miniht_jump(int rs,int rh,int ht) {
2227 emit_ldreq_indexed(ht,4,15);
2228 #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
2236 static void do_miniht_insert(u_int return_address,int rt,int temp) {
2238 emit_movimm(return_address,rt); // PC into link register
2239 add_to_linker(out,return_address,1);
2240 emit_pcreladdr(temp);
2241 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2242 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2244 emit_movw(return_address&0x0000FFFF,rt);
2245 add_to_linker(out,return_address,1);
2246 emit_pcreladdr(temp);
2247 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2248 emit_movt(return_address&0xFFFF0000,rt);
2249 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2253 // CPU-architecture-specific initialization
2254 static void arch_init(void)
2256 uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops - 8;
2257 struct tramp_insns *ops = ndrc->tramp.ops;
2259 assert(!(diff & 3));
2260 assert(diff < 0x1000);
2261 start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2262 for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++)
2263 ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val]
2264 end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2267 // vim:shiftwidth=2:expandtab