1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus/PCSX - assem_arm.c *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2021 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
25 #include "../gte_arm.h"
26 #include "../gte_neon.h"
28 #include "arm_features.h"
30 #define unused __attribute__((unused))
33 #pragma GCC diagnostic ignored "-Wunused-function"
34 #pragma GCC diagnostic ignored "-Wunused-variable"
35 #pragma GCC diagnostic ignored "-Wunused-but-set-variable"
38 void indirect_jump_indexed();
51 void jump_vaddr_r10();
52 void jump_vaddr_r12();
54 void * const jump_vaddr_reg[16] = {
73 void invalidate_addr_r0();
74 void invalidate_addr_r1();
75 void invalidate_addr_r2();
76 void invalidate_addr_r3();
77 void invalidate_addr_r4();
78 void invalidate_addr_r5();
79 void invalidate_addr_r6();
80 void invalidate_addr_r7();
81 void invalidate_addr_r8();
82 void invalidate_addr_r9();
83 void invalidate_addr_r10();
84 void invalidate_addr_r12();
86 const u_int invalidate_addr_reg[16] = {
87 (int)invalidate_addr_r0,
88 (int)invalidate_addr_r1,
89 (int)invalidate_addr_r2,
90 (int)invalidate_addr_r3,
91 (int)invalidate_addr_r4,
92 (int)invalidate_addr_r5,
93 (int)invalidate_addr_r6,
94 (int)invalidate_addr_r7,
95 (int)invalidate_addr_r8,
96 (int)invalidate_addr_r9,
97 (int)invalidate_addr_r10,
99 (int)invalidate_addr_r12,
104 static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
108 static void set_jump_target(void *addr, void *target_)
110 u_int target = (u_int)target_;
112 u_int *ptr2=(u_int *)ptr;
114 assert((target-(u_int)ptr2-8)<1024);
115 assert(((uintptr_t)addr&3)==0);
116 assert((target&3)==0);
117 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
118 //printf("target=%x addr=%p insn=%x\n",target,addr,*ptr2);
120 else if(ptr[3]==0x72) {
121 // generated by emit_jno_unlikely
122 if((target-(u_int)ptr2-8)<1024) {
123 assert(((uintptr_t)addr&3)==0);
124 assert((target&3)==0);
125 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
127 else if((target-(u_int)ptr2-8)<4096&&!((target-(u_int)ptr2-8)&15)) {
128 assert(((uintptr_t)addr&3)==0);
129 assert((target&3)==0);
130 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>4)|0xE00;
132 else *ptr2=(0x7A000000)|(((target-(u_int)ptr2-8)<<6)>>8);
135 assert((ptr[3]&0x0e)==0xa);
136 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
140 // This optionally copies the instruction from the target of the branch into
141 // the space before the branch. Works, but the difference in speed is
142 // usually insignificant.
144 static void set_jump_target_fillslot(int addr,u_int target,int copy)
146 u_char *ptr=(u_char *)addr;
147 u_int *ptr2=(u_int *)ptr;
148 assert(!copy||ptr2[-1]==0xe28dd000);
151 assert((target-(u_int)ptr2-8)<4096);
152 *ptr2=(*ptr2&0xFFFFF000)|(target-(u_int)ptr2-8);
155 assert((ptr[3]&0x0e)==0xa);
156 u_int target_insn=*(u_int *)target;
157 if((target_insn&0x0e100000)==0) { // ALU, no immediate, no flags
160 if((target_insn&0x0c100000)==0x04100000) { // Load
163 if(target_insn&0x08000000) {
167 ptr2[-1]=target_insn;
170 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
176 static void add_literal(int addr,int val)
178 assert(literalcount<sizeof(literals)/sizeof(literals[0]));
179 literals[literalcount][0]=addr;
180 literals[literalcount][1]=val;
184 // from a pointer to external jump stub (which was produced by emit_extjump2)
185 // find where the jumping insn is
186 static void *find_extjump_insn(void *stub)
188 int *ptr=(int *)(stub+4);
189 assert((*ptr&0x0fff0000)==0x059f0000); // ldr rx, [pc, #ofs]
190 u_int offset=*ptr&0xfff;
191 void **l_ptr=(void *)ptr+offset+8;
195 // find where external branch is liked to using addr of it's stub:
196 // get address that insn one after stub loads (dyna_linker arg1),
197 // treat it as a pointer to branch insn,
198 // return addr where that branch jumps to
199 static void *get_pointer(void *stub)
201 //printf("get_pointer(%x)\n",(int)stub);
202 int *i_ptr=find_extjump_insn(stub);
203 assert((*i_ptr&0x0f000000)==0x0a000000); // b
204 return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
207 // Find the "clean" entry point from a "dirty" entry point
208 // by skipping past the call to verify_code
209 static void *get_clean_addr(void *addr)
211 signed int *ptr = addr;
217 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
218 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
220 if((*ptr&0xFF000000)==0xea000000) {
221 return (char *)ptr+((*ptr<<8)>>6)+8; // follow jump
226 static int verify_dirty(const u_int *ptr)
230 // get from literal pool
231 assert((*ptr&0xFFFF0000)==0xe59f0000);
233 u_int source=*(u_int*)((void *)ptr+offset+8);
235 assert((*ptr&0xFFFF0000)==0xe59f0000);
237 u_int copy=*(u_int*)((void *)ptr+offset+8);
239 assert((*ptr&0xFFFF0000)==0xe59f0000);
241 u_int len=*(u_int*)((void *)ptr+offset+8);
246 assert((*ptr&0xFFF00000)==0xe3000000);
247 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
248 u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
249 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
252 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
253 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
254 //printf("verify_dirty: %x %x %x\n",source,copy,len);
255 return !memcmp((void *)source,(void *)copy,len);
258 // This doesn't necessarily find all clean entry points, just
259 // guarantees that it's not dirty
260 static int isclean(void *addr)
263 u_int *ptr=((u_int *)addr)+4;
265 u_int *ptr=((u_int *)addr)+6;
267 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
268 if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
269 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code) return 0;
270 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_ds) return 0;
274 // get source that block at addr was compiled from (host pointers)
275 static void get_bounds(void *addr, u_char **start, u_char **end)
280 // get from literal pool
281 assert((*ptr&0xFFFF0000)==0xe59f0000);
283 u_int source=*(u_int*)((void *)ptr+offset+8);
285 //assert((*ptr&0xFFFF0000)==0xe59f0000);
287 //u_int copy=*(u_int*)((void *)ptr+offset+8);
289 assert((*ptr&0xFFFF0000)==0xe59f0000);
291 u_int len=*(u_int*)((void *)ptr+offset+8);
296 assert((*ptr&0xFFF00000)==0xe3000000);
297 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
298 //u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
299 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
302 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
303 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
304 *start=(u_char *)source;
305 *end=(u_char *)source+len;
308 // Allocate a specific ARM register.
309 static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
314 // see if it's already allocated (and dealloc it)
315 for(n=0;n<HOST_REGS;n++)
317 if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {
318 dirty=(cur->dirty>>n)&1;
324 cur->dirty&=~(1<<hr);
325 cur->dirty|=dirty<<hr;
326 cur->isconst&=~(1<<hr);
329 // Alloc cycle count into dedicated register
330 static void alloc_cc(struct regstat *cur,int i)
332 alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
337 static unused char regname[16][4] = {
355 static void output_w32(u_int word)
357 *((u_int *)out)=word;
361 static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
366 return((rn<<16)|(rd<<12)|rm);
369 static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
374 assert((shift&1)==0);
375 return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
378 static u_int genimm(u_int imm,u_int *encoded)
386 *encoded=((i&30)<<7)|imm;
389 imm=(imm>>2)|(imm<<30);i-=2;
394 static void genimm_checked(u_int imm,u_int *encoded)
396 u_int ret=genimm(imm,encoded);
401 static u_int genjmp(u_int addr)
403 if (addr < 3) return 0; // a branch that will be patched later
404 int offset = addr-(int)out-8;
405 if (offset < -33554432 || offset >= 33554432) {
406 SysPrintf("genjmp: out of range: %08x\n", offset);
410 return ((u_int)offset>>2)&0xffffff;
413 static unused void emit_breakpoint(void)
415 assem_debug("bkpt #0\n");
416 //output_w32(0xe1200070);
417 output_w32(0xe7f001f0);
420 static void emit_mov(int rs,int rt)
422 assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
423 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
426 static void emit_movs(int rs,int rt)
428 assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
429 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
432 static void emit_add(int rs1,int rs2,int rt)
434 assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
435 output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
438 static void emit_adds(int rs1,int rs2,int rt)
440 assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
441 output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
443 #define emit_adds_ptr emit_adds
445 static void emit_adcs(int rs1,int rs2,int rt)
447 assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
448 output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
451 static void emit_neg(int rs, int rt)
453 assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
454 output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
457 static void emit_sub(int rs1,int rs2,int rt)
459 assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
460 output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
463 static void emit_zeroreg(int rt)
465 assem_debug("mov %s,#0\n",regname[rt]);
466 output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
469 static void emit_loadlp(u_int imm,u_int rt)
471 add_literal((int)out,imm);
472 assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
473 output_w32(0xe5900000|rd_rn_rm(rt,15,0));
476 static void emit_movw(u_int imm,u_int rt)
479 assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
480 output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
483 static void emit_movt(u_int imm,u_int rt)
485 assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
486 output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
489 static void emit_movimm(u_int imm,u_int rt)
492 if(genimm(imm,&armval)) {
493 assem_debug("mov %s,#%d\n",regname[rt],imm);
494 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
495 }else if(genimm(~imm,&armval)) {
496 assem_debug("mvn %s,#%d\n",regname[rt],imm);
497 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
498 }else if(imm<65536) {
500 assem_debug("mov %s,#%d\n",regname[rt],imm&0xFF00);
501 output_w32(0xe3a00000|rd_rn_imm_shift(rt,0,imm>>8,8));
502 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
503 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
511 emit_movw(imm&0x0000FFFF,rt);
512 emit_movt(imm&0xFFFF0000,rt);
517 static void emit_pcreladdr(u_int rt)
519 assem_debug("add %s,pc,#?\n",regname[rt]);
520 output_w32(0xe2800000|rd_rn_rm(rt,15,0));
523 static void emit_loadreg(int r, int hr)
526 SysPrintf("64bit load in 32bit mode!\n");
533 int addr = (int)&psxRegs.GPR.r[r];
535 //case HIREG: addr = &hi; break;
536 //case LOREG: addr = &lo; break;
537 case CCREG: addr = (int)&cycle_count; break;
538 case CSREG: addr = (int)&Status; break;
539 case INVCP: addr = (int)&invc_ptr; break;
540 case ROREG: addr = (int)&ram_offset; break;
541 default: assert(r < 34); break;
543 u_int offset = addr-(u_int)&dynarec_local;
545 assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
546 output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
550 static void emit_storereg(int r, int hr)
553 SysPrintf("64bit store in 32bit mode!\n");
557 int addr = (int)&psxRegs.GPR.r[r];
559 //case HIREG: addr = &hi; break;
560 //case LOREG: addr = &lo; break;
561 case CCREG: addr = (int)&cycle_count; break;
562 default: assert(r < 34); break;
564 u_int offset = addr-(u_int)&dynarec_local;
566 assem_debug("str %s,fp+%d\n",regname[hr],offset);
567 output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
570 static void emit_test(int rs, int rt)
572 assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
573 output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
576 static void emit_testimm(int rs,int imm)
579 assem_debug("tst %s,#%d\n",regname[rs],imm);
580 genimm_checked(imm,&armval);
581 output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
584 static void emit_testeqimm(int rs,int imm)
587 assem_debug("tsteq %s,$%d\n",regname[rs],imm);
588 genimm_checked(imm,&armval);
589 output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
592 static void emit_not(int rs,int rt)
594 assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
595 output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
598 static void emit_and(u_int rs1,u_int rs2,u_int rt)
600 assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
601 output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
604 static void emit_or(u_int rs1,u_int rs2,u_int rt)
606 assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
607 output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
610 static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
615 assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs],imm);
616 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
619 static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
624 assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm);
625 output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
628 static void emit_xor(u_int rs1,u_int rs2,u_int rt)
630 assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
631 output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
634 static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt)
636 assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm);
637 output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7));
640 static void emit_addimm(u_int rs,int imm,u_int rt)
646 if(genimm(imm,&armval)) {
647 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
648 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
649 }else if(genimm(-imm,&armval)) {
650 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
651 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
653 }else if(rt!=rs&&(u_int)imm<65536) {
654 emit_movw(imm&0x0000ffff,rt);
656 }else if(rt!=rs&&(u_int)-imm<65536) {
657 emit_movw(-imm&0x0000ffff,rt);
660 }else if((u_int)-imm<65536) {
661 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
662 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
663 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
664 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
667 int shift = (ffs(imm) - 1) & ~1;
668 int imm8 = imm & (0xff << shift);
669 genimm_checked(imm8,&armval);
670 assem_debug("add %s,%s,#0x%x\n",regname[rt],regname[rs],imm8);
671 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
678 else if(rs!=rt) emit_mov(rs,rt);
681 static void emit_addimm_and_set_flags(int imm,int rt)
683 assert(imm>-65536&&imm<65536);
685 if(genimm(imm,&armval)) {
686 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm);
687 output_w32(0xe2900000|rd_rn_rm(rt,rt,0)|armval);
688 }else if(genimm(-imm,&armval)) {
689 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],imm);
690 output_w32(0xe2500000|rd_rn_rm(rt,rt,0)|armval);
692 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF00);
693 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
694 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)>>8,8));
695 output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
697 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF00);
698 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
699 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm>>8,8));
700 output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
704 static void emit_addnop(u_int r)
707 assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
708 output_w32(0xe2800000|rd_rn_rm(r,r,0));
711 static void emit_andimm(int rs,int imm,int rt)
716 }else if(genimm(imm,&armval)) {
717 assem_debug("and %s,%s,#%d\n",regname[rt],regname[rs],imm);
718 output_w32(0xe2000000|rd_rn_rm(rt,rs,0)|armval);
719 }else if(genimm(~imm,&armval)) {
720 assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm);
721 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval);
722 }else if(imm==65535) {
724 assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]);
725 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF);
726 assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]);
727 output_w32(0xe3c00000|rd_rn_rm(rt,rt,0)|0x8FF);
729 assem_debug("uxth %s,%s\n",regname[rt],regname[rs]);
730 output_w32(0xe6ff0070|rd_rn_rm(rt,0,rs));
733 assert(imm>0&&imm<65535);
735 assem_debug("mov r14,#%d\n",imm&0xFF00);
736 output_w32(0xe3a00000|rd_rn_imm_shift(HOST_TEMPREG,0,imm>>8,8));
737 assem_debug("add r14,r14,#%d\n",imm&0xFF);
738 output_w32(0xe2800000|rd_rn_imm_shift(HOST_TEMPREG,HOST_TEMPREG,imm&0xff,0));
740 emit_movw(imm,HOST_TEMPREG);
742 assem_debug("and %s,%s,r14\n",regname[rt],regname[rs]);
743 output_w32(0xe0000000|rd_rn_rm(rt,rs,HOST_TEMPREG));
747 static void emit_orimm(int rs,int imm,int rt)
751 if(rs!=rt) emit_mov(rs,rt);
752 }else if(genimm(imm,&armval)) {
753 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm);
754 output_w32(0xe3800000|rd_rn_rm(rt,rs,0)|armval);
756 assert(imm>0&&imm<65536);
757 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
758 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
759 output_w32(0xe3800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
760 output_w32(0xe3800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
764 static void emit_xorimm(int rs,int imm,int rt)
768 if(rs!=rt) emit_mov(rs,rt);
769 }else if(genimm(imm,&armval)) {
770 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm);
771 output_w32(0xe2200000|rd_rn_rm(rt,rs,0)|armval);
773 assert(imm>0&&imm<65536);
774 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
775 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
776 output_w32(0xe2200000|rd_rn_imm_shift(rt,rs,imm>>8,8));
777 output_w32(0xe2200000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
781 static void emit_shlimm(int rs,u_int imm,int rt)
786 assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
787 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
790 static void emit_lsls_imm(int rs,int imm,int rt)
794 assem_debug("lsls %s,%s,#%d\n",regname[rt],regname[rs],imm);
795 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
798 static unused void emit_lslpls_imm(int rs,int imm,int rt)
802 assem_debug("lslpls %s,%s,#%d\n",regname[rt],regname[rs],imm);
803 output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
806 static void emit_shrimm(int rs,u_int imm,int rt)
810 assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
811 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
814 static void emit_sarimm(int rs,u_int imm,int rt)
818 assem_debug("asr %s,%s,#%d\n",regname[rt],regname[rs],imm);
819 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
822 static void emit_rorimm(int rs,u_int imm,int rt)
826 assem_debug("ror %s,%s,#%d\n",regname[rt],regname[rs],imm);
827 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
830 static void emit_signextend16(int rs,int rt)
833 emit_shlimm(rs,16,rt);
834 emit_sarimm(rt,16,rt);
836 assem_debug("sxth %s,%s\n",regname[rt],regname[rs]);
837 output_w32(0xe6bf0070|rd_rn_rm(rt,0,rs));
841 static void emit_signextend8(int rs,int rt)
844 emit_shlimm(rs,24,rt);
845 emit_sarimm(rt,24,rt);
847 assem_debug("sxtb %s,%s\n",regname[rt],regname[rs]);
848 output_w32(0xe6af0070|rd_rn_rm(rt,0,rs));
852 static void emit_shl(u_int rs,u_int shift,u_int rt)
858 assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
859 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
862 static void emit_shr(u_int rs,u_int shift,u_int rt)
867 assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
868 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
871 static void emit_sar(u_int rs,u_int shift,u_int rt)
876 assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
877 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
880 static unused void emit_orrshl(u_int rs,u_int shift,u_int rt)
885 assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
886 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
889 static unused void emit_orrshr(u_int rs,u_int shift,u_int rt)
894 assem_debug("orr %s,%s,%s,lsr %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
895 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
898 static void emit_cmpimm(int rs,int imm)
901 if(genimm(imm,&armval)) {
902 assem_debug("cmp %s,#%d\n",regname[rs],imm);
903 output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval);
904 }else if(genimm(-imm,&armval)) {
905 assem_debug("cmn %s,#%d\n",regname[rs],imm);
906 output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
909 emit_movimm(imm,HOST_TEMPREG);
910 assem_debug("cmp %s,r14\n",regname[rs]);
911 output_w32(0xe1500000|rd_rn_rm(0,rs,HOST_TEMPREG));
914 emit_movimm(-imm,HOST_TEMPREG);
915 assem_debug("cmn %s,r14\n",regname[rs]);
916 output_w32(0xe1700000|rd_rn_rm(0,rs,HOST_TEMPREG));
920 static void emit_cmovne_imm(int imm,int rt)
922 assem_debug("movne %s,#%d\n",regname[rt],imm);
924 genimm_checked(imm,&armval);
925 output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
928 static void emit_cmovl_imm(int imm,int rt)
930 assem_debug("movlt %s,#%d\n",regname[rt],imm);
932 genimm_checked(imm,&armval);
933 output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
936 static void emit_cmovb_imm(int imm,int rt)
938 assem_debug("movcc %s,#%d\n",regname[rt],imm);
940 genimm_checked(imm,&armval);
941 output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
944 static void emit_cmovae_imm(int imm,int rt)
946 assem_debug("movcs %s,#%d\n",regname[rt],imm);
948 genimm_checked(imm,&armval);
949 output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
952 static void emit_cmovs_imm(int imm,int rt)
954 assem_debug("movmi %s,#%d\n",regname[rt],imm);
956 genimm_checked(imm,&armval);
957 output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
960 static void emit_cmovne_reg(int rs,int rt)
962 assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
963 output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
966 static void emit_cmovl_reg(int rs,int rt)
968 assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
969 output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
972 static void emit_cmovb_reg(int rs,int rt)
974 assem_debug("movcc %s,%s\n",regname[rt],regname[rs]);
975 output_w32(0x31a00000|rd_rn_rm(rt,0,rs));
978 static void emit_cmovs_reg(int rs,int rt)
980 assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
981 output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
984 static void emit_slti32(int rs,int imm,int rt)
986 if(rs!=rt) emit_zeroreg(rt);
988 if(rs==rt) emit_movimm(0,rt);
989 emit_cmovl_imm(1,rt);
992 static void emit_sltiu32(int rs,int imm,int rt)
994 if(rs!=rt) emit_zeroreg(rt);
996 if(rs==rt) emit_movimm(0,rt);
997 emit_cmovb_imm(1,rt);
1000 static void emit_cmp(int rs,int rt)
1002 assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
1003 output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
1006 static void emit_set_gz32(int rs, int rt)
1008 //assem_debug("set_gz32\n");
1011 emit_cmovl_imm(0,rt);
1014 static void emit_set_nz32(int rs, int rt)
1016 //assem_debug("set_nz32\n");
1017 if(rs!=rt) emit_movs(rs,rt);
1018 else emit_test(rs,rs);
1019 emit_cmovne_imm(1,rt);
1022 static void emit_set_if_less32(int rs1, int rs2, int rt)
1024 //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1025 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1027 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1028 emit_cmovl_imm(1,rt);
1031 static void emit_set_if_carry32(int rs1, int rs2, int rt)
1033 //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1034 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1036 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1037 emit_cmovb_imm(1,rt);
1040 static int can_jump_or_call(const void *a)
1042 intptr_t offset = (u_char *)a - out - 8;
1043 return (-33554432 <= offset && offset < 33554432);
1046 static void emit_call(const void *a_)
1049 assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1050 u_int offset=genjmp(a);
1051 output_w32(0xeb000000|offset);
1054 static void emit_jmp(const void *a_)
1057 assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1058 u_int offset=genjmp(a);
1059 output_w32(0xea000000|offset);
1062 static void emit_jne(const void *a_)
1065 assem_debug("bne %x\n",a);
1066 u_int offset=genjmp(a);
1067 output_w32(0x1a000000|offset);
1070 static void emit_jeq(const void *a_)
1073 assem_debug("beq %x\n",a);
1074 u_int offset=genjmp(a);
1075 output_w32(0x0a000000|offset);
1078 static void emit_js(const void *a_)
1081 assem_debug("bmi %x\n",a);
1082 u_int offset=genjmp(a);
1083 output_w32(0x4a000000|offset);
1086 static void emit_jns(const void *a_)
1089 assem_debug("bpl %x\n",a);
1090 u_int offset=genjmp(a);
1091 output_w32(0x5a000000|offset);
1094 static void emit_jl(const void *a_)
1097 assem_debug("blt %x\n",a);
1098 u_int offset=genjmp(a);
1099 output_w32(0xba000000|offset);
1102 static void emit_jge(const void *a_)
1105 assem_debug("bge %x\n",a);
1106 u_int offset=genjmp(a);
1107 output_w32(0xaa000000|offset);
1110 static void emit_jno(const void *a_)
1113 assem_debug("bvc %x\n",a);
1114 u_int offset=genjmp(a);
1115 output_w32(0x7a000000|offset);
1118 static void emit_jc(const void *a_)
1121 assem_debug("bcs %x\n",a);
1122 u_int offset=genjmp(a);
1123 output_w32(0x2a000000|offset);
1126 static void emit_jcc(const void *a_)
1129 assem_debug("bcc %x\n",a);
1130 u_int offset=genjmp(a);
1131 output_w32(0x3a000000|offset);
1134 static unused void emit_callreg(u_int r)
1137 assem_debug("blx %s\n",regname[r]);
1138 output_w32(0xe12fff30|r);
1141 static void emit_jmpreg(u_int r)
1143 assem_debug("mov pc,%s\n",regname[r]);
1144 output_w32(0xe1a00000|rd_rn_rm(15,0,r));
1147 static void emit_ret(void)
1152 static void emit_readword_indexed(int offset, int rs, int rt)
1154 assert(offset>-4096&&offset<4096);
1155 assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
1157 output_w32(0xe5900000|rd_rn_rm(rt,rs,0)|offset);
1159 output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
1163 static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
1165 assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
1166 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
1168 #define emit_readptr_dualindexedx_ptrlen emit_readword_dualindexedx4
1170 static void emit_ldr_dualindexed(int rs1, int rs2, int rt)
1172 assem_debug("ldr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1173 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2));
1176 static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
1178 assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1179 output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
1182 static void emit_ldrb_dualindexed(int rs1, int rs2, int rt)
1184 assem_debug("ldrb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1185 output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2));
1188 static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
1190 assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1191 output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
1194 static void emit_ldrsb_dualindexed(int rs1, int rs2, int rt)
1196 assem_debug("ldrsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1197 output_w32(0xe19000d0|rd_rn_rm(rt,rs1,rs2));
1200 static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
1202 assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1203 output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
1206 static void emit_ldrh_dualindexed(int rs1, int rs2, int rt)
1208 assem_debug("ldrh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1209 output_w32(0xe19000b0|rd_rn_rm(rt,rs1,rs2));
1212 static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
1214 assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1215 output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
1218 static void emit_ldrsh_dualindexed(int rs1, int rs2, int rt)
1220 assem_debug("ldrsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1221 output_w32(0xe19000f0|rd_rn_rm(rt,rs1,rs2));
1224 static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
1226 assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1227 output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
1230 static void emit_str_dualindexed(int rs1, int rs2, int rt)
1232 assem_debug("str %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1233 output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2));
1236 static void emit_strb_dualindexed(int rs1, int rs2, int rt)
1238 assem_debug("strb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1239 output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2));
1242 static void emit_strh_dualindexed(int rs1, int rs2, int rt)
1244 assem_debug("strh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1245 output_w32(0xe18000b0|rd_rn_rm(rt,rs1,rs2));
1248 static void emit_movsbl_indexed(int offset, int rs, int rt)
1250 assert(offset>-256&&offset<256);
1251 assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
1253 output_w32(0xe1d000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1255 output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1259 static void emit_movswl_indexed(int offset, int rs, int rt)
1261 assert(offset>-256&&offset<256);
1262 assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
1264 output_w32(0xe1d000f0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1266 output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1270 static void emit_movzbl_indexed(int offset, int rs, int rt)
1272 assert(offset>-4096&&offset<4096);
1273 assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
1275 output_w32(0xe5d00000|rd_rn_rm(rt,rs,0)|offset);
1277 output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
1281 static void emit_movzwl_indexed(int offset, int rs, int rt)
1283 assert(offset>-256&&offset<256);
1284 assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
1286 output_w32(0xe1d000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1288 output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1292 static void emit_ldrd(int offset, int rs, int rt)
1294 assert(offset>-256&&offset<256);
1295 assem_debug("ldrd %s,%s+%d\n",regname[rt],regname[rs],offset);
1297 output_w32(0xe1c000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1299 output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1303 static void emit_readword(void *addr, int rt)
1305 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1306 assert(offset<4096);
1307 assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
1308 output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
1310 #define emit_readptr emit_readword
1312 static void emit_writeword_indexed(int rt, int offset, int rs)
1314 assert(offset>-4096&&offset<4096);
1315 assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
1317 output_w32(0xe5800000|rd_rn_rm(rt,rs,0)|offset);
1319 output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
1323 static void emit_writehword_indexed(int rt, int offset, int rs)
1325 assert(offset>-256&&offset<256);
1326 assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
1328 output_w32(0xe1c000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1330 output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1334 static void emit_writebyte_indexed(int rt, int offset, int rs)
1336 assert(offset>-4096&&offset<4096);
1337 assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
1339 output_w32(0xe5c00000|rd_rn_rm(rt,rs,0)|offset);
1341 output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
1345 static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
1347 assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1348 output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
1351 static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
1353 assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1354 output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
1357 static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
1359 assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1360 output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
1363 static void emit_writeword(int rt, void *addr)
1365 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1366 assert(offset<4096);
1367 assem_debug("str %s,fp+%d\n",regname[rt],offset);
1368 output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
1371 static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1373 assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1378 output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1381 static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1383 assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1388 output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1391 static void emit_clz(int rs,int rt)
1393 assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
1394 output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
1397 static void emit_subcs(int rs1,int rs2,int rt)
1399 assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1400 output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
1403 static void emit_shrcc_imm(int rs,u_int imm,int rt)
1407 assem_debug("lsrcc %s,%s,#%d\n",regname[rt],regname[rs],imm);
1408 output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1411 static void emit_shrne_imm(int rs,u_int imm,int rt)
1415 assem_debug("lsrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1416 output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1419 static void emit_negmi(int rs, int rt)
1421 assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
1422 output_w32(0x42600000|rd_rn_rm(rt,rs,0));
1425 static void emit_negsmi(int rs, int rt)
1427 assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
1428 output_w32(0x42700000|rd_rn_rm(rt,rs,0));
1431 static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
1433 assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1434 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
1437 static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
1439 assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1440 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
1443 static void emit_teq(int rs, int rt)
1445 assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
1446 output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
1449 static unused void emit_rsbimm(int rs, int imm, int rt)
1452 genimm_checked(imm,&armval);
1453 assem_debug("rsb %s,%s,#%d\n",regname[rt],regname[rs],imm);
1454 output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
1457 // Conditionally select one of two immediates, optimizing for small code size
1458 // This will only be called if HAVE_CMOV_IMM is defined
1459 static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
1462 if(genimm(imm2-imm1,&armval)) {
1463 emit_movimm(imm1,rt);
1464 assem_debug("addne %s,%s,#%d\n",regname[rt],regname[rt],imm2-imm1);
1465 output_w32(0x12800000|rd_rn_rm(rt,rt,0)|armval);
1466 }else if(genimm(imm1-imm2,&armval)) {
1467 emit_movimm(imm1,rt);
1468 assem_debug("subne %s,%s,#%d\n",regname[rt],regname[rt],imm1-imm2);
1469 output_w32(0x12400000|rd_rn_rm(rt,rt,0)|armval);
1473 emit_movimm(imm1,rt);
1474 add_literal((int)out,imm2);
1475 assem_debug("ldrne %s,pc+? [=%x]\n",regname[rt],imm2);
1476 output_w32(0x15900000|rd_rn_rm(rt,15,0));
1478 emit_movw(imm1&0x0000FFFF,rt);
1479 if((imm1&0xFFFF)!=(imm2&0xFFFF)) {
1480 assem_debug("movwne %s,#%d (0x%x)\n",regname[rt],imm2&0xFFFF,imm2&0xFFFF);
1481 output_w32(0x13000000|rd_rn_rm(rt,0,0)|(imm2&0xfff)|((imm2<<4)&0xf0000));
1483 emit_movt(imm1&0xFFFF0000,rt);
1484 if((imm1&0xFFFF0000)!=(imm2&0xFFFF0000)) {
1485 assem_debug("movtne %s,#%d (0x%x)\n",regname[rt],imm2&0xffff0000,imm2&0xffff0000);
1486 output_w32(0x13400000|rd_rn_rm(rt,0,0)|((imm2>>16)&0xfff)|((imm2>>12)&0xf0000));
1492 // special case for checking invalid_code
1493 static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
1495 assert(imm<128&&imm>=0);
1497 assem_debug("ldrb lr,%s,%s lsr #12\n",regname[base],regname[r]);
1498 output_w32(0xe7d00000|rd_rn_rm(HOST_TEMPREG,base,r)|0x620);
1499 emit_cmpimm(HOST_TEMPREG,imm);
1502 static void emit_callne(int a)
1504 assem_debug("blne %x\n",a);
1505 u_int offset=genjmp(a);
1506 output_w32(0x1b000000|offset);
1509 // Used to preload hash table entries
1510 static unused void emit_prefetchreg(int r)
1512 assem_debug("pld %s\n",regname[r]);
1513 output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
1516 // Special case for mini_ht
1517 static void emit_ldreq_indexed(int rs, u_int offset, int rt)
1519 assert(offset<4096);
1520 assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
1521 output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
1524 static void emit_orrne_imm(int rs,int imm,int rt)
1527 genimm_checked(imm,&armval);
1528 assem_debug("orrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1529 output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
1532 static unused void emit_addpl_imm(int rs,int imm,int rt)
1535 genimm_checked(imm,&armval);
1536 assem_debug("addpl %s,%s,#%d\n",regname[rt],regname[rs],imm);
1537 output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
1540 static void emit_jno_unlikely(int a)
1543 assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
1544 output_w32(0x72800000|rd_rn_rm(15,15,0));
1547 static void save_regs_all(u_int reglist)
1550 if(!reglist) return;
1551 assem_debug("stmia fp,{");
1554 assem_debug("r%d,",i);
1556 output_w32(0xe88b0000|reglist);
1559 static void restore_regs_all(u_int reglist)
1562 if(!reglist) return;
1563 assem_debug("ldmia fp,{");
1566 assem_debug("r%d,",i);
1568 output_w32(0xe89b0000|reglist);
1571 // Save registers before function call
1572 static void save_regs(u_int reglist)
1574 reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
1575 save_regs_all(reglist);
1578 // Restore registers after function call
1579 static void restore_regs(u_int reglist)
1581 reglist&=CALLER_SAVE_REGS;
1582 restore_regs_all(reglist);
1585 /* Stubs/epilogue */
1587 static void literal_pool(int n)
1589 if(!literalcount) return;
1591 if((int)out-literals[0][0]<4096-n) return;
1595 for(i=0;i<literalcount;i++)
1597 u_int l_addr=(u_int)out;
1600 if(literals[j][1]==literals[i][1]) {
1601 //printf("dup %08x\n",literals[i][1]);
1602 l_addr=literals[j][0];
1606 ptr=(u_int *)literals[i][0];
1607 u_int offset=l_addr-(u_int)ptr-8;
1608 assert(offset<4096);
1609 assert(!(offset&3));
1611 if(l_addr==(u_int)out) {
1612 literals[i][0]=l_addr; // remember for dupes
1613 output_w32(literals[i][1]);
1619 static void literal_pool_jumpover(int n)
1621 if(!literalcount) return;
1623 if((int)out-literals[0][0]<4096-n) return;
1628 set_jump_target(jaddr, out);
1631 // parsed by get_pointer, find_extjump_insn
1632 static void emit_extjump2(u_char *addr, u_int target, void *linker)
1634 u_char *ptr=(u_char *)addr;
1635 assert((ptr[3]&0x0e)==0xa);
1638 emit_loadlp(target,0);
1639 emit_loadlp((u_int)addr,1);
1640 assert(addr>=ndrc->translation_cache&&addr<(ndrc->translation_cache+(1<<TARGET_SIZE_2)));
1641 //assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
1643 #ifdef DEBUG_CYCLE_COUNT
1644 emit_readword(&last_count,ECX);
1645 emit_add(HOST_CCREG,ECX,HOST_CCREG);
1646 emit_readword(&next_interupt,ECX);
1647 emit_writeword(HOST_CCREG,&Count);
1648 emit_sub(HOST_CCREG,ECX,HOST_CCREG);
1649 emit_writeword(ECX,&last_count);
1652 emit_far_jump(linker);
1655 static void check_extjump2(void *src)
1658 assert((ptr[1] & 0x0fff0000) == 0x059f0000); // ldr rx, [pc, #ofs]
1662 // put rt_val into rt, potentially making use of rs with value rs_val
1663 static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
1667 if(genimm(rt_val,&armval)) {
1668 assem_debug("mov %s,#%d\n",regname[rt],rt_val);
1669 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
1672 if(genimm(~rt_val,&armval)) {
1673 assem_debug("mvn %s,#%d\n",regname[rt],rt_val);
1674 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
1678 if(genimm(diff,&armval)) {
1679 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],diff);
1680 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
1682 }else if(genimm(-diff,&armval)) {
1683 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-diff);
1684 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
1687 emit_movimm(rt_val,rt);
1690 // return 1 if above function can do it's job cheaply
1691 static int is_similar_value(u_int v1,u_int v2)
1695 if(v1==v2) return 1;
1697 for(xs=diff;xs!=0&&(xs&3)==0;xs>>=2)
1699 if(xs<0x100) return 1;
1700 for(xs=-diff;xs!=0&&(xs&3)==0;xs>>=2)
1702 if(xs<0x100) return 1;
1706 static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
1709 case LOADB_STUB: emit_signextend8(rs,rt); break;
1710 case LOADBU_STUB: emit_andimm(rs,0xff,rt); break;
1711 case LOADH_STUB: emit_signextend16(rs,rt); break;
1712 case LOADHU_STUB: emit_andimm(rs,0xffff,rt); break;
1713 case LOADW_STUB: if(rs!=rt) emit_mov(rs,rt); break;
1718 #include "pcsxmem.h"
1719 #include "pcsxmem_inline.c"
1721 static void do_readstub(int n)
1723 assem_debug("do_readstub %x\n",start+stubs[n].a*4);
1725 set_jump_target(stubs[n].addr, out);
1726 enum stub_type type=stubs[n].type;
1729 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1730 u_int reglist=stubs[n].e;
1731 const signed char *i_regmap=i_regs->regmap;
1733 if(dops[i].itype==C1LS||dops[i].itype==C2LS||dops[i].itype==LOADLR) {
1734 rt=get_reg(i_regmap,FTEMP);
1736 rt=get_reg(i_regmap,dops[i].rt1);
1739 int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1740 void *restore_jump = NULL;
1742 for(r=0;r<=12;r++) {
1743 if(((1<<r)&0x13ff)&&((1<<r)®list)==0) {
1747 if(rt>=0&&dops[i].rt1!=0)
1754 if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
1756 emit_readword(&mem_rtab,temp);
1757 emit_shrimm(rs,12,temp2);
1758 emit_readword_dualindexedx4(temp,temp2,temp2);
1759 emit_lsls_imm(temp2,1,temp2);
1760 if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1762 case LOADB_STUB: emit_ldrccsb_dualindexed(temp2,rs,rt); break;
1763 case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
1764 case LOADH_STUB: emit_ldrccsh_dualindexed(temp2,rs,rt); break;
1765 case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
1766 case LOADW_STUB: emit_ldrcc_dualindexed(temp2,rs,rt); break;
1772 emit_jcc(0); // jump to reg restore
1775 emit_jcc(stubs[n].retaddr); // return address
1780 if(type==LOADB_STUB||type==LOADBU_STUB)
1781 handler=jump_handler_read8;
1782 if(type==LOADH_STUB||type==LOADHU_STUB)
1783 handler=jump_handler_read16;
1784 if(type==LOADW_STUB)
1785 handler=jump_handler_read32;
1787 pass_args(rs,temp2);
1788 int cc=get_reg(i_regmap,CCREG);
1790 emit_loadreg(CCREG,2);
1791 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1792 emit_far_call(handler);
1793 if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1794 mov_loadtype_adj(type,0,rt);
1797 set_jump_target(restore_jump, out);
1798 restore_regs(reglist);
1799 emit_jmp(stubs[n].retaddr); // return address
1802 static void inline_readstub(enum stub_type type, int i, u_int addr,
1803 const signed char regmap[], int target, int adj, u_int reglist)
1805 int rs=get_reg(regmap,target);
1806 int rt=get_reg(regmap,target);
1807 if(rs<0) rs=get_reg(regmap,-1);
1810 uintptr_t host_addr = 0;
1812 int cc=get_reg(regmap,CCREG);
1813 if(pcsx_direct_read(type,addr,adj,cc,target?rs:-1,rt))
1815 handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
1816 if (handler == NULL) {
1817 if(rt<0||dops[i].rt1==0)
1820 emit_movimm_from(addr,rs,host_addr,rs);
1822 case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
1823 case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
1824 case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
1825 case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
1826 case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
1831 is_dynamic=pcsxmem_is_handler_dynamic(addr);
1833 if(type==LOADB_STUB||type==LOADBU_STUB)
1834 handler=jump_handler_read8;
1835 if(type==LOADH_STUB||type==LOADHU_STUB)
1836 handler=jump_handler_read16;
1837 if(type==LOADW_STUB)
1838 handler=jump_handler_read32;
1841 // call a memhandler
1842 if(rt>=0&&dops[i].rt1!=0)
1846 emit_movimm(addr,0);
1850 emit_loadreg(CCREG,2);
1852 emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
1853 emit_addimm(cc<0?2:cc,adj,2);
1856 emit_readword(&last_count,3);
1857 emit_addimm(cc<0?2:cc,adj,2);
1859 emit_writeword(2,&Count);
1862 emit_far_call(handler);
1864 if(rt>=0&&dops[i].rt1!=0) {
1866 case LOADB_STUB: emit_signextend8(0,rt); break;
1867 case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
1868 case LOADH_STUB: emit_signextend16(0,rt); break;
1869 case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
1870 case LOADW_STUB: if(rt!=0) emit_mov(0,rt); break;
1874 restore_regs(reglist);
1877 static void do_writestub(int n)
1879 assem_debug("do_writestub %x\n",start+stubs[n].a*4);
1881 set_jump_target(stubs[n].addr, out);
1882 enum stub_type type=stubs[n].type;
1885 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1886 u_int reglist=stubs[n].e;
1887 const signed char *i_regmap=i_regs->regmap;
1889 if(dops[i].itype==C1LS||dops[i].itype==C2LS) {
1890 rt=get_reg(i_regmap,r=FTEMP);
1892 rt=get_reg(i_regmap,r=dops[i].rs2);
1896 int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1897 void *restore_jump = NULL;
1898 int reglist2=reglist|(1<<rs)|(1<<rt);
1899 for(rtmp=0;rtmp<=12;rtmp++) {
1900 if(((1<<rtmp)&0x13ff)&&((1<<rtmp)®list2)==0) {
1907 for(rtmp=0;rtmp<=3;rtmp++)
1908 if(rtmp!=rs&&rtmp!=rt)
1911 if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
1913 emit_readword(&mem_wtab,temp);
1914 emit_shrimm(rs,12,temp2);
1915 emit_readword_dualindexedx4(temp,temp2,temp2);
1916 emit_lsls_imm(temp2,1,temp2);
1918 case STOREB_STUB: emit_strccb_dualindexed(temp2,rs,rt); break;
1919 case STOREH_STUB: emit_strcch_dualindexed(temp2,rs,rt); break;
1920 case STOREW_STUB: emit_strcc_dualindexed(temp2,rs,rt); break;
1925 emit_jcc(0); // jump to reg restore
1928 emit_jcc(stubs[n].retaddr); // return address (invcode check)
1934 case STOREB_STUB: handler=jump_handler_write8; break;
1935 case STOREH_STUB: handler=jump_handler_write16; break;
1936 case STOREW_STUB: handler=jump_handler_write32; break;
1943 int cc=get_reg(i_regmap,CCREG);
1945 emit_loadreg(CCREG,2);
1946 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1947 // returns new cycle_count
1948 emit_far_call(handler);
1949 emit_addimm(0,-(int)stubs[n].d,cc<0?2:cc);
1951 emit_storereg(CCREG,2);
1953 set_jump_target(restore_jump, out);
1954 restore_regs(reglist);
1955 emit_jmp(stubs[n].retaddr);
1958 static void inline_writestub(enum stub_type type, int i, u_int addr,
1959 const signed char regmap[], int target, int adj, u_int reglist)
1961 int rs=get_reg(regmap,-1);
1962 int rt=get_reg(regmap,target);
1965 uintptr_t host_addr = 0;
1966 void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
1967 if (handler == NULL) {
1969 emit_movimm_from(addr,rs,host_addr,rs);
1971 case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
1972 case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
1973 case STOREW_STUB: emit_writeword_indexed(rt,0,rs); break;
1979 // call a memhandler
1982 int cc=get_reg(regmap,CCREG);
1984 emit_loadreg(CCREG,2);
1985 emit_addimm(cc<0?2:cc,adj,2);
1986 emit_movimm((u_int)handler,3);
1987 // returns new cycle_count
1988 emit_far_call(jump_handler_write_h);
1989 emit_addimm(0,-adj,cc<0?2:cc);
1991 emit_storereg(CCREG,2);
1992 restore_regs(reglist);
1995 // this output is parsed by verify_dirty, get_bounds, isclean, get_clean_addr
1996 static void do_dirty_stub_emit_args(u_int arg0, u_int source_len)
1999 emit_loadlp((int)source, 1);
2000 emit_loadlp((int)copy, 2);
2001 emit_loadlp(source_len, 3);
2003 emit_movw(((u_int)source)&0x0000FFFF, 1);
2004 emit_movw(((u_int)copy)&0x0000FFFF, 2);
2005 emit_movt(((u_int)source)&0xFFFF0000, 1);
2006 emit_movt(((u_int)copy)&0xFFFF0000, 2);
2007 emit_movw(source_len, 3);
2009 emit_movimm(arg0, 0);
2012 static void *do_dirty_stub(int i, u_int source_len)
2014 assem_debug("do_dirty_stub %x\n",start+i*4);
2015 do_dirty_stub_emit_args(start + i*4, source_len);
2016 emit_far_call(verify_code);
2020 entry = instr_addr[i];
2021 emit_jmp(instr_addr[i]);
2025 static void do_dirty_stub_ds(u_int source_len)
2027 do_dirty_stub_emit_args(start + 1, source_len);
2028 emit_far_call(verify_code_ds);
2033 static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist)
2035 save_regs_all(reglist);
2036 cop2_do_stall_check(op, i, i_regs, 0);
2039 emit_far_call(pcnt_gte_start);
2041 emit_addimm(FP, (u_char *)&psxRegs.CP2D.r[0] - (u_char *)&dynarec_local, 0); // cop2 regs
2044 static void c2op_epilogue(u_int op,u_int reglist)
2048 emit_far_call(pcnt_gte_end);
2050 restore_regs_all(reglist);
2053 static void c2op_call_MACtoIR(int lm,int need_flags)
2056 emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
2058 emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
2061 static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
2063 emit_far_call(func);
2064 // func is C code and trashes r0
2065 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2066 if(need_flags||need_ir)
2067 c2op_call_MACtoIR(lm,need_flags);
2068 emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
2071 static void c2op_assemble(int i, const struct regstat *i_regs)
2073 u_int c2op = source[i] & 0x3f;
2074 u_int reglist_full = get_host_reglist(i_regs->regmap);
2075 u_int reglist = reglist_full & CALLER_SAVE_REGS;
2076 int need_flags, need_ir;
2078 if (gte_handlers[c2op]!=NULL) {
2079 need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
2080 need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
2081 assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
2082 source[i],gte_unneeded[i+1],need_flags,need_ir);
2083 if(HACK_ENABLED(NDHACK_GTE_NO_FLAGS))
2085 int shift = (source[i] >> 19) & 1;
2086 int lm = (source[i] >> 10) & 1;
2091 int v = (source[i] >> 15) & 3;
2092 int cv = (source[i] >> 13) & 3;
2093 int mx = (source[i] >> 17) & 3;
2094 reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
2095 c2op_prologue(c2op,i,i_regs,reglist);
2096 /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
2100 emit_movzwl_indexed(9*4,0,4); // gteIR
2101 emit_movzwl_indexed(10*4,0,6);
2102 emit_movzwl_indexed(11*4,0,5);
2103 emit_orrshl_imm(6,16,4);
2106 emit_addimm(0,32*4+mx*8*4,6);
2108 emit_readword(&zeromem_ptr,6);
2110 emit_addimm(0,32*4+(cv*8+5)*4,7);
2112 emit_readword(&zeromem_ptr,7);
2114 emit_movimm(source[i],1); // opcode
2115 emit_far_call(gteMVMVA_part_neon);
2118 emit_far_call(gteMACtoIR_flags_neon);
2122 emit_far_call((int)gteMVMVA_part_cv3sh12_arm);
2124 emit_movimm(shift,1);
2125 emit_far_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm));
2127 if(need_flags||need_ir)
2128 c2op_call_MACtoIR(lm,need_flags);
2130 #else /* if not HAVE_ARMV5 */
2131 c2op_prologue(c2op,i,i_regs,reglist);
2132 emit_movimm(source[i],1); // opcode
2133 emit_writeword(1,&psxRegs.code);
2134 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2139 c2op_prologue(c2op,i,i_regs,reglist);
2140 emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift);
2141 if(need_flags||need_ir) {
2142 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2143 c2op_call_MACtoIR(lm,need_flags);
2147 c2op_prologue(c2op,i,i_regs,reglist);
2148 c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
2151 c2op_prologue(c2op,i,i_regs,reglist);
2152 c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
2155 c2op_prologue(c2op,i,i_regs,reglist);
2156 emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
2157 if(need_flags||need_ir) {
2158 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2159 c2op_call_MACtoIR(lm,need_flags);
2163 c2op_prologue(c2op,i,i_regs,reglist);
2164 c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
2167 c2op_prologue(c2op,i,i_regs,reglist);
2168 c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
2171 c2op_prologue(c2op,i,i_regs,reglist);
2172 c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
2176 c2op_prologue(c2op,i,i_regs,reglist);
2178 emit_movimm(source[i],1); // opcode
2179 emit_writeword(1,&psxRegs.code);
2181 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2184 c2op_epilogue(c2op,reglist);
2188 static void c2op_ctc2_31_assemble(signed char sl, signed char temp)
2190 //value = value & 0x7ffff000;
2191 //if (value & 0x7f87e000) value |= 0x80000000;
2192 emit_shrimm(sl,12,temp);
2193 emit_shlimm(temp,12,temp);
2194 emit_testimm(temp,0x7f000000);
2195 emit_testeqimm(temp,0x00870000);
2196 emit_testeqimm(temp,0x0000e000);
2197 emit_orrne_imm(temp,0x80000000,temp);
2200 static void do_mfc2_31_one(u_int copr,signed char temp)
2202 emit_readword(®_cop2d[copr],temp);
2203 emit_lsls_imm(temp,16,temp);
2204 emit_cmovs_imm(0,temp);
2205 emit_cmpimm(temp,0xf80<<16);
2206 emit_andimm(temp,0xf80<<16,temp);
2207 emit_cmovae_imm(0xf80<<16,temp);
2210 static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
2213 host_tempreg_acquire();
2214 temp = HOST_TEMPREG;
2216 do_mfc2_31_one(9,temp);
2217 emit_shrimm(temp,7+16,tl);
2218 do_mfc2_31_one(10,temp);
2219 emit_orrshr_imm(temp,2+16,tl);
2220 do_mfc2_31_one(11,temp);
2221 emit_orrshr_imm(temp,-3+16,tl);
2222 emit_writeword(tl,®_cop2d[29]);
2223 if (temp == HOST_TEMPREG)
2224 host_tempreg_release();
2227 static void multdiv_assemble_arm(int i, const struct regstat *i_regs)
2234 // case 0x1D: DMULTU
2237 if(dops[i].rs1&&dops[i].rs2)
2239 if((dops[i].opcode2&4)==0) // 32-bit
2241 if(dops[i].opcode2==0x18) // MULT
2243 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2244 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2245 signed char hi=get_reg(i_regs->regmap,HIREG);
2246 signed char lo=get_reg(i_regs->regmap,LOREG);
2251 emit_smull(m1,m2,hi,lo);
2253 if(dops[i].opcode2==0x19) // MULTU
2255 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2256 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2257 signed char hi=get_reg(i_regs->regmap,HIREG);
2258 signed char lo=get_reg(i_regs->regmap,LOREG);
2263 emit_umull(m1,m2,hi,lo);
2265 if(dops[i].opcode2==0x1A) // DIV
2267 signed char d1=get_reg(i_regs->regmap,dops[i].rs1);
2268 signed char d2=get_reg(i_regs->regmap,dops[i].rs2);
2271 signed char quotient=get_reg(i_regs->regmap,LOREG);
2272 signed char remainder=get_reg(i_regs->regmap,HIREG);
2273 assert(quotient>=0);
2274 assert(remainder>=0);
2275 emit_movs(d1,remainder);
2276 emit_movimm(0xffffffff,quotient);
2277 emit_negmi(quotient,quotient); // .. quotient and ..
2278 emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
2279 emit_movs(d2,HOST_TEMPREG);
2280 emit_jeq(out+52); // Division by zero
2281 emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
2283 emit_clz(HOST_TEMPREG,quotient);
2284 emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG);
2286 emit_movimm(0,quotient);
2287 emit_addpl_imm(quotient,1,quotient);
2288 emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2291 emit_orimm(quotient,1<<31,quotient);
2292 emit_shr(quotient,quotient,quotient);
2293 emit_cmp(remainder,HOST_TEMPREG);
2294 emit_subcs(remainder,HOST_TEMPREG,remainder);
2295 emit_adcs(quotient,quotient,quotient);
2296 emit_shrimm(HOST_TEMPREG,1,HOST_TEMPREG);
2297 emit_jcc(out-16); // -4
2299 emit_negmi(quotient,quotient);
2301 emit_negmi(remainder,remainder);
2303 if(dops[i].opcode2==0x1B) // DIVU
2305 signed char d1=get_reg(i_regs->regmap,dops[i].rs1); // dividend
2306 signed char d2=get_reg(i_regs->regmap,dops[i].rs2); // divisor
2309 signed char quotient=get_reg(i_regs->regmap,LOREG);
2310 signed char remainder=get_reg(i_regs->regmap,HIREG);
2311 assert(quotient>=0);
2312 assert(remainder>=0);
2313 emit_mov(d1,remainder);
2314 emit_movimm(0xffffffff,quotient); // div0 case
2316 emit_jeq(out+40); // Division by zero
2318 emit_clz(d2,HOST_TEMPREG);
2319 emit_movimm(1<<31,quotient);
2320 emit_shl(d2,HOST_TEMPREG,d2);
2322 emit_movimm(0,HOST_TEMPREG);
2323 emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2324 emit_lslpls_imm(d2,1,d2);
2326 emit_movimm(1<<31,quotient);
2328 emit_shr(quotient,HOST_TEMPREG,quotient);
2329 emit_cmp(remainder,d2);
2330 emit_subcs(remainder,d2,remainder);
2331 emit_adcs(quotient,quotient,quotient);
2332 emit_shrcc_imm(d2,1,d2);
2333 emit_jcc(out-16); // -4
2341 // Multiply by zero is zero.
2342 // MIPS does not have a divide by zero exception.
2343 // The result is undefined, we return zero.
2344 signed char hr=get_reg(i_regs->regmap,HIREG);
2345 signed char lr=get_reg(i_regs->regmap,LOREG);
2346 if(hr>=0) emit_zeroreg(hr);
2347 if(lr>=0) emit_zeroreg(lr);
2350 #define multdiv_assemble multdiv_assemble_arm
2352 static void do_jump_vaddr(int rs)
2354 emit_far_jump(jump_vaddr_reg[rs]);
2357 static void do_preload_rhash(int r) {
2358 // Don't need this for ARM. On x86, this puts the value 0xf8 into the
2359 // register. On ARM the hash can be done with a single instruction (below)
2362 static void do_preload_rhtbl(int ht) {
2363 emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
2366 static void do_rhash(int rs,int rh) {
2367 emit_andimm(rs,0xf8,rh);
2370 static void do_miniht_load(int ht,int rh) {
2371 assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
2372 output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
2375 static void do_miniht_jump(int rs,int rh,int ht) {
2377 emit_ldreq_indexed(ht,4,15);
2378 #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
2386 static void do_miniht_insert(u_int return_address,int rt,int temp) {
2388 emit_movimm(return_address,rt); // PC into link register
2389 add_to_linker(out,return_address,1);
2390 emit_pcreladdr(temp);
2391 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2392 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2394 emit_movw(return_address&0x0000FFFF,rt);
2395 add_to_linker(out,return_address,1);
2396 emit_pcreladdr(temp);
2397 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2398 emit_movt(return_address&0xFFFF0000,rt);
2399 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2403 // CPU-architecture-specific initialization
2404 static void arch_init(void)
2406 uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops - 8;
2407 struct tramp_insns *ops = ndrc->tramp.ops;
2409 assert(!(diff & 3));
2410 assert(diff < 0x1000);
2411 start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2412 for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++)
2413 ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val]
2414 end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2417 // vim:shiftwidth=2:expandtab