1 #include "new_dynarec.h"
4 extern char invalid_code[0x100000];
13 /* same as psxRegs.GPR.n.* */
16 /* same as psxRegs.CP0.n.* */
17 extern int reg_cop0[];
18 #define Status psxRegs.CP0.n.Status
19 #define Cause psxRegs.CP0.n.Cause
20 #define EPC psxRegs.CP0.n.EPC
21 #define BadVAddr psxRegs.CP0.n.BadVAddr
22 #define Context psxRegs.CP0.n.Context
23 #define EntryHi psxRegs.CP0.n.EntryHi
24 #define Count psxRegs.cycle // psxRegs.CP0.n.Count
27 extern int reg_cop2d[], reg_cop2c[];
28 extern void *gte_handlers[64];
29 extern void *gte_handlers_nf[64];
30 extern const char *gte_regnames[64];
31 extern const char gte_cycletab[64];
34 extern int FCR0, FCR31;
37 extern void (*readmem[0x10000])();
38 extern void (*readmemb[0x10000])();
39 extern void (*readmemh[0x10000])();
40 extern void (*writemem[0x10000])();
41 extern void (*writememb[0x10000])();
42 extern void (*writememh[0x10000])();
44 extern unsigned int address;
45 extern unsigned int readmem_word; /* same as readmem_dword */
46 extern unsigned int word; /* write */
47 extern unsigned short hword;
48 extern unsigned char byte;
50 extern void *psxH_ptr;
52 // same as invalid_code, just a region for ram write checks (inclusive)
53 extern u32 inv_code_start, inv_code_end;
56 extern unsigned int next_interupt;
57 extern int pending_exception;
60 void pcsx_mtc0(u32 reg);
61 void pcsx_mtc0_ds(u32 reg);
64 extern void (*psxHLEt[])();