17 #include "../psxdma.h"
19 #include "../psxmem.h"
20 #include "../r3000a.h"
21 #include "../psxinterpreter.h"
22 #include "../psxhle.h"
23 #include "../new_dynarec/events.h"
25 #include "../frontend/main.h"
30 #if (defined(__arm__) || defined(__aarch64__)) && !defined(ALLOW_LIGHTREC_ON_ARM)
31 #error "Lightrec should not be used on ARM (please specify DYNAREC=ari64 to make)"
34 #define ARRAY_SIZE(x) (sizeof(x) ? sizeof(x) / sizeof((x)[0]) : 0)
36 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
37 # define LE32TOH(x) __builtin_bswap32(x)
38 # define HTOLE32(x) __builtin_bswap32(x)
39 # define LE16TOH(x) __builtin_bswap16(x)
40 # define HTOLE16(x) __builtin_bswap16(x)
42 # define LE32TOH(x) (x)
43 # define HTOLE32(x) (x)
44 # define LE16TOH(x) (x)
45 # define HTOLE16(x) (x)
49 # define likely(x) __builtin_expect(!!(x),1)
50 # define unlikely(x) __builtin_expect(!!(x),0)
52 # define likely(x) (x)
53 # define unlikely(x) (x)
61 static struct lightrec_state *lightrec_state;
63 static char *name = "retroarch.exe";
65 static bool use_lightrec_interpreter;
66 static bool use_pcsx_interpreter;
67 static bool block_stepping;
94 static void (*cp2_ops[])(struct psxCP2Regs *) = {
95 [OP_CP2_RTPS] = gteRTPS,
96 [OP_CP2_RTPS] = gteRTPS,
97 [OP_CP2_NCLIP] = gteNCLIP,
99 [OP_CP2_DPCS] = gteDPCS,
100 [OP_CP2_INTPL] = gteINTPL,
101 [OP_CP2_MVMVA] = gteMVMVA,
102 [OP_CP2_NCDS] = gteNCDS,
103 [OP_CP2_CDP] = gteCDP,
104 [OP_CP2_NCDT] = gteNCDT,
105 [OP_CP2_NCCS] = gteNCCS,
107 [OP_CP2_NCS] = gteNCS,
108 [OP_CP2_NCT] = gteNCT,
109 [OP_CP2_SQR] = gteSQR,
110 [OP_CP2_DCPL] = gteDCPL,
111 [OP_CP2_DPCT] = gteDPCT,
112 [OP_CP2_AVSZ3] = gteAVSZ3,
113 [OP_CP2_AVSZ4] = gteAVSZ4,
114 [OP_CP2_RTPT] = gteRTPT,
115 [OP_CP2_GPF] = gteGPF,
116 [OP_CP2_GPL] = gteGPL,
117 [OP_CP2_NCCT] = gteNCCT,
120 static char cache_buf[64 * 1024];
122 static void cop2_op(struct lightrec_state *state, u32 func)
124 struct lightrec_registers *regs = lightrec_get_registers(state);
128 if (unlikely(!cp2_ops[func & 0x3f])) {
129 fprintf(stderr, "Invalid CP2 function %u\n", func);
131 /* This works because regs->cp2c comes right after regs->cp2d,
132 * so it can be cast to a pcsxCP2Regs pointer. */
133 cp2_ops[func & 0x3f]((psxCP2Regs *) regs->cp2d);
137 static bool has_interrupt(void)
139 struct lightrec_registers *regs = lightrec_get_registers(lightrec_state);
141 return ((psxHu32(0x1070) & psxHu32(0x1074)) &&
142 (regs->cp0[12] & 0x401) == 0x401) ||
143 (regs->cp0[12] & regs->cp0[13] & 0x0300);
146 static void lightrec_tansition_to_pcsx(struct lightrec_state *state)
148 psxRegs.cycle += lightrec_current_cycle_count(state) / 1024;
149 lightrec_reset_cycle_count(state, 0);
152 static void lightrec_tansition_from_pcsx(struct lightrec_state *state)
154 s32 cycles_left = next_interupt - psxRegs.cycle;
156 if (block_stepping || cycles_left <= 0 || has_interrupt())
157 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
159 lightrec_set_target_cycle_count(state, cycles_left * 1024);
163 static void hw_write_byte(struct lightrec_state *state,
164 u32 op, void *host, u32 mem, u8 val)
166 lightrec_tansition_to_pcsx(state);
168 psxHwWrite8(mem, val);
170 lightrec_tansition_from_pcsx(state);
173 static void hw_write_half(struct lightrec_state *state,
174 u32 op, void *host, u32 mem, u16 val)
176 lightrec_tansition_to_pcsx(state);
178 psxHwWrite16(mem, val);
180 lightrec_tansition_from_pcsx(state);
183 static void hw_write_word(struct lightrec_state *state,
184 u32 op, void *host, u32 mem, u32 val)
186 lightrec_tansition_to_pcsx(state);
188 psxHwWrite32(mem, val);
190 lightrec_tansition_from_pcsx(state);
193 static u8 hw_read_byte(struct lightrec_state *state, u32 op, void *host, u32 mem)
197 lightrec_tansition_to_pcsx(state);
199 val = psxHwRead8(mem);
201 lightrec_tansition_from_pcsx(state);
206 static u16 hw_read_half(struct lightrec_state *state,
207 u32 op, void *host, u32 mem)
211 lightrec_tansition_to_pcsx(state);
213 val = psxHwRead16(mem);
215 lightrec_tansition_from_pcsx(state);
220 static u32 hw_read_word(struct lightrec_state *state,
221 u32 op, void *host, u32 mem)
225 lightrec_tansition_to_pcsx(state);
227 val = psxHwRead32(mem);
229 lightrec_tansition_from_pcsx(state);
234 static struct lightrec_mem_map_ops hw_regs_ops = {
243 static u32 cache_ctrl;
245 static void cache_ctrl_write_word(struct lightrec_state *state,
246 u32 op, void *host, u32 mem, u32 val)
251 static u32 cache_ctrl_read_word(struct lightrec_state *state,
252 u32 op, void *host, u32 mem)
257 static struct lightrec_mem_map_ops cache_ctrl_ops = {
258 .sw = cache_ctrl_write_word,
259 .lw = cache_ctrl_read_word,
262 static struct lightrec_mem_map lightrec_map[] = {
263 [PSX_MAP_KERNEL_USER_RAM] = {
264 /* Kernel and user memory */
273 [PSX_MAP_SCRATCH_PAD] = {
278 [PSX_MAP_PARALLEL_PORT] = {
283 [PSX_MAP_HW_REGISTERS] = {
284 /* Hardware registers */
289 [PSX_MAP_CACHE_CONTROL] = {
293 .ops = &cache_ctrl_ops,
296 /* Mirrors of the kernel/user memory */
297 [PSX_MAP_MIRROR1] = {
300 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
302 [PSX_MAP_MIRROR2] = {
305 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
307 [PSX_MAP_MIRROR3] = {
310 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
313 /* Mirror of the parallel port. Only used by the PS2/PS3 BIOS */
314 [PSX_MAP_PPORT_MIRROR] = {
317 .mirror_of = &lightrec_map[PSX_MAP_PARALLEL_PORT],
321 [PSX_MAP_CODE_BUFFER] = {
322 .length = CODE_BUFFER_SIZE,
326 static void lightrec_enable_ram(struct lightrec_state *state, bool enable)
329 memcpy(psxM, cache_buf, sizeof(cache_buf));
331 memcpy(cache_buf, psxM, sizeof(cache_buf));
334 static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size)
374 return kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
405 return !is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
410 #if defined(HW_DOL) || defined(HW_RVL)
411 static void lightrec_code_inv(void *ptr, uint32_t len)
413 extern void DCFlushRange(void *ptr, u32 len);
414 extern void ICInvalidateRange(void *ptr, u32 len);
416 DCFlushRange(ptr, len);
417 ICInvalidateRange(ptr, len);
419 #elif defined(HW_WUP)
420 static void lightrec_code_inv(void *ptr, uint32_t len)
422 wiiu_clear_cache(ptr, (void *)((uintptr_t)ptr + len));
426 static const struct lightrec_ops lightrec_ops = {
428 .enable_ram = lightrec_enable_ram,
429 .hw_direct = lightrec_can_hw_direct,
430 #if defined(HW_DOL) || defined(HW_RVL) || defined(HW_WUP)
431 .code_inv = lightrec_code_inv,
435 static int lightrec_plugin_init(void)
437 lightrec_map[PSX_MAP_KERNEL_USER_RAM].address = psxM;
438 lightrec_map[PSX_MAP_BIOS].address = psxR;
439 lightrec_map[PSX_MAP_SCRATCH_PAD].address = psxH;
440 lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000;
441 lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP;
443 if (!LIGHTREC_CUSTOM_MAP) {
445 code_buffer = mmap(0, CODE_BUFFER_SIZE,
446 PROT_EXEC | PROT_READ | PROT_WRITE,
447 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
448 if (code_buffer == MAP_FAILED)
451 code_buffer = malloc(CODE_BUFFER_SIZE);
457 if (LIGHTREC_CUSTOM_MAP) {
458 lightrec_map[PSX_MAP_MIRROR1].address = psxM + 0x200000;
459 lightrec_map[PSX_MAP_MIRROR2].address = psxM + 0x400000;
460 lightrec_map[PSX_MAP_MIRROR3].address = psxM + 0x600000;
463 lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
465 use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER");
467 lightrec_state = lightrec_init(name,
468 lightrec_map, ARRAY_SIZE(lightrec_map),
471 // fprintf(stderr, "M=0x%lx, P=0x%lx, R=0x%lx, H=0x%lx\n",
475 // (uintptr_t) psxH);
478 signal(SIGPIPE, exit);
483 static void lightrec_plugin_sync_regs_to_pcsx(bool need_cp2);
484 static void lightrec_plugin_sync_regs_from_pcsx(bool need_cp2);
486 static void lightrec_plugin_execute_internal(bool block_only)
488 struct lightrec_registers *regs;
489 u32 flags, cycles_pcsx;
491 regs = lightrec_get_registers(lightrec_state);
492 gen_interupt((psxCP0Regs *)regs->cp0);
493 cycles_pcsx = next_interupt - psxRegs.cycle;
494 assert((s32)cycles_pcsx > 0);
496 // step during early boot so that 0x80030000 fastboot hack works
497 block_stepping = block_only;
501 if (use_pcsx_interpreter) {
504 u32 cycles_lightrec = cycles_pcsx * 1024;
505 if (unlikely(use_lightrec_interpreter)) {
506 psxRegs.pc = lightrec_run_interpreter(lightrec_state,
510 psxRegs.pc = lightrec_execute(lightrec_state,
511 psxRegs.pc, cycles_lightrec);
514 lightrec_tansition_to_pcsx(lightrec_state);
516 flags = lightrec_exit_flags(lightrec_state);
518 if (flags & LIGHTREC_EXIT_SEGFAULT) {
519 fprintf(stderr, "Exiting at cycle 0x%08x\n",
524 if (flags & LIGHTREC_EXIT_SYSCALL)
525 psxException(R3000E_Syscall << 2, 0, (psxCP0Regs *)regs->cp0);
526 else if (flags & LIGHTREC_EXIT_UNKNOWN_OP) {
527 u32 op = intFakeFetch(psxRegs.pc);
528 u32 hlec = op & 0x03ffffff;
529 if ((op >> 26) == 0x3b && hlec < ARRAY_SIZE(psxHLEt) && Config.HLE) {
530 lightrec_plugin_sync_regs_to_pcsx(0);
532 lightrec_plugin_sync_regs_from_pcsx(0);
535 psxException(R3000E_RI << 2, 0, (psxCP0Regs *)regs->cp0);
539 if ((regs->cp0[13] & regs->cp0[12] & 0x300) && (regs->cp0[12] & 0x1)) {
540 /* Handle software interrupts */
541 regs->cp0[13] &= ~0x7c;
542 psxException(regs->cp0[13], 0, (psxCP0Regs *)regs->cp0);
546 static void lightrec_plugin_execute(void)
551 lightrec_plugin_execute_internal(false);
554 static void lightrec_plugin_execute_block(enum blockExecCaller caller)
556 lightrec_plugin_execute_internal(true);
559 static void lightrec_plugin_clear(u32 addr, u32 size)
561 if (addr == 0 && size == UINT32_MAX)
562 lightrec_invalidate_all(lightrec_state);
564 /* size * 4: PCSX uses DMA units */
565 lightrec_invalidate(lightrec_state, addr, size * 4);
568 static void lightrec_plugin_notify(enum R3000Anote note, void *data)
572 case R3000ACPU_NOTIFY_CACHE_ISOLATED:
573 case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
574 /* not used, lightrec calls lightrec_enable_ram() instead */
576 case R3000ACPU_NOTIFY_BEFORE_SAVE:
577 /* non-null 'data' means this is HLE related sync */
578 lightrec_plugin_sync_regs_to_pcsx(data == NULL);
580 case R3000ACPU_NOTIFY_AFTER_LOAD:
581 lightrec_plugin_sync_regs_from_pcsx(data == NULL);
583 lightrec_invalidate_all(lightrec_state);
588 static void lightrec_plugin_apply_config()
590 u32 cycle_mult = Config.cycle_multiplier_override && Config.cycle_multiplier == CYCLE_MULT_DEFAULT
591 ? Config.cycle_multiplier_override : Config.cycle_multiplier;
594 lightrec_set_cycles_per_opcode(lightrec_state, cycle_mult * 1024 / 100);
597 static void lightrec_plugin_shutdown(void)
599 lightrec_destroy(lightrec_state);
601 if (!LIGHTREC_CUSTOM_MAP) {
603 munmap(code_buffer, CODE_BUFFER_SIZE);
610 static void lightrec_plugin_reset(void)
612 struct lightrec_registers *regs;
614 regs = lightrec_get_registers(lightrec_state);
616 /* Invalidate all blocks */
617 lightrec_invalidate_all(lightrec_state);
619 /* Reset registers */
620 memset(regs, 0, sizeof(*regs));
622 regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
623 regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
626 static void lightrec_plugin_sync_regs_from_pcsx(bool need_cp2)
628 struct lightrec_registers *regs;
630 regs = lightrec_get_registers(lightrec_state);
631 memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
632 memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0));
634 memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c));
637 static void lightrec_plugin_sync_regs_to_pcsx(bool need_cp2)
639 struct lightrec_registers *regs;
641 regs = lightrec_get_registers(lightrec_state);
642 memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
643 memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0));
645 memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c));
650 lightrec_plugin_init,
651 lightrec_plugin_reset,
652 lightrec_plugin_execute,
653 lightrec_plugin_execute_block,
654 lightrec_plugin_clear,
655 lightrec_plugin_notify,
656 lightrec_plugin_apply_config,
657 lightrec_plugin_shutdown,