11 #include "../psxdma.h"
13 #include "../psxmem.h"
14 #include "../r3000a.h"
16 #include "../frontend/main.h"
21 #if (defined(__arm__) || defined(__aarch64__)) && !defined(ALLOW_LIGHTREC_ON_ARM)
22 #error "Lightrec should not be used on ARM (please specify DYNAREC=ari64 to make)"
25 #define ARRAY_SIZE(x) (sizeof(x) ? sizeof(x) / sizeof((x)[0]) : 0)
27 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
28 # define LE32TOH(x) __builtin_bswap32(x)
29 # define HTOLE32(x) __builtin_bswap32(x)
30 # define LE16TOH(x) __builtin_bswap16(x)
31 # define HTOLE16(x) __builtin_bswap16(x)
33 # define LE32TOH(x) (x)
34 # define HTOLE32(x) (x)
35 # define LE16TOH(x) (x)
36 # define HTOLE16(x) (x)
40 # define likely(x) __builtin_expect(!!(x),1)
41 # define unlikely(x) __builtin_expect(!!(x),0)
43 # define likely(x) (x)
44 # define unlikely(x) (x)
50 static struct lightrec_state *lightrec_state;
52 static char *name = "retroarch.exe";
54 static bool use_lightrec_interpreter;
55 static bool use_pcsx_interpreter;
83 static void (*cp2_ops[])(struct psxCP2Regs *) = {
84 [OP_CP2_RTPS] = gteRTPS,
85 [OP_CP2_RTPS] = gteRTPS,
86 [OP_CP2_NCLIP] = gteNCLIP,
88 [OP_CP2_DPCS] = gteDPCS,
89 [OP_CP2_INTPL] = gteINTPL,
90 [OP_CP2_MVMVA] = gteMVMVA,
91 [OP_CP2_NCDS] = gteNCDS,
92 [OP_CP2_CDP] = gteCDP,
93 [OP_CP2_NCDT] = gteNCDT,
94 [OP_CP2_NCCS] = gteNCCS,
96 [OP_CP2_NCS] = gteNCS,
97 [OP_CP2_NCT] = gteNCT,
98 [OP_CP2_SQR] = gteSQR,
99 [OP_CP2_DCPL] = gteDCPL,
100 [OP_CP2_DPCT] = gteDPCT,
101 [OP_CP2_AVSZ3] = gteAVSZ3,
102 [OP_CP2_AVSZ4] = gteAVSZ4,
103 [OP_CP2_RTPT] = gteRTPT,
104 [OP_CP2_GPF] = gteGPF,
105 [OP_CP2_GPL] = gteGPL,
106 [OP_CP2_NCCT] = gteNCCT,
109 static char cache_buf[64 * 1024];
111 static void cop2_op(struct lightrec_state *state, u32 func)
113 struct lightrec_registers *regs = lightrec_get_registers(state);
117 if (unlikely(!cp2_ops[func & 0x3f])) {
118 fprintf(stderr, "Invalid CP2 function %u\n", func);
120 /* This works because regs->cp2c comes right after regs->cp2d,
121 * so it can be cast to a pcsxCP2Regs pointer. */
122 cp2_ops[func & 0x3f]((psxCP2Regs *) regs->cp2d);
126 static bool has_interrupt(void)
128 struct lightrec_registers *regs = lightrec_get_registers(lightrec_state);
130 return ((psxHu32(0x1070) & psxHu32(0x1074)) &&
131 (regs->cp0[12] & 0x401) == 0x401) ||
132 (regs->cp0[12] & regs->cp0[13] & 0x0300);
135 static void lightrec_restore_state(struct lightrec_state *state)
137 lightrec_reset_cycle_count(state, psxRegs.cycle);
139 if (booting || has_interrupt())
140 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
142 lightrec_set_target_cycle_count(state, next_interupt);
145 static void hw_write_byte(struct lightrec_state *state,
146 u32 op, void *host, u32 mem, u8 val)
148 psxRegs.cycle = lightrec_current_cycle_count(state);
150 psxHwWrite8(mem, val);
152 lightrec_restore_state(state);
155 static void hw_write_half(struct lightrec_state *state,
156 u32 op, void *host, u32 mem, u16 val)
158 psxRegs.cycle = lightrec_current_cycle_count(state);
160 psxHwWrite16(mem, val);
162 lightrec_restore_state(state);
165 static void hw_write_word(struct lightrec_state *state,
166 u32 op, void *host, u32 mem, u32 val)
168 psxRegs.cycle = lightrec_current_cycle_count(state);
170 psxHwWrite32(mem, val);
172 lightrec_restore_state(state);
175 static u8 hw_read_byte(struct lightrec_state *state, u32 op, void *host, u32 mem)
179 psxRegs.cycle = lightrec_current_cycle_count(state);
181 val = psxHwRead8(mem);
183 lightrec_restore_state(state);
188 static u16 hw_read_half(struct lightrec_state *state,
189 u32 op, void *host, u32 mem)
193 psxRegs.cycle = lightrec_current_cycle_count(state);
195 val = psxHwRead16(mem);
197 lightrec_restore_state(state);
202 static u32 hw_read_word(struct lightrec_state *state,
203 u32 op, void *host, u32 mem)
207 psxRegs.cycle = lightrec_current_cycle_count(state);
209 val = psxHwRead32(mem);
211 lightrec_restore_state(state);
216 static struct lightrec_mem_map_ops hw_regs_ops = {
225 static u32 cache_ctrl;
227 static void cache_ctrl_write_word(struct lightrec_state *state,
228 u32 op, void *host, u32 mem, u32 val)
233 static u32 cache_ctrl_read_word(struct lightrec_state *state,
234 u32 op, void *host, u32 mem)
239 static struct lightrec_mem_map_ops cache_ctrl_ops = {
240 .sw = cache_ctrl_write_word,
241 .lw = cache_ctrl_read_word,
244 static struct lightrec_mem_map lightrec_map[] = {
245 [PSX_MAP_KERNEL_USER_RAM] = {
246 /* Kernel and user memory */
255 [PSX_MAP_SCRATCH_PAD] = {
260 [PSX_MAP_PARALLEL_PORT] = {
265 [PSX_MAP_HW_REGISTERS] = {
266 /* Hardware registers */
271 [PSX_MAP_CACHE_CONTROL] = {
275 .ops = &cache_ctrl_ops,
278 /* Mirrors of the kernel/user memory */
279 [PSX_MAP_MIRROR1] = {
282 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
284 [PSX_MAP_MIRROR2] = {
287 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
289 [PSX_MAP_MIRROR3] = {
292 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
294 [PSX_MAP_CODE_BUFFER] = {
295 .length = CODE_BUFFER_SIZE,
299 static void lightrec_enable_ram(struct lightrec_state *state, bool enable)
302 memcpy(psxM, cache_buf, sizeof(cache_buf));
304 memcpy(cache_buf, psxM, sizeof(cache_buf));
307 static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size)
347 return kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
378 return !is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
383 static const struct lightrec_ops lightrec_ops = {
385 .enable_ram = lightrec_enable_ram,
386 .hw_direct = lightrec_can_hw_direct,
389 static int lightrec_plugin_init(void)
391 lightrec_map[PSX_MAP_KERNEL_USER_RAM].address = psxM;
392 lightrec_map[PSX_MAP_BIOS].address = psxR;
393 lightrec_map[PSX_MAP_SCRATCH_PAD].address = psxH;
394 lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000;
395 lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP;
397 if (LIGHTREC_CUSTOM_MAP) {
398 lightrec_map[PSX_MAP_MIRROR1].address = psxM + 0x200000;
399 lightrec_map[PSX_MAP_MIRROR2].address = psxM + 0x400000;
400 lightrec_map[PSX_MAP_MIRROR3].address = psxM + 0x600000;
401 lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
404 use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER");
406 lightrec_state = lightrec_init(name,
407 lightrec_map, ARRAY_SIZE(lightrec_map),
410 // fprintf(stderr, "M=0x%lx, P=0x%lx, R=0x%lx, H=0x%lx\n",
414 // (uintptr_t) psxH);
417 signal(SIGPIPE, exit);
422 static void lightrec_dump_regs(struct lightrec_state *state)
424 struct lightrec_registers *regs = lightrec_get_registers(state);
426 if (unlikely(booting))
427 memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
428 psxRegs.CP0.n.Status = regs->cp0[12];
429 psxRegs.CP0.n.Cause = regs->cp0[13];
432 static void lightrec_restore_regs(struct lightrec_state *state)
434 struct lightrec_registers *regs = lightrec_get_registers(state);
436 if (unlikely(booting))
437 memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
438 regs->cp0[12] = psxRegs.CP0.n.Status;
439 regs->cp0[13] = psxRegs.CP0.n.Cause;
440 regs->cp0[14] = psxRegs.CP0.n.EPC;
443 extern void intExecuteBlock();
444 extern void gen_interupt();
446 static void lightrec_plugin_execute_block(void)
448 u32 old_pc = psxRegs.pc;
453 // step during early boot so that 0x80030000 fastboot hack works
455 next_interupt = psxRegs.cycle;
457 if (use_pcsx_interpreter) {
460 lightrec_reset_cycle_count(lightrec_state, psxRegs.cycle);
461 lightrec_restore_regs(lightrec_state);
463 if (unlikely(use_lightrec_interpreter)) {
464 psxRegs.pc = lightrec_run_interpreter(lightrec_state,
468 psxRegs.pc = lightrec_execute(lightrec_state,
469 psxRegs.pc, next_interupt);
472 psxRegs.cycle = lightrec_current_cycle_count(lightrec_state);
474 lightrec_dump_regs(lightrec_state);
475 flags = lightrec_exit_flags(lightrec_state);
477 if (flags & LIGHTREC_EXIT_SEGFAULT) {
478 fprintf(stderr, "Exiting at cycle 0x%08x\n",
483 if (flags & LIGHTREC_EXIT_SYSCALL)
484 psxException(0x20, 0);
486 if (booting && (psxRegs.pc & 0xff800000) == 0x80000000)
490 if ((psxRegs.CP0.n.Cause & psxRegs.CP0.n.Status & 0x300) &&
491 (psxRegs.CP0.n.Status & 0x1)) {
492 /* Handle software interrupts */
493 psxRegs.CP0.n.Cause &= ~0x7c;
494 psxException(psxRegs.CP0.n.Cause, 0);
498 static void lightrec_plugin_execute(void)
503 lightrec_plugin_execute_block();
506 static void lightrec_plugin_clear(u32 addr, u32 size)
508 if (addr == 0 && size == UINT32_MAX)
509 lightrec_invalidate_all(lightrec_state);
511 /* size * 4: PCSX uses DMA units */
512 lightrec_invalidate(lightrec_state, addr, size * 4);
515 static void lightrec_plugin_notify(int note, void *data)
518 To change once proper icache emulation is emulated
521 case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
522 lightrec_plugin_clear(0, 0x200000/4);
524 case R3000ACPU_NOTIFY_CACHE_ISOLATED:
525 // Sent from psxDma3().
526 case R3000ACPU_NOTIFY_DMA3_EXE_LOAD:
532 static void lightrec_plugin_apply_config()
536 static void lightrec_plugin_shutdown(void)
538 lightrec_destroy(lightrec_state);
541 static void lightrec_plugin_reset(void)
543 struct lightrec_registers *regs;
545 regs = lightrec_get_registers(lightrec_state);
547 /* Invalidate all blocks */
548 lightrec_invalidate_all(lightrec_state);
550 /* Reset registers */
551 memset(regs, 0, sizeof(*regs));
553 regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
554 regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
559 void lightrec_plugin_prepare_load_state(void)
561 struct lightrec_registers *regs;
563 regs = lightrec_get_registers(lightrec_state);
564 memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c));
565 memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0));
566 memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
568 lightrec_invalidate_all(lightrec_state);
571 void lightrec_plugin_prepare_save_state(void)
573 struct lightrec_registers *regs;
575 regs = lightrec_get_registers(lightrec_state);
576 memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c));
577 memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0));
578 memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
583 lightrec_plugin_init,
584 lightrec_plugin_reset,
585 lightrec_plugin_execute,
586 lightrec_plugin_execute_block,
587 lightrec_plugin_clear,
588 lightrec_plugin_notify,
589 lightrec_plugin_apply_config,
590 lightrec_plugin_shutdown,