1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus/PCSX - assem_arm.c *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2021 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
26 #include "../gte_arm.h"
27 #include "../gte_neon.h"
29 #include "arm_features.h"
32 #define CALLER_SAVE_REGS 0x100f
34 #define CALLER_SAVE_REGS 0x120f
37 #define unused __attribute__((unused))
40 #pragma GCC diagnostic ignored "-Wunused-function"
41 #pragma GCC diagnostic ignored "-Wunused-variable"
42 #pragma GCC diagnostic ignored "-Wunused-but-set-variable"
45 void indirect_jump_indexed();
58 void jump_vaddr_r10();
59 void jump_vaddr_r12();
61 void * const jump_vaddr_reg[16] = {
80 void invalidate_addr_r0();
81 void invalidate_addr_r1();
82 void invalidate_addr_r2();
83 void invalidate_addr_r3();
84 void invalidate_addr_r4();
85 void invalidate_addr_r5();
86 void invalidate_addr_r6();
87 void invalidate_addr_r7();
88 void invalidate_addr_r8();
89 void invalidate_addr_r9();
90 void invalidate_addr_r10();
91 void invalidate_addr_r12();
93 const u_int invalidate_addr_reg[16] = {
94 (int)invalidate_addr_r0,
95 (int)invalidate_addr_r1,
96 (int)invalidate_addr_r2,
97 (int)invalidate_addr_r3,
98 (int)invalidate_addr_r4,
99 (int)invalidate_addr_r5,
100 (int)invalidate_addr_r6,
101 (int)invalidate_addr_r7,
102 (int)invalidate_addr_r8,
103 (int)invalidate_addr_r9,
104 (int)invalidate_addr_r10,
106 (int)invalidate_addr_r12,
111 static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
115 static void set_jump_target(void *addr, void *target_)
117 u_int target = (u_int)target_;
119 u_int *ptr2=(u_int *)ptr;
121 assert((target-(u_int)ptr2-8)<1024);
122 assert(((uintptr_t)addr&3)==0);
123 assert((target&3)==0);
124 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
125 //printf("target=%x addr=%p insn=%x\n",target,addr,*ptr2);
127 else if(ptr[3]==0x72) {
128 // generated by emit_jno_unlikely
129 if((target-(u_int)ptr2-8)<1024) {
130 assert(((uintptr_t)addr&3)==0);
131 assert((target&3)==0);
132 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
134 else if((target-(u_int)ptr2-8)<4096&&!((target-(u_int)ptr2-8)&15)) {
135 assert(((uintptr_t)addr&3)==0);
136 assert((target&3)==0);
137 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>4)|0xE00;
139 else *ptr2=(0x7A000000)|(((target-(u_int)ptr2-8)<<6)>>8);
142 assert((ptr[3]&0x0e)==0xa);
143 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
147 // This optionally copies the instruction from the target of the branch into
148 // the space before the branch. Works, but the difference in speed is
149 // usually insignificant.
151 static void set_jump_target_fillslot(int addr,u_int target,int copy)
153 u_char *ptr=(u_char *)addr;
154 u_int *ptr2=(u_int *)ptr;
155 assert(!copy||ptr2[-1]==0xe28dd000);
158 assert((target-(u_int)ptr2-8)<4096);
159 *ptr2=(*ptr2&0xFFFFF000)|(target-(u_int)ptr2-8);
162 assert((ptr[3]&0x0e)==0xa);
163 u_int target_insn=*(u_int *)target;
164 if((target_insn&0x0e100000)==0) { // ALU, no immediate, no flags
167 if((target_insn&0x0c100000)==0x04100000) { // Load
170 if(target_insn&0x08000000) {
174 ptr2[-1]=target_insn;
177 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
183 static void add_literal(int addr,int val)
185 assert(literalcount<sizeof(literals)/sizeof(literals[0]));
186 literals[literalcount][0]=addr;
187 literals[literalcount][1]=val;
191 // from a pointer to external jump stub (which was produced by emit_extjump2)
192 // find where the jumping insn is
193 static void *find_extjump_insn(void *stub)
195 int *ptr=(int *)(stub+4);
196 assert((*ptr&0x0fff0000)==0x059f0000); // ldr rx, [pc, #ofs]
197 u_int offset=*ptr&0xfff;
198 void **l_ptr=(void *)ptr+offset+8;
202 // find where external branch is liked to using addr of it's stub:
203 // get address that insn one after stub loads (dyna_linker arg1),
204 // treat it as a pointer to branch insn,
205 // return addr where that branch jumps to
206 static void *get_pointer(void *stub)
208 //printf("get_pointer(%x)\n",(int)stub);
209 int *i_ptr=find_extjump_insn(stub);
210 assert((*i_ptr&0x0f000000)==0x0a000000);
211 return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
214 // Find the "clean" entry point from a "dirty" entry point
215 // by skipping past the call to verify_code
216 static void *get_clean_addr(void *addr)
218 signed int *ptr = addr;
224 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
225 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
227 if((*ptr&0xFF000000)==0xea000000) {
228 return (char *)ptr+((*ptr<<8)>>6)+8; // follow jump
233 static int verify_dirty(const u_int *ptr)
237 // get from literal pool
238 assert((*ptr&0xFFFF0000)==0xe59f0000);
240 u_int source=*(u_int*)((void *)ptr+offset+8);
242 assert((*ptr&0xFFFF0000)==0xe59f0000);
244 u_int copy=*(u_int*)((void *)ptr+offset+8);
246 assert((*ptr&0xFFFF0000)==0xe59f0000);
248 u_int len=*(u_int*)((void *)ptr+offset+8);
253 assert((*ptr&0xFFF00000)==0xe3000000);
254 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
255 u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
256 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
259 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
260 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
261 //printf("verify_dirty: %x %x %x\n",source,copy,len);
262 return !memcmp((void *)source,(void *)copy,len);
265 // This doesn't necessarily find all clean entry points, just
266 // guarantees that it's not dirty
267 static int isclean(void *addr)
270 u_int *ptr=((u_int *)addr)+4;
272 u_int *ptr=((u_int *)addr)+6;
274 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
275 if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
276 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code) return 0;
277 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_ds) return 0;
281 // get source that block at addr was compiled from (host pointers)
282 static void get_bounds(void *addr, u_char **start, u_char **end)
287 // get from literal pool
288 assert((*ptr&0xFFFF0000)==0xe59f0000);
290 u_int source=*(u_int*)((void *)ptr+offset+8);
292 //assert((*ptr&0xFFFF0000)==0xe59f0000);
294 //u_int copy=*(u_int*)((void *)ptr+offset+8);
296 assert((*ptr&0xFFFF0000)==0xe59f0000);
298 u_int len=*(u_int*)((void *)ptr+offset+8);
303 assert((*ptr&0xFFF00000)==0xe3000000);
304 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
305 //u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
306 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
309 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
310 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
311 *start=(u_char *)source;
312 *end=(u_char *)source+len;
315 // Allocate a specific ARM register.
316 static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
321 // see if it's already allocated (and dealloc it)
322 for(n=0;n<HOST_REGS;n++)
324 if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {
325 dirty=(cur->dirty>>n)&1;
331 cur->dirty&=~(1<<hr);
332 cur->dirty|=dirty<<hr;
333 cur->isconst&=~(1<<hr);
336 // Alloc cycle count into dedicated register
337 static void alloc_cc(struct regstat *cur,int i)
339 alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
344 static unused char regname[16][4] = {
362 static void output_w32(u_int word)
364 *((u_int *)out)=word;
368 static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
373 return((rn<<16)|(rd<<12)|rm);
376 static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
381 assert((shift&1)==0);
382 return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
385 static u_int genimm(u_int imm,u_int *encoded)
393 *encoded=((i&30)<<7)|imm;
396 imm=(imm>>2)|(imm<<30);i-=2;
401 static void genimm_checked(u_int imm,u_int *encoded)
403 u_int ret=genimm(imm,encoded);
408 static u_int genjmp(u_int addr)
410 if (addr < 3) return 0; // a branch that will be patched later
411 int offset = addr-(int)out-8;
412 if (offset < -33554432 || offset >= 33554432) {
413 SysPrintf("genjmp: out of range: %08x\n", offset);
417 return ((u_int)offset>>2)&0xffffff;
420 static unused void emit_breakpoint(void)
422 assem_debug("bkpt #0\n");
423 //output_w32(0xe1200070);
424 output_w32(0xe7f001f0);
427 static void emit_mov(int rs,int rt)
429 assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
430 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
433 static void emit_movs(int rs,int rt)
435 assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
436 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
439 static void emit_add(int rs1,int rs2,int rt)
441 assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
442 output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
445 static void emit_adcs(int rs1,int rs2,int rt)
447 assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
448 output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
451 static void emit_neg(int rs, int rt)
453 assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
454 output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
457 static void emit_sub(int rs1,int rs2,int rt)
459 assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
460 output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
463 static void emit_zeroreg(int rt)
465 assem_debug("mov %s,#0\n",regname[rt]);
466 output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
469 static void emit_loadlp(u_int imm,u_int rt)
471 add_literal((int)out,imm);
472 assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
473 output_w32(0xe5900000|rd_rn_rm(rt,15,0));
476 static void emit_movw(u_int imm,u_int rt)
479 assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
480 output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
483 static void emit_movt(u_int imm,u_int rt)
485 assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
486 output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
489 static void emit_movimm(u_int imm,u_int rt)
492 if(genimm(imm,&armval)) {
493 assem_debug("mov %s,#%d\n",regname[rt],imm);
494 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
495 }else if(genimm(~imm,&armval)) {
496 assem_debug("mvn %s,#%d\n",regname[rt],imm);
497 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
498 }else if(imm<65536) {
500 assem_debug("mov %s,#%d\n",regname[rt],imm&0xFF00);
501 output_w32(0xe3a00000|rd_rn_imm_shift(rt,0,imm>>8,8));
502 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
503 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
511 emit_movw(imm&0x0000FFFF,rt);
512 emit_movt(imm&0xFFFF0000,rt);
517 static void emit_pcreladdr(u_int rt)
519 assem_debug("add %s,pc,#?\n",regname[rt]);
520 output_w32(0xe2800000|rd_rn_rm(rt,15,0));
523 static void emit_loadreg(int r, int hr)
526 SysPrintf("64bit load in 32bit mode!\n");
533 int addr = (int)&psxRegs.GPR.r[r];
535 //case HIREG: addr = &hi; break;
536 //case LOREG: addr = &lo; break;
537 case CCREG: addr = (int)&cycle_count; break;
538 case CSREG: addr = (int)&Status; break;
539 case INVCP: addr = (int)&invc_ptr; break;
540 default: assert(r < 34); break;
542 u_int offset = addr-(u_int)&dynarec_local;
544 assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
545 output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
549 static void emit_storereg(int r, int hr)
552 SysPrintf("64bit store in 32bit mode!\n");
556 int addr = (int)&psxRegs.GPR.r[r];
558 //case HIREG: addr = &hi; break;
559 //case LOREG: addr = &lo; break;
560 case CCREG: addr = (int)&cycle_count; break;
561 default: assert(r < 34); break;
563 u_int offset = addr-(u_int)&dynarec_local;
565 assem_debug("str %s,fp+%d\n",regname[hr],offset);
566 output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
569 static void emit_test(int rs, int rt)
571 assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
572 output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
575 static void emit_testimm(int rs,int imm)
578 assem_debug("tst %s,#%d\n",regname[rs],imm);
579 genimm_checked(imm,&armval);
580 output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
583 static void emit_testeqimm(int rs,int imm)
586 assem_debug("tsteq %s,$%d\n",regname[rs],imm);
587 genimm_checked(imm,&armval);
588 output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
591 static void emit_not(int rs,int rt)
593 assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
594 output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
597 static void emit_and(u_int rs1,u_int rs2,u_int rt)
599 assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
600 output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
603 static void emit_or(u_int rs1,u_int rs2,u_int rt)
605 assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
606 output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
609 static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
614 assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs],imm);
615 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
618 static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
623 assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm);
624 output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
627 static void emit_xor(u_int rs1,u_int rs2,u_int rt)
629 assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
630 output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
633 static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt)
635 assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm);
636 output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7));
639 static void emit_addimm(u_int rs,int imm,u_int rt)
645 if(genimm(imm,&armval)) {
646 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
647 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
648 }else if(genimm(-imm,&armval)) {
649 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
650 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
652 }else if(rt!=rs&&(u_int)imm<65536) {
653 emit_movw(imm&0x0000ffff,rt);
655 }else if(rt!=rs&&(u_int)-imm<65536) {
656 emit_movw(-imm&0x0000ffff,rt);
659 }else if((u_int)-imm<65536) {
660 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
661 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
662 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
663 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
666 int shift = (ffs(imm) - 1) & ~1;
667 int imm8 = imm & (0xff << shift);
668 genimm_checked(imm8,&armval);
669 assem_debug("add %s,%s,#0x%x\n",regname[rt],regname[rs],imm8);
670 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
677 else if(rs!=rt) emit_mov(rs,rt);
680 static void emit_addimm_and_set_flags(int imm,int rt)
682 assert(imm>-65536&&imm<65536);
684 if(genimm(imm,&armval)) {
685 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm);
686 output_w32(0xe2900000|rd_rn_rm(rt,rt,0)|armval);
687 }else if(genimm(-imm,&armval)) {
688 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],imm);
689 output_w32(0xe2500000|rd_rn_rm(rt,rt,0)|armval);
691 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF00);
692 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
693 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)>>8,8));
694 output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
696 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF00);
697 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
698 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm>>8,8));
699 output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
703 static void emit_addimm_no_flags(u_int imm,u_int rt)
705 emit_addimm(rt,imm,rt);
708 static void emit_addnop(u_int r)
711 assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
712 output_w32(0xe2800000|rd_rn_rm(r,r,0));
715 static void emit_andimm(int rs,int imm,int rt)
720 }else if(genimm(imm,&armval)) {
721 assem_debug("and %s,%s,#%d\n",regname[rt],regname[rs],imm);
722 output_w32(0xe2000000|rd_rn_rm(rt,rs,0)|armval);
723 }else if(genimm(~imm,&armval)) {
724 assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm);
725 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval);
726 }else if(imm==65535) {
728 assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]);
729 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF);
730 assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]);
731 output_w32(0xe3c00000|rd_rn_rm(rt,rt,0)|0x8FF);
733 assem_debug("uxth %s,%s\n",regname[rt],regname[rs]);
734 output_w32(0xe6ff0070|rd_rn_rm(rt,0,rs));
737 assert(imm>0&&imm<65535);
739 assem_debug("mov r14,#%d\n",imm&0xFF00);
740 output_w32(0xe3a00000|rd_rn_imm_shift(HOST_TEMPREG,0,imm>>8,8));
741 assem_debug("add r14,r14,#%d\n",imm&0xFF);
742 output_w32(0xe2800000|rd_rn_imm_shift(HOST_TEMPREG,HOST_TEMPREG,imm&0xff,0));
744 emit_movw(imm,HOST_TEMPREG);
746 assem_debug("and %s,%s,r14\n",regname[rt],regname[rs]);
747 output_w32(0xe0000000|rd_rn_rm(rt,rs,HOST_TEMPREG));
751 static void emit_orimm(int rs,int imm,int rt)
755 if(rs!=rt) emit_mov(rs,rt);
756 }else if(genimm(imm,&armval)) {
757 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm);
758 output_w32(0xe3800000|rd_rn_rm(rt,rs,0)|armval);
760 assert(imm>0&&imm<65536);
761 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
762 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
763 output_w32(0xe3800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
764 output_w32(0xe3800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
768 static void emit_xorimm(int rs,int imm,int rt)
772 if(rs!=rt) emit_mov(rs,rt);
773 }else if(genimm(imm,&armval)) {
774 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm);
775 output_w32(0xe2200000|rd_rn_rm(rt,rs,0)|armval);
777 assert(imm>0&&imm<65536);
778 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
779 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
780 output_w32(0xe2200000|rd_rn_imm_shift(rt,rs,imm>>8,8));
781 output_w32(0xe2200000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
785 static void emit_shlimm(int rs,u_int imm,int rt)
790 assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
791 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
794 static void emit_lsls_imm(int rs,int imm,int rt)
798 assem_debug("lsls %s,%s,#%d\n",regname[rt],regname[rs],imm);
799 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
802 static unused void emit_lslpls_imm(int rs,int imm,int rt)
806 assem_debug("lslpls %s,%s,#%d\n",regname[rt],regname[rs],imm);
807 output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
810 static void emit_shrimm(int rs,u_int imm,int rt)
814 assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
815 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
818 static void emit_sarimm(int rs,u_int imm,int rt)
822 assem_debug("asr %s,%s,#%d\n",regname[rt],regname[rs],imm);
823 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
826 static void emit_rorimm(int rs,u_int imm,int rt)
830 assem_debug("ror %s,%s,#%d\n",regname[rt],regname[rs],imm);
831 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
834 static void emit_signextend16(int rs,int rt)
837 emit_shlimm(rs,16,rt);
838 emit_sarimm(rt,16,rt);
840 assem_debug("sxth %s,%s\n",regname[rt],regname[rs]);
841 output_w32(0xe6bf0070|rd_rn_rm(rt,0,rs));
845 static void emit_signextend8(int rs,int rt)
848 emit_shlimm(rs,24,rt);
849 emit_sarimm(rt,24,rt);
851 assem_debug("sxtb %s,%s\n",regname[rt],regname[rs]);
852 output_w32(0xe6af0070|rd_rn_rm(rt,0,rs));
856 static void emit_shl(u_int rs,u_int shift,u_int rt)
862 assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
863 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
866 static void emit_shr(u_int rs,u_int shift,u_int rt)
871 assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
872 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
875 static void emit_sar(u_int rs,u_int shift,u_int rt)
880 assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
881 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
884 static unused void emit_orrshl(u_int rs,u_int shift,u_int rt)
889 assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
890 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
893 static unused void emit_orrshr(u_int rs,u_int shift,u_int rt)
898 assem_debug("orr %s,%s,%s,lsr %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
899 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
902 static void emit_cmpimm(int rs,int imm)
905 if(genimm(imm,&armval)) {
906 assem_debug("cmp %s,#%d\n",regname[rs],imm);
907 output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval);
908 }else if(genimm(-imm,&armval)) {
909 assem_debug("cmn %s,#%d\n",regname[rs],imm);
910 output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
913 emit_movimm(imm,HOST_TEMPREG);
914 assem_debug("cmp %s,r14\n",regname[rs]);
915 output_w32(0xe1500000|rd_rn_rm(0,rs,HOST_TEMPREG));
918 emit_movimm(-imm,HOST_TEMPREG);
919 assem_debug("cmn %s,r14\n",regname[rs]);
920 output_w32(0xe1700000|rd_rn_rm(0,rs,HOST_TEMPREG));
924 static void emit_cmovne_imm(int imm,int rt)
926 assem_debug("movne %s,#%d\n",regname[rt],imm);
928 genimm_checked(imm,&armval);
929 output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
932 static void emit_cmovl_imm(int imm,int rt)
934 assem_debug("movlt %s,#%d\n",regname[rt],imm);
936 genimm_checked(imm,&armval);
937 output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
940 static void emit_cmovb_imm(int imm,int rt)
942 assem_debug("movcc %s,#%d\n",regname[rt],imm);
944 genimm_checked(imm,&armval);
945 output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
948 static void emit_cmovae_imm(int imm,int rt)
950 assem_debug("movcs %s,#%d\n",regname[rt],imm);
952 genimm_checked(imm,&armval);
953 output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
956 static void emit_cmovne_reg(int rs,int rt)
958 assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
959 output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
962 static void emit_cmovl_reg(int rs,int rt)
964 assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
965 output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
968 static void emit_cmovs_reg(int rs,int rt)
970 assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
971 output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
974 static void emit_slti32(int rs,int imm,int rt)
976 if(rs!=rt) emit_zeroreg(rt);
978 if(rs==rt) emit_movimm(0,rt);
979 emit_cmovl_imm(1,rt);
982 static void emit_sltiu32(int rs,int imm,int rt)
984 if(rs!=rt) emit_zeroreg(rt);
986 if(rs==rt) emit_movimm(0,rt);
987 emit_cmovb_imm(1,rt);
990 static void emit_cmp(int rs,int rt)
992 assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
993 output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
996 static void emit_set_gz32(int rs, int rt)
998 //assem_debug("set_gz32\n");
1001 emit_cmovl_imm(0,rt);
1004 static void emit_set_nz32(int rs, int rt)
1006 //assem_debug("set_nz32\n");
1007 if(rs!=rt) emit_movs(rs,rt);
1008 else emit_test(rs,rs);
1009 emit_cmovne_imm(1,rt);
1012 static void emit_set_if_less32(int rs1, int rs2, int rt)
1014 //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1015 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1017 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1018 emit_cmovl_imm(1,rt);
1021 static void emit_set_if_carry32(int rs1, int rs2, int rt)
1023 //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1024 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1026 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1027 emit_cmovb_imm(1,rt);
1030 static int can_jump_or_call(const void *a)
1032 intptr_t offset = (u_char *)a - out - 8;
1033 return (-33554432 <= offset && offset < 33554432);
1036 static void emit_call(const void *a_)
1039 assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1040 u_int offset=genjmp(a);
1041 output_w32(0xeb000000|offset);
1044 static void emit_jmp(const void *a_)
1047 assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1048 u_int offset=genjmp(a);
1049 output_w32(0xea000000|offset);
1052 static void emit_jne(const void *a_)
1055 assem_debug("bne %x\n",a);
1056 u_int offset=genjmp(a);
1057 output_w32(0x1a000000|offset);
1060 static void emit_jeq(const void *a_)
1063 assem_debug("beq %x\n",a);
1064 u_int offset=genjmp(a);
1065 output_w32(0x0a000000|offset);
1068 static void emit_js(const void *a_)
1071 assem_debug("bmi %x\n",a);
1072 u_int offset=genjmp(a);
1073 output_w32(0x4a000000|offset);
1076 static void emit_jns(const void *a_)
1079 assem_debug("bpl %x\n",a);
1080 u_int offset=genjmp(a);
1081 output_w32(0x5a000000|offset);
1084 static void emit_jl(const void *a_)
1087 assem_debug("blt %x\n",a);
1088 u_int offset=genjmp(a);
1089 output_w32(0xba000000|offset);
1092 static void emit_jge(const void *a_)
1095 assem_debug("bge %x\n",a);
1096 u_int offset=genjmp(a);
1097 output_w32(0xaa000000|offset);
1100 static void emit_jno(const void *a_)
1103 assem_debug("bvc %x\n",a);
1104 u_int offset=genjmp(a);
1105 output_w32(0x7a000000|offset);
1108 static void emit_jc(const void *a_)
1111 assem_debug("bcs %x\n",a);
1112 u_int offset=genjmp(a);
1113 output_w32(0x2a000000|offset);
1116 static void emit_jcc(const void *a_)
1119 assem_debug("bcc %x\n",a);
1120 u_int offset=genjmp(a);
1121 output_w32(0x3a000000|offset);
1124 static unused void emit_callreg(u_int r)
1127 assem_debug("blx %s\n",regname[r]);
1128 output_w32(0xe12fff30|r);
1131 static void emit_jmpreg(u_int r)
1133 assem_debug("mov pc,%s\n",regname[r]);
1134 output_w32(0xe1a00000|rd_rn_rm(15,0,r));
1137 static void emit_ret(void)
1142 static void emit_readword_indexed(int offset, int rs, int rt)
1144 assert(offset>-4096&&offset<4096);
1145 assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
1147 output_w32(0xe5900000|rd_rn_rm(rt,rs,0)|offset);
1149 output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
1153 static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
1155 assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
1156 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
1159 static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
1161 assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1162 output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
1165 static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
1167 assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1168 output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
1171 static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
1173 assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1174 output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
1177 static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
1179 assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1180 output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
1183 static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
1185 assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1186 output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
1189 static void emit_movsbl_indexed(int offset, int rs, int rt)
1191 assert(offset>-256&&offset<256);
1192 assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
1194 output_w32(0xe1d000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1196 output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1200 static void emit_movswl_indexed(int offset, int rs, int rt)
1202 assert(offset>-256&&offset<256);
1203 assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
1205 output_w32(0xe1d000f0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1207 output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1211 static void emit_movzbl_indexed(int offset, int rs, int rt)
1213 assert(offset>-4096&&offset<4096);
1214 assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
1216 output_w32(0xe5d00000|rd_rn_rm(rt,rs,0)|offset);
1218 output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
1222 static void emit_movzwl_indexed(int offset, int rs, int rt)
1224 assert(offset>-256&&offset<256);
1225 assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
1227 output_w32(0xe1d000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1229 output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1233 static void emit_ldrd(int offset, int rs, int rt)
1235 assert(offset>-256&&offset<256);
1236 assem_debug("ldrd %s,%s+%d\n",regname[rt],regname[rs],offset);
1238 output_w32(0xe1c000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1240 output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1244 static void emit_readword(void *addr, int rt)
1246 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1247 assert(offset<4096);
1248 assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
1249 output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
1252 static void emit_writeword_indexed(int rt, int offset, int rs)
1254 assert(offset>-4096&&offset<4096);
1255 assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
1257 output_w32(0xe5800000|rd_rn_rm(rt,rs,0)|offset);
1259 output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
1263 static void emit_writehword_indexed(int rt, int offset, int rs)
1265 assert(offset>-256&&offset<256);
1266 assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
1268 output_w32(0xe1c000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1270 output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1274 static void emit_writebyte_indexed(int rt, int offset, int rs)
1276 assert(offset>-4096&&offset<4096);
1277 assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
1279 output_w32(0xe5c00000|rd_rn_rm(rt,rs,0)|offset);
1281 output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
1285 static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
1287 assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1288 output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
1291 static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
1293 assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1294 output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
1297 static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
1299 assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1300 output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
1303 static void emit_writeword(int rt, void *addr)
1305 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1306 assert(offset<4096);
1307 assem_debug("str %s,fp+%d\n",regname[rt],offset);
1308 output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
1311 static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1313 assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1318 output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1321 static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1323 assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1328 output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1331 static void emit_clz(int rs,int rt)
1333 assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
1334 output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
1337 static void emit_subcs(int rs1,int rs2,int rt)
1339 assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1340 output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
1343 static void emit_shrcc_imm(int rs,u_int imm,int rt)
1347 assem_debug("lsrcc %s,%s,#%d\n",regname[rt],regname[rs],imm);
1348 output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1351 static void emit_shrne_imm(int rs,u_int imm,int rt)
1355 assem_debug("lsrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1356 output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1359 static void emit_negmi(int rs, int rt)
1361 assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
1362 output_w32(0x42600000|rd_rn_rm(rt,rs,0));
1365 static void emit_negsmi(int rs, int rt)
1367 assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
1368 output_w32(0x42700000|rd_rn_rm(rt,rs,0));
1371 static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
1373 assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1374 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
1377 static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
1379 assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1380 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
1383 static void emit_teq(int rs, int rt)
1385 assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
1386 output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
1389 static unused void emit_rsbimm(int rs, int imm, int rt)
1392 genimm_checked(imm,&armval);
1393 assem_debug("rsb %s,%s,#%d\n",regname[rt],regname[rs],imm);
1394 output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
1397 // Conditionally select one of two immediates, optimizing for small code size
1398 // This will only be called if HAVE_CMOV_IMM is defined
1399 static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
1402 if(genimm(imm2-imm1,&armval)) {
1403 emit_movimm(imm1,rt);
1404 assem_debug("addne %s,%s,#%d\n",regname[rt],regname[rt],imm2-imm1);
1405 output_w32(0x12800000|rd_rn_rm(rt,rt,0)|armval);
1406 }else if(genimm(imm1-imm2,&armval)) {
1407 emit_movimm(imm1,rt);
1408 assem_debug("subne %s,%s,#%d\n",regname[rt],regname[rt],imm1-imm2);
1409 output_w32(0x12400000|rd_rn_rm(rt,rt,0)|armval);
1413 emit_movimm(imm1,rt);
1414 add_literal((int)out,imm2);
1415 assem_debug("ldrne %s,pc+? [=%x]\n",regname[rt],imm2);
1416 output_w32(0x15900000|rd_rn_rm(rt,15,0));
1418 emit_movw(imm1&0x0000FFFF,rt);
1419 if((imm1&0xFFFF)!=(imm2&0xFFFF)) {
1420 assem_debug("movwne %s,#%d (0x%x)\n",regname[rt],imm2&0xFFFF,imm2&0xFFFF);
1421 output_w32(0x13000000|rd_rn_rm(rt,0,0)|(imm2&0xfff)|((imm2<<4)&0xf0000));
1423 emit_movt(imm1&0xFFFF0000,rt);
1424 if((imm1&0xFFFF0000)!=(imm2&0xFFFF0000)) {
1425 assem_debug("movtne %s,#%d (0x%x)\n",regname[rt],imm2&0xffff0000,imm2&0xffff0000);
1426 output_w32(0x13400000|rd_rn_rm(rt,0,0)|((imm2>>16)&0xfff)|((imm2>>12)&0xf0000));
1432 // special case for checking invalid_code
1433 static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
1435 assert(imm<128&&imm>=0);
1437 assem_debug("ldrb lr,%s,%s lsr #12\n",regname[base],regname[r]);
1438 output_w32(0xe7d00000|rd_rn_rm(HOST_TEMPREG,base,r)|0x620);
1439 emit_cmpimm(HOST_TEMPREG,imm);
1442 static void emit_callne(int a)
1444 assem_debug("blne %x\n",a);
1445 u_int offset=genjmp(a);
1446 output_w32(0x1b000000|offset);
1449 // Used to preload hash table entries
1450 static unused void emit_prefetchreg(int r)
1452 assem_debug("pld %s\n",regname[r]);
1453 output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
1456 // Special case for mini_ht
1457 static void emit_ldreq_indexed(int rs, u_int offset, int rt)
1459 assert(offset<4096);
1460 assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
1461 output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
1464 static void emit_orrne_imm(int rs,int imm,int rt)
1467 genimm_checked(imm,&armval);
1468 assem_debug("orrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1469 output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
1472 static void emit_andne_imm(int rs,int imm,int rt)
1475 genimm_checked(imm,&armval);
1476 assem_debug("andne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1477 output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
1480 static unused void emit_addpl_imm(int rs,int imm,int rt)
1483 genimm_checked(imm,&armval);
1484 assem_debug("addpl %s,%s,#%d\n",regname[rt],regname[rs],imm);
1485 output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
1488 static void emit_jno_unlikely(int a)
1491 assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
1492 output_w32(0x72800000|rd_rn_rm(15,15,0));
1495 static void save_regs_all(u_int reglist)
1498 if(!reglist) return;
1499 assem_debug("stmia fp,{");
1502 assem_debug("r%d,",i);
1504 output_w32(0xe88b0000|reglist);
1507 static void restore_regs_all(u_int reglist)
1510 if(!reglist) return;
1511 assem_debug("ldmia fp,{");
1514 assem_debug("r%d,",i);
1516 output_w32(0xe89b0000|reglist);
1519 // Save registers before function call
1520 static void save_regs(u_int reglist)
1522 reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
1523 save_regs_all(reglist);
1526 // Restore registers after function call
1527 static void restore_regs(u_int reglist)
1529 reglist&=CALLER_SAVE_REGS;
1530 restore_regs_all(reglist);
1533 /* Stubs/epilogue */
1535 static void literal_pool(int n)
1537 if(!literalcount) return;
1539 if((int)out-literals[0][0]<4096-n) return;
1543 for(i=0;i<literalcount;i++)
1545 u_int l_addr=(u_int)out;
1548 if(literals[j][1]==literals[i][1]) {
1549 //printf("dup %08x\n",literals[i][1]);
1550 l_addr=literals[j][0];
1554 ptr=(u_int *)literals[i][0];
1555 u_int offset=l_addr-(u_int)ptr-8;
1556 assert(offset<4096);
1557 assert(!(offset&3));
1559 if(l_addr==(u_int)out) {
1560 literals[i][0]=l_addr; // remember for dupes
1561 output_w32(literals[i][1]);
1567 static void literal_pool_jumpover(int n)
1569 if(!literalcount) return;
1571 if((int)out-literals[0][0]<4096-n) return;
1576 set_jump_target(jaddr, out);
1579 // parsed by get_pointer, find_extjump_insn
1580 static void emit_extjump2(u_char *addr, u_int target, void *linker)
1582 u_char *ptr=(u_char *)addr;
1583 assert((ptr[3]&0x0e)==0xa);
1586 emit_loadlp(target,0);
1587 emit_loadlp((u_int)addr,1);
1588 assert(addr>=translation_cache&&addr<(translation_cache+(1<<TARGET_SIZE_2)));
1589 //assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
1591 #ifdef DEBUG_CYCLE_COUNT
1592 emit_readword(&last_count,ECX);
1593 emit_add(HOST_CCREG,ECX,HOST_CCREG);
1594 emit_readword(&next_interupt,ECX);
1595 emit_writeword(HOST_CCREG,&Count);
1596 emit_sub(HOST_CCREG,ECX,HOST_CCREG);
1597 emit_writeword(ECX,&last_count);
1600 emit_far_jump(linker);
1603 static void check_extjump2(void *src)
1606 assert((ptr[1] & 0x0fff0000) == 0x059f0000); // ldr rx, [pc, #ofs]
1610 // put rt_val into rt, potentially making use of rs with value rs_val
1611 static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
1615 if(genimm(rt_val,&armval)) {
1616 assem_debug("mov %s,#%d\n",regname[rt],rt_val);
1617 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
1620 if(genimm(~rt_val,&armval)) {
1621 assem_debug("mvn %s,#%d\n",regname[rt],rt_val);
1622 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
1626 if(genimm(diff,&armval)) {
1627 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],diff);
1628 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
1630 }else if(genimm(-diff,&armval)) {
1631 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-diff);
1632 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
1635 emit_movimm(rt_val,rt);
1638 // return 1 if above function can do it's job cheaply
1639 static int is_similar_value(u_int v1,u_int v2)
1643 if(v1==v2) return 1;
1645 for(xs=diff;xs!=0&&(xs&3)==0;xs>>=2)
1647 if(xs<0x100) return 1;
1648 for(xs=-diff;xs!=0&&(xs&3)==0;xs>>=2)
1650 if(xs<0x100) return 1;
1654 static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
1657 case LOADB_STUB: emit_signextend8(rs,rt); break;
1658 case LOADBU_STUB: emit_andimm(rs,0xff,rt); break;
1659 case LOADH_STUB: emit_signextend16(rs,rt); break;
1660 case LOADHU_STUB: emit_andimm(rs,0xffff,rt); break;
1661 case LOADW_STUB: if(rs!=rt) emit_mov(rs,rt); break;
1666 #include "pcsxmem.h"
1667 #include "pcsxmem_inline.c"
1669 static void do_readstub(int n)
1671 assem_debug("do_readstub %x\n",start+stubs[n].a*4);
1673 set_jump_target(stubs[n].addr, out);
1674 enum stub_type type=stubs[n].type;
1677 struct regstat *i_regs=(struct regstat *)stubs[n].c;
1678 u_int reglist=stubs[n].e;
1679 signed char *i_regmap=i_regs->regmap;
1681 if(itype[i]==C1LS||itype[i]==C2LS||itype[i]==LOADLR) {
1682 rt=get_reg(i_regmap,FTEMP);
1684 rt=get_reg(i_regmap,rt1[i]);
1687 int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1688 void *restore_jump = NULL;
1690 for(r=0;r<=12;r++) {
1691 if(((1<<r)&0x13ff)&&((1<<r)®list)==0) {
1695 if(rt>=0&&rt1[i]!=0)
1702 if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
1704 emit_readword(&mem_rtab,temp);
1705 emit_shrimm(rs,12,temp2);
1706 emit_readword_dualindexedx4(temp,temp2,temp2);
1707 emit_lsls_imm(temp2,1,temp2);
1708 if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
1710 case LOADB_STUB: emit_ldrccsb_dualindexed(temp2,rs,rt); break;
1711 case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
1712 case LOADH_STUB: emit_ldrccsh_dualindexed(temp2,rs,rt); break;
1713 case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
1714 case LOADW_STUB: emit_ldrcc_dualindexed(temp2,rs,rt); break;
1720 emit_jcc(0); // jump to reg restore
1723 emit_jcc(stubs[n].retaddr); // return address
1728 if(type==LOADB_STUB||type==LOADBU_STUB)
1729 handler=jump_handler_read8;
1730 if(type==LOADH_STUB||type==LOADHU_STUB)
1731 handler=jump_handler_read16;
1732 if(type==LOADW_STUB)
1733 handler=jump_handler_read32;
1735 pass_args(rs,temp2);
1736 int cc=get_reg(i_regmap,CCREG);
1738 emit_loadreg(CCREG,2);
1739 emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2);
1740 emit_far_call(handler);
1741 if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
1742 mov_loadtype_adj(type,0,rt);
1745 set_jump_target(restore_jump, out);
1746 restore_regs(reglist);
1747 emit_jmp(stubs[n].retaddr); // return address
1750 static void inline_readstub(enum stub_type type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
1752 int rs=get_reg(regmap,target);
1753 int rt=get_reg(regmap,target);
1754 if(rs<0) rs=get_reg(regmap,-1);
1757 uintptr_t host_addr = 0;
1759 int cc=get_reg(regmap,CCREG);
1760 if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj+1),cc,target?rs:-1,rt))
1762 handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
1763 if (handler == NULL) {
1767 emit_movimm_from(addr,rs,host_addr,rs);
1769 case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
1770 case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
1771 case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
1772 case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
1773 case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
1778 is_dynamic=pcsxmem_is_handler_dynamic(addr);
1780 if(type==LOADB_STUB||type==LOADBU_STUB)
1781 handler=jump_handler_read8;
1782 if(type==LOADH_STUB||type==LOADHU_STUB)
1783 handler=jump_handler_read16;
1784 if(type==LOADW_STUB)
1785 handler=jump_handler_read32;
1788 // call a memhandler
1789 if(rt>=0&&rt1[i]!=0)
1793 emit_movimm(addr,0);
1797 emit_loadreg(CCREG,2);
1799 emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
1800 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
1803 emit_readword(&last_count,3);
1804 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
1806 emit_writeword(2,&Count);
1809 emit_far_call(handler);
1811 if(rt>=0&&rt1[i]!=0) {
1813 case LOADB_STUB: emit_signextend8(0,rt); break;
1814 case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
1815 case LOADH_STUB: emit_signextend16(0,rt); break;
1816 case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
1817 case LOADW_STUB: if(rt!=0) emit_mov(0,rt); break;
1821 restore_regs(reglist);
1824 static void do_writestub(int n)
1826 assem_debug("do_writestub %x\n",start+stubs[n].a*4);
1828 set_jump_target(stubs[n].addr, out);
1829 enum stub_type type=stubs[n].type;
1832 struct regstat *i_regs=(struct regstat *)stubs[n].c;
1833 u_int reglist=stubs[n].e;
1834 signed char *i_regmap=i_regs->regmap;
1836 if(itype[i]==C1LS||itype[i]==C2LS) {
1837 rt=get_reg(i_regmap,r=FTEMP);
1839 rt=get_reg(i_regmap,r=rs2[i]);
1843 int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1844 void *restore_jump = NULL;
1845 int reglist2=reglist|(1<<rs)|(1<<rt);
1846 for(rtmp=0;rtmp<=12;rtmp++) {
1847 if(((1<<rtmp)&0x13ff)&&((1<<rtmp)®list2)==0) {
1854 for(rtmp=0;rtmp<=3;rtmp++)
1855 if(rtmp!=rs&&rtmp!=rt)
1858 if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
1860 emit_readword(&mem_wtab,temp);
1861 emit_shrimm(rs,12,temp2);
1862 emit_readword_dualindexedx4(temp,temp2,temp2);
1863 emit_lsls_imm(temp2,1,temp2);
1865 case STOREB_STUB: emit_strccb_dualindexed(temp2,rs,rt); break;
1866 case STOREH_STUB: emit_strcch_dualindexed(temp2,rs,rt); break;
1867 case STOREW_STUB: emit_strcc_dualindexed(temp2,rs,rt); break;
1872 emit_jcc(0); // jump to reg restore
1875 emit_jcc(stubs[n].retaddr); // return address (invcode check)
1881 case STOREB_STUB: handler=jump_handler_write8; break;
1882 case STOREH_STUB: handler=jump_handler_write16; break;
1883 case STOREW_STUB: handler=jump_handler_write32; break;
1890 int cc=get_reg(i_regmap,CCREG);
1892 emit_loadreg(CCREG,2);
1893 emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2);
1894 // returns new cycle_count
1895 emit_far_call(handler);
1896 emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d+1),cc<0?2:cc);
1898 emit_storereg(CCREG,2);
1900 set_jump_target(restore_jump, out);
1901 restore_regs(reglist);
1902 emit_jmp(stubs[n].retaddr);
1905 static void inline_writestub(enum stub_type type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
1907 int rs=get_reg(regmap,-1);
1908 int rt=get_reg(regmap,target);
1911 uintptr_t host_addr = 0;
1912 void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
1913 if (handler == NULL) {
1915 emit_movimm_from(addr,rs,host_addr,rs);
1917 case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
1918 case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
1919 case STOREW_STUB: emit_writeword_indexed(rt,0,rs); break;
1925 // call a memhandler
1928 int cc=get_reg(regmap,CCREG);
1930 emit_loadreg(CCREG,2);
1931 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
1932 emit_movimm((u_int)handler,3);
1933 // returns new cycle_count
1934 emit_far_call(jump_handler_write_h);
1935 emit_addimm(0,-CLOCK_ADJUST(adj+1),cc<0?2:cc);
1937 emit_storereg(CCREG,2);
1938 restore_regs(reglist);
1941 // this output is parsed by verify_dirty, get_bounds, isclean, get_clean_addr
1942 static void do_dirty_stub_emit_args(u_int arg0)
1945 emit_loadlp((int)source, 1);
1946 emit_loadlp((int)copy, 2);
1947 emit_loadlp(slen*4, 3);
1949 emit_movw(((u_int)source)&0x0000FFFF, 1);
1950 emit_movw(((u_int)copy)&0x0000FFFF, 2);
1951 emit_movt(((u_int)source)&0xFFFF0000, 1);
1952 emit_movt(((u_int)copy)&0xFFFF0000, 2);
1953 emit_movw(slen*4, 3);
1955 emit_movimm(arg0, 0);
1958 static void *do_dirty_stub(int i)
1960 assem_debug("do_dirty_stub %x\n",start+i*4);
1961 do_dirty_stub_emit_args(start + i*4);
1962 emit_far_call(verify_code);
1966 entry = instr_addr[i];
1967 emit_jmp(instr_addr[i]);
1971 static void do_dirty_stub_ds()
1973 do_dirty_stub_emit_args(start + 1);
1974 emit_far_call(verify_code_ds);
1979 static void c2op_prologue(u_int op,u_int reglist)
1981 save_regs_all(reglist);
1984 emit_far_call(pcnt_gte_start);
1986 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); // cop2 regs
1989 static void c2op_epilogue(u_int op,u_int reglist)
1993 emit_far_call(pcnt_gte_end);
1995 restore_regs_all(reglist);
1998 static void c2op_call_MACtoIR(int lm,int need_flags)
2001 emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
2003 emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
2006 static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
2008 emit_far_call(func);
2009 // func is C code and trashes r0
2010 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2011 if(need_flags||need_ir)
2012 c2op_call_MACtoIR(lm,need_flags);
2013 emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
2016 static void c2op_assemble(int i,struct regstat *i_regs)
2018 u_int c2op=source[i]&0x3f;
2019 u_int hr,reglist_full=0,reglist;
2020 int need_flags,need_ir;
2021 for(hr=0;hr<HOST_REGS;hr++) {
2022 if(i_regs->regmap[hr]>=0) reglist_full|=1<<hr;
2024 reglist=reglist_full&CALLER_SAVE_REGS;
2026 if (gte_handlers[c2op]!=NULL) {
2027 need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
2028 need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
2029 assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
2030 source[i],gte_unneeded[i+1],need_flags,need_ir);
2031 if(new_dynarec_hacks&NDHACK_GTE_NO_FLAGS)
2033 int shift = (source[i] >> 19) & 1;
2034 int lm = (source[i] >> 10) & 1;
2039 int v = (source[i] >> 15) & 3;
2040 int cv = (source[i] >> 13) & 3;
2041 int mx = (source[i] >> 17) & 3;
2042 reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
2043 c2op_prologue(c2op,reglist);
2044 /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
2048 emit_movzwl_indexed(9*4,0,4); // gteIR
2049 emit_movzwl_indexed(10*4,0,6);
2050 emit_movzwl_indexed(11*4,0,5);
2051 emit_orrshl_imm(6,16,4);
2054 emit_addimm(0,32*4+mx*8*4,6);
2056 emit_readword(&zeromem_ptr,6);
2058 emit_addimm(0,32*4+(cv*8+5)*4,7);
2060 emit_readword(&zeromem_ptr,7);
2062 emit_movimm(source[i],1); // opcode
2063 emit_far_call(gteMVMVA_part_neon);
2066 emit_far_call(gteMACtoIR_flags_neon);
2070 emit_far_call((int)gteMVMVA_part_cv3sh12_arm);
2072 emit_movimm(shift,1);
2073 emit_far_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm));
2075 if(need_flags||need_ir)
2076 c2op_call_MACtoIR(lm,need_flags);
2078 #else /* if not HAVE_ARMV5 */
2079 c2op_prologue(c2op,reglist);
2080 emit_movimm(source[i],1); // opcode
2081 emit_writeword(1,&psxRegs.code);
2082 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2087 c2op_prologue(c2op,reglist);
2088 emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift);
2089 if(need_flags||need_ir) {
2090 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2091 c2op_call_MACtoIR(lm,need_flags);
2095 c2op_prologue(c2op,reglist);
2096 c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
2099 c2op_prologue(c2op,reglist);
2100 c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
2103 c2op_prologue(c2op,reglist);
2104 emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
2105 if(need_flags||need_ir) {
2106 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2107 c2op_call_MACtoIR(lm,need_flags);
2111 c2op_prologue(c2op,reglist);
2112 c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
2115 c2op_prologue(c2op,reglist);
2116 c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
2119 c2op_prologue(c2op,reglist);
2120 c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
2124 c2op_prologue(c2op,reglist);
2126 emit_movimm(source[i],1); // opcode
2127 emit_writeword(1,&psxRegs.code);
2129 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2132 c2op_epilogue(c2op,reglist);
2136 static void c2op_ctc2_31_assemble(signed char sl, signed char temp)
2138 //value = value & 0x7ffff000;
2139 //if (value & 0x7f87e000) value |= 0x80000000;
2140 emit_shrimm(sl,12,temp);
2141 emit_shlimm(temp,12,temp);
2142 emit_testimm(temp,0x7f000000);
2143 emit_testeqimm(temp,0x00870000);
2144 emit_testeqimm(temp,0x0000e000);
2145 emit_orrne_imm(temp,0x80000000,temp);
2148 static void do_mfc2_31_one(u_int copr,signed char temp)
2150 emit_readword(®_cop2d[copr],temp);
2151 emit_testimm(temp,0x8000); // do we need this?
2152 emit_andne_imm(temp,0,temp);
2153 emit_cmpimm(temp,0xf80);
2154 emit_andimm(temp,0xf80,temp);
2155 emit_cmovae_imm(0xf80,temp);
2158 static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
2161 host_tempreg_acquire();
2162 temp = HOST_TEMPREG;
2164 do_mfc2_31_one(9,temp);
2165 emit_shrimm(temp,7,tl);
2166 do_mfc2_31_one(10,temp);
2167 emit_orrshr_imm(temp,2,tl);
2168 do_mfc2_31_one(11,temp);
2169 emit_orrshl_imm(temp,3,tl);
2170 emit_writeword(tl,®_cop2d[29]);
2171 if (temp == HOST_TEMPREG)
2172 host_tempreg_release();
2175 static void multdiv_assemble_arm(int i,struct regstat *i_regs)
2182 // case 0x1D: DMULTU
2187 if((opcode2[i]&4)==0) // 32-bit
2189 if(opcode2[i]==0x18) // MULT
2191 signed char m1=get_reg(i_regs->regmap,rs1[i]);
2192 signed char m2=get_reg(i_regs->regmap,rs2[i]);
2193 signed char hi=get_reg(i_regs->regmap,HIREG);
2194 signed char lo=get_reg(i_regs->regmap,LOREG);
2199 emit_smull(m1,m2,hi,lo);
2201 if(opcode2[i]==0x19) // MULTU
2203 signed char m1=get_reg(i_regs->regmap,rs1[i]);
2204 signed char m2=get_reg(i_regs->regmap,rs2[i]);
2205 signed char hi=get_reg(i_regs->regmap,HIREG);
2206 signed char lo=get_reg(i_regs->regmap,LOREG);
2211 emit_umull(m1,m2,hi,lo);
2213 if(opcode2[i]==0x1A) // DIV
2215 signed char d1=get_reg(i_regs->regmap,rs1[i]);
2216 signed char d2=get_reg(i_regs->regmap,rs2[i]);
2219 signed char quotient=get_reg(i_regs->regmap,LOREG);
2220 signed char remainder=get_reg(i_regs->regmap,HIREG);
2221 assert(quotient>=0);
2222 assert(remainder>=0);
2223 emit_movs(d1,remainder);
2224 emit_movimm(0xffffffff,quotient);
2225 emit_negmi(quotient,quotient); // .. quotient and ..
2226 emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
2227 emit_movs(d2,HOST_TEMPREG);
2228 emit_jeq(out+52); // Division by zero
2229 emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
2231 emit_clz(HOST_TEMPREG,quotient);
2232 emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG);
2234 emit_movimm(0,quotient);
2235 emit_addpl_imm(quotient,1,quotient);
2236 emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2239 emit_orimm(quotient,1<<31,quotient);
2240 emit_shr(quotient,quotient,quotient);
2241 emit_cmp(remainder,HOST_TEMPREG);
2242 emit_subcs(remainder,HOST_TEMPREG,remainder);
2243 emit_adcs(quotient,quotient,quotient);
2244 emit_shrimm(HOST_TEMPREG,1,HOST_TEMPREG);
2245 emit_jcc(out-16); // -4
2247 emit_negmi(quotient,quotient);
2249 emit_negmi(remainder,remainder);
2251 if(opcode2[i]==0x1B) // DIVU
2253 signed char d1=get_reg(i_regs->regmap,rs1[i]); // dividend
2254 signed char d2=get_reg(i_regs->regmap,rs2[i]); // divisor
2257 signed char quotient=get_reg(i_regs->regmap,LOREG);
2258 signed char remainder=get_reg(i_regs->regmap,HIREG);
2259 assert(quotient>=0);
2260 assert(remainder>=0);
2261 emit_mov(d1,remainder);
2262 emit_movimm(0xffffffff,quotient); // div0 case
2264 emit_jeq(out+40); // Division by zero
2266 emit_clz(d2,HOST_TEMPREG);
2267 emit_movimm(1<<31,quotient);
2268 emit_shl(d2,HOST_TEMPREG,d2);
2270 emit_movimm(0,HOST_TEMPREG);
2271 emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2272 emit_lslpls_imm(d2,1,d2);
2274 emit_movimm(1<<31,quotient);
2276 emit_shr(quotient,HOST_TEMPREG,quotient);
2277 emit_cmp(remainder,d2);
2278 emit_subcs(remainder,d2,remainder);
2279 emit_adcs(quotient,quotient,quotient);
2280 emit_shrcc_imm(d2,1,d2);
2281 emit_jcc(out-16); // -4
2289 // Multiply by zero is zero.
2290 // MIPS does not have a divide by zero exception.
2291 // The result is undefined, we return zero.
2292 signed char hr=get_reg(i_regs->regmap,HIREG);
2293 signed char lr=get_reg(i_regs->regmap,LOREG);
2294 if(hr>=0) emit_zeroreg(hr);
2295 if(lr>=0) emit_zeroreg(lr);
2298 #define multdiv_assemble multdiv_assemble_arm
2300 static void do_jump_vaddr(int rs)
2302 emit_far_jump(jump_vaddr_reg[rs]);
2305 static void do_preload_rhash(int r) {
2306 // Don't need this for ARM. On x86, this puts the value 0xf8 into the
2307 // register. On ARM the hash can be done with a single instruction (below)
2310 static void do_preload_rhtbl(int ht) {
2311 emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
2314 static void do_rhash(int rs,int rh) {
2315 emit_andimm(rs,0xf8,rh);
2318 static void do_miniht_load(int ht,int rh) {
2319 assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
2320 output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
2323 static void do_miniht_jump(int rs,int rh,int ht) {
2325 emit_ldreq_indexed(ht,4,15);
2326 #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
2334 static void do_miniht_insert(u_int return_address,int rt,int temp) {
2336 emit_movimm(return_address,rt); // PC into link register
2337 add_to_linker(out,return_address,1);
2338 emit_pcreladdr(temp);
2339 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2340 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2342 emit_movw(return_address&0x0000FFFF,rt);
2343 add_to_linker(out,return_address,1);
2344 emit_pcreladdr(temp);
2345 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2346 emit_movt(return_address&0xFFFF0000,rt);
2347 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2351 // CPU-architecture-specific initialization
2352 static void arch_init(void)
2354 uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops - 8;
2355 struct tramp_insns *ops = ndrc->tramp.ops;
2357 assert(!(diff & 3));
2358 assert(diff < 0x1000);
2359 start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2360 for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++)
2361 ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val]
2362 end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2365 // vim:shiftwidth=2:expandtab