1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * linkage_arm.s for PCSX *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2013 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
22 #include "arm_features.h"
23 #include "new_dynarec_config.h"
24 #include "linkage_offsets.h"
28 #define dynarec_local ESYM(dynarec_local)
29 #define ndrc_add_jump_out ESYM(ndrc_add_jump_out)
30 #define ndrc_try_restore_block ESYM(ndrc_try_restore_block)
31 #define ndrc_get_addr_ht ESYM(ndrc_get_addr_ht)
32 #define ndrc_get_addr_ht_param ESYM(ndrc_get_addr_ht_param)
33 #define ndrc_write_invalidate_one ESYM(ndrc_write_invalidate_one)
34 #define gen_interupt ESYM(gen_interupt)
35 #define gteCheckStallRaw ESYM(gteCheckStallRaw)
36 #define psxException ESYM(psxException)
42 .type dynarec_local, %object
43 .size dynarec_local, LO_dynarec_local_size
45 .space LO_dynarec_local_size
47 #define DRC_VAR_(name, vname, size_) \
48 vname = dynarec_local + LO_##name; \
50 .type vname, %object; \
53 #define DRC_VAR(name, size_) \
54 DRC_VAR_(name, ESYM(name), size_)
56 DRC_VAR(next_interupt, 4)
57 DRC_VAR(cycle_count, 4)
58 DRC_VAR(last_count, 4)
59 DRC_VAR(pending_exception, 4)
61 DRC_VAR(branch_target, 4)
64 DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
70 DRC_VAR(reg_cop0, 128)
71 DRC_VAR(reg_cop2d, 128)
72 DRC_VAR(reg_cop2c, 128)
76 @DRC_VAR(interrupt, 4)
77 @DRC_VAR(intCycle, 256)
80 DRC_VAR(inv_code_start, 4)
81 DRC_VAR(inv_code_end, 4)
85 DRC_VAR(zeromem_ptr, 4)
87 DRC_VAR(scratch_buf_ptr, 4)
88 DRC_VAR(ram_offset, 4)
103 .macro load_varadr reg var
104 #if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
105 movw \reg, #:lower16:(\var-(1678f+8))
106 movt \reg, #:upper16:(\var-(1678f+8))
109 #elif defined(HAVE_ARMV7) && !defined(__PIC__)
110 movw \reg, #:lower16:\var
111 movt \reg, #:upper16:\var
117 .macro load_varadr_ext reg var
118 #if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
119 movw \reg, #:lower16:(ptr_\var-(1678f+8))
120 movt \reg, #:upper16:(ptr_\var-(1678f+8))
124 load_varadr \reg \var
128 .macro mov_16 reg imm
132 mov \reg, #(\imm & 0x00ff)
133 orr \reg, #(\imm & 0xff00)
137 .macro mov_24 reg imm
139 movw \reg, #(\imm & 0xffff)
140 movt \reg, #(\imm >> 16)
142 mov \reg, #(\imm & 0x0000ff)
143 orr \reg, #(\imm & 0x00ff00)
144 orr \reg, #(\imm & 0xff0000)
148 FUNCTION(dyna_linker):
149 /* r0 = virtual target address */
150 /* r1 = pointer to an instruction to patch */
151 #ifndef NO_WRITE_EXEC
157 /* must not compile - that might expire the caller block */
159 bl ndrc_get_addr_ht_param
163 add r6, r5, r6, asr #6 /* old target */
165 moveq pc, r0 /* Stale i-cache */
171 and r1, r7, #0xff000000
174 add r1, r1, r2, lsr #8
180 /* XXX: should be able to do better than this... */
184 .size dyna_linker, .-dyna_linker
187 FUNCTION(jump_vaddr_r1):
190 .size jump_vaddr_r1, .-jump_vaddr_r1
191 FUNCTION(jump_vaddr_r2):
194 .size jump_vaddr_r2, .-jump_vaddr_r2
195 FUNCTION(jump_vaddr_r3):
198 .size jump_vaddr_r3, .-jump_vaddr_r3
199 FUNCTION(jump_vaddr_r4):
202 .size jump_vaddr_r4, .-jump_vaddr_r4
203 FUNCTION(jump_vaddr_r5):
206 .size jump_vaddr_r5, .-jump_vaddr_r5
207 FUNCTION(jump_vaddr_r6):
210 .size jump_vaddr_r6, .-jump_vaddr_r6
211 FUNCTION(jump_vaddr_r8):
214 .size jump_vaddr_r8, .-jump_vaddr_r8
215 FUNCTION(jump_vaddr_r9):
218 .size jump_vaddr_r9, .-jump_vaddr_r9
219 FUNCTION(jump_vaddr_r10):
222 .size jump_vaddr_r10, .-jump_vaddr_r10
223 FUNCTION(jump_vaddr_r12):
226 .size jump_vaddr_r12, .-jump_vaddr_r12
227 FUNCTION(jump_vaddr_r7):
229 .size jump_vaddr_r7, .-jump_vaddr_r7
230 FUNCTION(jump_vaddr_r0):
233 .size jump_vaddr_r0, .-jump_vaddr_r0
236 FUNCTION(cc_interrupt):
237 ldr r0, [fp, #LO_last_count]
240 str r1, [fp, #LO_pending_exception]
241 str r10, [fp, #LO_cycle] /* PCSX cycles */
242 @@ str r10, [fp, #LO_reg_cop0+36] /* Count - not on PSX */
245 add r0, fp, #(LO_psxRegs + 34*4) /* CP0 */
248 ldr r10, [fp, #LO_cycle]
249 ldr r0, [fp, #LO_next_interupt]
250 ldr r1, [fp, #LO_pending_exception]
251 ldr r2, [fp, #LO_stop]
252 str r0, [fp, #LO_last_count]
255 ldmfdne sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
258 ldr r0, [fp, #LO_pcaddr]
261 .size cc_interrupt, .-cc_interrupt
264 FUNCTION(jump_overflow_ds):
265 mov r0, #(12<<2) /* R3000E_Ov */
268 FUNCTION(jump_overflow):
272 FUNCTION(jump_break_ds):
273 mov r0, #(9<<2) /* R3000E_Bp */
276 FUNCTION(jump_break):
280 FUNCTION(jump_syscall_ds):
281 mov r0, #(8<<2) /* R3000E_Syscall */
284 FUNCTION(jump_syscall):
289 ldr r3, [fp, #LO_last_count]
290 str r2, [fp, #LO_pcaddr]
292 str r10, [fp, #LO_cycle] /* PCSX cycles */
293 add r2, fp, #(LO_psxRegs + 34*4) /* CP0 */
296 /* note: psxException might do recursive recompiler call from it's HLE code,
297 * so be ready for this */
298 FUNCTION(jump_to_new_pc):
299 ldr r1, [fp, #LO_next_interupt]
300 ldr r10, [fp, #LO_cycle]
301 ldr r0, [fp, #LO_pcaddr]
303 str r1, [fp, #LO_last_count]
306 .size jump_to_new_pc, .-jump_to_new_pc
309 FUNCTION(new_dyna_leave):
310 ldr r0, [fp, #LO_last_count]
313 str r10, [fp, #LO_cycle]
314 ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
315 .size new_dyna_leave, .-new_dyna_leave
318 FUNCTION(invalidate_addr_r0):
319 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
320 b invalidate_addr_call
321 .size invalidate_addr_r0, .-invalidate_addr_r0
323 FUNCTION(invalidate_addr_r1):
324 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
326 b invalidate_addr_call
327 .size invalidate_addr_r1, .-invalidate_addr_r1
329 FUNCTION(invalidate_addr_r2):
330 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
332 b invalidate_addr_call
333 .size invalidate_addr_r2, .-invalidate_addr_r2
335 FUNCTION(invalidate_addr_r3):
336 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
338 b invalidate_addr_call
339 .size invalidate_addr_r3, .-invalidate_addr_r3
341 FUNCTION(invalidate_addr_r4):
342 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
344 b invalidate_addr_call
345 .size invalidate_addr_r4, .-invalidate_addr_r4
347 FUNCTION(invalidate_addr_r5):
348 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
350 b invalidate_addr_call
351 .size invalidate_addr_r5, .-invalidate_addr_r5
353 FUNCTION(invalidate_addr_r6):
354 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
356 b invalidate_addr_call
357 .size invalidate_addr_r6, .-invalidate_addr_r6
359 FUNCTION(invalidate_addr_r7):
360 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
362 b invalidate_addr_call
363 .size invalidate_addr_r7, .-invalidate_addr_r7
365 FUNCTION(invalidate_addr_r8):
366 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
368 b invalidate_addr_call
369 .size invalidate_addr_r8, .-invalidate_addr_r8
371 FUNCTION(invalidate_addr_r9):
372 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
374 b invalidate_addr_call
375 .size invalidate_addr_r9, .-invalidate_addr_r9
377 FUNCTION(invalidate_addr_r10):
378 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
380 b invalidate_addr_call
381 .size invalidate_addr_r10, .-invalidate_addr_r10
383 FUNCTION(invalidate_addr_r12):
384 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
386 .size invalidate_addr_r12, .-invalidate_addr_r12
388 invalidate_addr_call:
389 ldr r12, [fp, #LO_inv_code_start]
390 ldr lr, [fp, #LO_inv_code_end]
393 blcc ndrc_write_invalidate_one
394 ldmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, pc}
395 .size invalidate_addr_call, .-invalidate_addr_call
398 FUNCTION(new_dyna_start):
399 /* ip is stored to conform EABI alignment */
400 stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
401 mov fp, r0 /* dynarec_local */
402 ldr r0, [fp, #LO_pcaddr]
404 ldr r1, [fp, #LO_next_interupt]
405 ldr r10, [fp, #LO_cycle]
406 str r1, [fp, #LO_last_count]
409 .size new_dyna_start, .-new_dyna_start
411 /* --------------------------------------- */
415 .macro pcsx_read_mem readop tab_shift
416 /* r0 = address, r1 = handler_tab, r2 = cycles */
418 lsr r3, #(20+\tab_shift)
419 ldr r12, [fp, #LO_last_count]
420 ldr r1, [r1, r3, lsl #2]
427 \readop r0, [r1, r3, lsl #\tab_shift]
430 str r2, [fp, #LO_cycle]
434 FUNCTION(jump_handler_read8):
435 add r1, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
436 pcsx_read_mem ldrbcc, 0
438 FUNCTION(jump_handler_read16):
439 add r1, #0x1000/4*4 @ shift to r16 part
440 pcsx_read_mem ldrhcc, 1
442 FUNCTION(jump_handler_read32):
443 pcsx_read_mem ldrcc, 2
446 .macro memhandler_post
447 ldr r0, [fp, #LO_next_interupt]
448 ldr r2, [fp, #LO_cycle] @ memhandlers can modify cc, like dma
449 str r0, [fp, #LO_last_count]
453 .macro pcsx_write_mem wrtop tab_shift
454 /* r0 = address, r1 = data, r2 = cycles, r3 = handler_tab */
456 lsr r12, #(20+\tab_shift)
457 ldr r3, [r3, r12, lsl #2]
458 str r0, [fp, #LO_address] @ some handlers still need it..
460 mov r0, r2 @ cycle return in case of direct store
465 \wrtop r1, [r3, r12, lsl #\tab_shift]
468 ldr r12, [fp, #LO_last_count]
471 str r2, [fp, #LO_cycle]
473 str lr, [fp, #LO_saved_lr]
475 ldr lr, [fp, #LO_saved_lr]
481 FUNCTION(jump_handler_write8):
482 add r3, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
483 pcsx_write_mem strbcc, 0
485 FUNCTION(jump_handler_write16):
486 add r3, #0x1000/4*4 @ shift to r16 part
487 pcsx_write_mem strhcc, 1
489 FUNCTION(jump_handler_write32):
490 pcsx_write_mem strcc, 2
492 FUNCTION(jump_handler_write_h):
493 /* r0 = address, r1 = data, r2 = cycles, r3 = handler */
494 ldr r12, [fp, #LO_last_count]
495 str r0, [fp, #LO_address] @ some handlers still need it..
498 str r2, [fp, #LO_cycle]
500 str lr, [fp, #LO_saved_lr]
502 ldr lr, [fp, #LO_saved_lr]
507 FUNCTION(jump_handle_swl):
508 /* r0 = address, r1 = data, r2 = cycles */
509 ldr r3, [fp, #LO_mem_wtab]
511 ldr r3, [r3, r12, lsl #2]
532 lsreq r12, r1, #24 @ 0
542 FUNCTION(jump_handle_swr):
543 /* r0 = address, r1 = data, r2 = cycles */
544 ldr r3, [fp, #LO_mem_wtab]
546 ldr r3, [r3, r12, lsl #2]
568 .macro rcntx_read_mode0 num
569 /* r0 = address, r2 = cycles */
570 ldr r3, [fp, #LO_rcnts+6*4+7*4*\num] @ cycleStart
572 sub r0, r0, r3, lsl #16
577 FUNCTION(rcnt0_read_count_m0):
580 FUNCTION(rcnt1_read_count_m0):
583 FUNCTION(rcnt2_read_count_m0):
586 FUNCTION(rcnt0_read_count_m1):
587 /* r0 = address, r2 = cycles */
588 ldr r3, [fp, #LO_rcnts+6*4+7*4*0] @ cycleStart
591 mul r0, r1, r2 @ /= 5
595 FUNCTION(rcnt1_read_count_m1):
596 /* r0 = address, r2 = cycles */
597 ldr r3, [fp, #LO_rcnts+6*4+7*4*1]
600 umull r3, r0, r1, r2 @ ~ /= hsync_cycles, max ~0x1e6cdd
603 FUNCTION(rcnt2_read_count_m1):
604 /* r0 = address, r2 = cycles */
605 ldr r3, [fp, #LO_rcnts+6*4+7*4*2]
606 mov r0, r2, lsl #16-3
607 sub r0, r0, r3, lsl #16-3
611 FUNCTION(call_gteStall):
612 /* r0 = op_cycles, r1 = cycles */
613 ldr r2, [fp, #LO_last_count]
614 str lr, [fp, #LO_saved_lr]
616 str r1, [fp, #LO_cycle]
617 add r1, fp, #LO_psxRegs
619 ldr lr, [fp, #LO_saved_lr]
629 orr r1, r1, r1, lsl #8
631 orr r1, r1, r1, lsl #16 @ searched char in every byte
632 ldrb r0, [r0, #12] @ last byte
640 orr r3, r3, #0xff000000 @ EXCLUDE_REG
641 uadd8 r0, r12, r1 @ add and set GE bits when not 0 (match)
643 sel r0, r12, r1 @ 0 if no match, else ff in some byte
649 clz r0, r0 @ 0, 8, 16, 24 or 32
652 sub r0, r12, r0, lsr #3 @ 3, 2, 1, 0 or -1
653 sub r2, r12, r2, lsr #3
654 sub r3, r12, r3, lsr #3
661 #endif /* HAVE_ARMV6 */
663 @ vim:filetype=armasm