libpcsxcore/new_dynarec/patches/trace_intr

   1 diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
   2 index cefadd21..63a5c1b1 100644
   3 --- a/libpcsxcore/new_dynarec/emu_if.c
   4 +++ b/libpcsxcore/new_dynarec/emu_if.c
   5 @@ -5,6 +5,7 @@
   6   * See the COPYING file in the top-level directory.
   7   */
   8
   9 +#undef NDRC_THREAD
  10  #include <stdio.h>
  11
  12  #include "emu_if.h"
  13 @@ -631,13 +632,18 @@ static void ari64_shutdown()
  14         ari64_thread_shutdown();
  15         new_dynarec_cleanup();
  16         new_dyna_pcsx_mem_shutdown();
  17 +       (void)ari64_execute;
  18 +       (void)ari64_execute_block;
  19  }
  20
  21 +extern void intExecuteT(psxRegisters *regs);
  22 +extern void intExecuteBlockT(psxRegisters *regs, enum blockExecCaller caller);
  23 +
  24  R3000Acpu psxRec = {
  25         ari64_init,
  26         ari64_reset,
  27 -       ari64_execute,
  28 -       ari64_execute_block,
  29 +       intExecuteT,
  30 +       intExecuteBlockT,
  31         ari64_clear,
  32         ari64_notify,
  33         ari64_apply_config,
  34 @@ -699,7 +705,7 @@ static u32 memcheck_read(u32 a)
  35         return *(u32 *)(psxM + (a & 0x1ffffc));
  36  }
  37
  38 -#if 0
  39 +#if 1
  40  void do_insn_trace(void)
  41  {
  42         static psxRegisters oldregs;
  43 diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
  44 index 98e2c6be..edba031e 100644
  45 --- a/libpcsxcore/new_dynarec/pcsxmem.c
  46 +++ b/libpcsxcore/new_dynarec/pcsxmem.c
  47 @@ -238,6 +238,8 @@ static void write_biu(u32 value)
  48                 return;
  49         }
  50
  51 +extern u32 handler_cycle;
  52 +handler_cycle = psxRegs.cycle;
  53         memprintf("write_biu %08x @%08x %u\n", value, psxRegs.pc, psxRegs.cycle);
  54         psxRegs.biuReg = value;
  55  }
  56 diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
  57 index 064c06b6..07e2afb5 100644
  58 --- a/libpcsxcore/psxcounters.c
  59 +++ b/libpcsxcore/psxcounters.c
  60 @@ -455,9 +455,12 @@ void psxRcntUpdate()
  61
  62  /******************************************************************************/
  63
  64 +extern u32 handler_cycle;
  65 +
  66  void psxRcntWcount( u32 index, u32 value )
  67  {
  68      verboseLog( 2, "[RCNT %i] wcount: %x\n", index, value );
  69 +handler_cycle = psxRegs.cycle;
  70
  71      _psxRcntWcount( index, value );
  72      psxRcntSet();
  73 @@ -466,6 +469,7 @@ void psxRcntWcount( u32 index, u32 value )
  74  void psxRcntWmode( u32 index, u32 value )
  75  {
  76      verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
  77 +handler_cycle = psxRegs.cycle;
  78
  79      _psxRcntWmode( index, value );
  80      _psxRcntWcount( index, 0 );
  81 @@ -477,6 +481,7 @@ void psxRcntWmode( u32 index, u32 value )
  82  void psxRcntWtarget( u32 index, u32 value )
  83  {
  84      verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value );
  85 +handler_cycle = psxRegs.cycle;
  86
  87      rcnts[index].target = value;
  88
  89 @@ -490,6 +495,7 @@ u32 psxRcntRcount0()
  90  {
  91      u32 index = 0;
  92      u32 count;
  93 +handler_cycle = psxRegs.cycle;
  94
  95      if ((rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset) ||
  96          (rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset2))
  97 diff --git a/libpcsxcore/psxevents.c b/libpcsxcore/psxevents.c
  98 index 1e2d01f6..0ee15974 100644
  99 --- a/libpcsxcore/psxevents.c
 100 +++ b/libpcsxcore/psxevents.c
 101 @@ -77,11 +77,13 @@ void irq_test(psxCP0Regs *cp0)
 102                 }
 103         }
 104
 105 -       cp0->n.Cause &= ~0x400;
 106 +       u32 c2 = cp0->n.Cause & ~0x400;
 107         if (psxHu32(0x1070) & psxHu32(0x1074))
 108 -               cp0->n.Cause |= 0x400;
 109 -       if (((cp0->n.Cause | 1) & cp0->n.SR & 0x401) == 0x401)
 110 +               c2 |= 0x400;
 111 +       if (((c2 | 1) & cp0->n.SR & 0x401) == 0x401) {
 112 +               cp0->n.Cause = c2;
 113                 psxException(0, 0, cp0);
 114 +       }
 115  }
 116
 117  void gen_interupt(psxCP0Regs *cp0)
 118 diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
 119 index c487b02d..171c447f 100644
 120 --- a/libpcsxcore/psxhw.c
 121 +++ b/libpcsxcore/psxhw.c
 122 @@ -323,6 +323,7 @@ void psxHwWrite8(u32 add, u32 value) {
 123                         log_unhandled("unhandled w8  %08x %08x @%08x\n",
 124                                 add, value, psxRegs.pc);
 125         }
 126 +       if (add < 0x1f802000)
 127         psxHu8(add) = value;
 128  }
 129
 130 @@ -396,6 +397,7 @@ void psxHwWrite16(u32 add, u32 value) {
 131                         log_unhandled("unhandled w16 %08x %08x @%08x\n",
 132                                 add, value, psxRegs.pc);
 133         }
 134 +       if (add < 0x1f802000)
 135         psxHu16ref(add) = SWAPu16(value);
 136  }
 137
 138 @@ -452,6 +454,7 @@ void psxHwWrite32(u32 add, u32 value) {
 139                         return;
 140                 }
 141         }
 142 +       if (add < 0x1f802000)
 143         psxHu32ref(add) = SWAPu32(value);
 144  }
 145
 146 diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
 147 index 68d79321..2e3d14ab 100644
 148 --- a/libpcsxcore/psxinterpreter.c
 149 +++ b/libpcsxcore/psxinterpreter.c
 150 @@ -243,7 +243,7 @@ static inline void addCycle(psxRegisters *regs)
 151  {
 152         assert(regs->subCycleStep >= 0x10000);
 153         regs->subCycle += regs->subCycleStep;
 154 -       regs->cycle += regs->subCycle >> 16;
 155 +       regs->cycle += 2; //regs->subCycle >> 16;
 156         regs->subCycle &= 0xffff;
 157  }
 158
 159 @@ -440,7 +440,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) {
 160                 regs->CP0.n.Target = pc_final;
 161         regs->branching = 0;
 162
 163 +       psxRegs.cycle += 2;
 164         psxBranchTest();
 165 +       psxRegs.cycle -= 2;
 166  }
 167
 168  static void doBranchReg(psxRegisters *regs, u32 tar) {
 169 @@ -973,7 +975,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) {
 170         }
 171  }
 172
 173 -OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); }
 174 +OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); psxBranchTest(); }
 175
 176  // no exception
 177  static inline void psxNULLne(psxRegisters *regs) {
 178 @@ -1182,18 +1184,20 @@ static void intReset() {
 179  static inline void execI_(u8 **memRLUT, psxRegisters *regs) {
 180         u32 pc = regs->pc;
 181
 182 -       addCycle(regs);
 183 +       //addCycle(regs);
 184         dloadStep(regs);
 185
 186         regs->pc += 4;
 187         regs->code = fetch(regs, memRLUT, pc);
 188         psxBSC[regs->code >> 26](regs, regs->code);
 189 +       psxRegs.cycle += 2;
 190 +       fetchNoCache(regs, memRLUT, regs->pc); // bus err check
 191  }
 192
 193  static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
 194         u32 pc = regs->pc;
 195
 196 -       addCycle(regs);
 197 +       //addCycle(regs);
 198         dloadStep(regs);
 199
 200         if (execBreakCheck(regs, pc))
 201 @@ -1202,6 +1206,8 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
 202         regs->pc += 4;
 203         regs->code = fetch(regs, memRLUT, pc);
 204         psxBSC[regs->code >> 26](regs, regs->code);
 205 +       psxRegs.cycle += 2;
 206 +       fetchNoCache(regs, memRLUT, regs->pc); // bus err check
 207  }
 208
 209  static void intExecute(psxRegisters *regs) {
 210 @@ -1234,6 +1240,27 @@ static void intExecuteBlockBp(psxRegisters *regs, enum blockExecCaller caller) {
 211                 execIbp(memRLUT, regs);
 212  }
 213
 214 +extern void do_insn_trace(void);
 215 +
 216 +void intExecuteT(psxRegisters *regs) {
 217 +       u8 **memRLUT = psxMemRLUT;
 218 +
 219 +       while (!regs->stop) {
 220 +               do_insn_trace();
 221 +               execIbp(memRLUT, regs);
 222 +       }
 223 +}
 224 +
 225 +void intExecuteBlockT(psxRegisters *regs, enum blockExecCaller caller) {
 226 +       u8 **memRLUT = psxMemRLUT;
 227 +
 228 +       regs->branchSeen = 0;
 229 +       while (!regs->branchSeen) {
 230 +               do_insn_trace();
 231 +               execIbp(memRLUT, regs);
 232 +       }
 233 +}
 234 +
 235  static void intClear(u32 Addr, u32 Size) {
 236  }
 237
 238 @@ -1263,7 +1290,7 @@ static void setupCop(u32 sr)
 239         else
 240                 psxBSC[17] = psxCOPd;
 241         if (sr & (1u << 30))
 242 -               psxBSC[18] = Config.DisableStalls ? psxCOP2 : psxCOP2_stall;
 243 +               psxBSC[18] = psxCOP2;
 244         else
 245                 psxBSC[18] = psxCOPd;
 246         if (sr & (1u << 31))
 247 @@ -1282,7 +1309,7 @@ void intApplyConfig() {
 248         assert(psxSPC[26] == psxDIV   || psxSPC[26] == psxDIV_stall);
 249         assert(psxSPC[27] == psxDIVU  || psxSPC[27] == psxDIVU_stall);
 250
 251 -       if (Config.DisableStalls) {
 252 +       if (1) {
 253                 psxBSC[18] = psxCOP2;
 254                 psxBSC[50] = gteLWC2;
 255                 psxBSC[58] = gteSWC2;
 256 diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
 257 index 13301992..2ccdea74 100644
 258 --- a/libpcsxcore/psxmem.c
 259 +++ b/libpcsxcore/psxmem.c
 260 @@ -316,10 +316,13 @@ void psxMemOnIsolate(int enable)
 261                         : R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL);
 262  }
 263
 264 +extern u32 last_io_addr;
 265 +
 266  u8 psxMemRead8(u32 mem) {
 267         char *p;
 268         u32 t;
 269
 270 +       last_io_addr = mem;
 271         t = mem >> 16;
 272         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 273                 if ((mem & 0xffff) < 0x400)
 274 @@ -345,6 +348,7 @@ u16 psxMemRead16(u32 mem) {
 275         char *p;
 276         u32 t;
 277
 278 +       last_io_addr = mem;
 279         t = mem >> 16;
 280         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 281                 if ((mem & 0xffff) < 0x400)
 282 @@ -370,6 +374,7 @@ u32 psxMemRead32(u32 mem) {
 283         char *p;
 284         u32 t;
 285
 286 +       last_io_addr = mem;
 287         t = mem >> 16;
 288         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 289                 if ((mem & 0xffff) < 0x400)
 290 @@ -397,6 +402,7 @@ void psxMemWrite8(u32 mem, u32 value) {
 291         char *p;
 292         u32 t;
 293
 294 +       last_io_addr = mem;
 295         t = mem >> 16;
 296         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 297                 if ((mem & 0xffff) < 0x400)
 298 @@ -424,6 +430,7 @@ void psxMemWrite16(u32 mem, u32 value) {
 299         char *p;
 300         u32 t;
 301
 302 +       last_io_addr = mem;
 303         t = mem >> 16;
 304         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 305                 if ((mem & 0xffff) < 0x400)
 306 @@ -451,6 +458,7 @@ void psxMemWrite32(u32 mem, u32 value) {
 307         char *p;
 308         u32 t;
 309
 310 +       last_io_addr = mem;
 311  //     if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
 312         t = mem >> 16;
 313         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 314 @@ -469,6 +477,8 @@ void psxMemWrite32(u32 mem, u32 value) {
 315  #endif
 316                 } else {
 317                         if (mem == 0xfffe0130) {
 318 +extern u32 handler_cycle;
 319 +handler_cycle = psxRegs.cycle;
 320                                 psxRegs.biuReg = value;
 321                                 return;
 322                         }
 323 diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
 324 index cfd1ab09..724167e0 100644
 325 --- a/libpcsxcore/r3000a.c
 326 +++ b/libpcsxcore/r3000a.c
 327 @@ -141,6 +141,8 @@ void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
 328  }
 329
 330  void psxBranchTest() {
 331 + extern u32 irq_test_cycle;
 332 + irq_test_cycle = psxRegs.cycle;
 333         if ((psxRegs.cycle - psxRegs.psxNextsCounter) >= psxRegs.psxNextCounter)
 334                 psxRcntUpdate();
 335