libpcsxcore/r3000a.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
   3  *                                                                         *
   4  *   This program is free software; you can redistribute it and/or modify  *
   5  *   it under the terms of the GNU General Public License as published by  *
   6  *   the Free Software Foundation; either version 2 of the License, or     *
   7  *   (at your option) any later version.                                   *
   8  *                                                                         *
   9  *   This program is distributed in the hope that it will be useful,       *
  10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  12  *   GNU General Public License for more details.                          *
  13  *                                                                         *
  14  *   You should have received a copy of the GNU General Public License     *
  15  *   along with this program; if not, write to the                         *
  16  *   Free Software Foundation, Inc.,                                       *
  17  *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
  18  ***************************************************************************/
  19
  20 /*
  21 * R3000A CPU functions.
  22 */
  23
  24 #include "r3000a.h"
  25 #include "cdrom.h"
  26 #include "mdec.h"
  27 #include "gte.h"
  28 #include "psxinterpreter.h"
  29 #include "psxbios.h"
  30 #include "psxevents.h"
  31 #include "../include/compiler_features.h"
  32 #include <assert.h>
  33
  34 #ifndef ARRAY_SIZE
  35 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
  36 #endif
  37
  38 R3000Acpu *psxCpu = NULL;
  39 #ifdef DRC_DISABLE
  40 psxRegisters psxRegs;
  41 #endif
  42
  43 int psxInit() {
  44         assert(PSXINT_COUNT <= ARRAY_SIZE(psxRegs.intCycle));
  45         assert(ARRAY_SIZE(psxRegs.intCycle) == ARRAY_SIZE(psxRegs.event_cycles));
  46
  47 #ifndef DRC_DISABLE
  48         if (Config.Cpu == CPU_INTERPRETER) {
  49                 psxCpu = &psxInt;
  50         } else psxCpu = &psxRec;
  51 #else
  52         Config.Cpu = CPU_INTERPRETER;
  53         psxCpu = &psxInt;
  54 #endif
  55
  56         Log = 0;
  57
  58         if (psxMemInit() == -1) return -1;
  59
  60         return psxCpu->Init();
  61 }
  62
  63 void psxReset() {
  64         boolean introBypassed = FALSE;
  65         boolean oldhle = Config.HLE;
  66
  67         psxMemReset();
  68
  69         memset(&psxRegs, 0, sizeof(psxRegs));
  70
  71         psxRegs.pc = 0xbfc00000; // Start in bootstrap
  72
  73         psxRegs.CP0.n.SR   = 0x10600000; // COP0 enabled | BEV = 1 | TS = 1
  74         psxRegs.CP0.n.PRid = 0x00000002; // PRevID = Revision ID, same as R3000A
  75         if (Config.HLE) {
  76                 psxRegs.CP0.n.SR |= 1u << 30;    // COP2 enabled
  77                 psxRegs.CP0.n.SR &= ~(1u << 22); // RAM exception vector
  78         }
  79
  80         if (Config.HLE != oldhle) {
  81                 // at least ari64 drc compiles differently so hard reset
  82                 psxCpu->Shutdown();
  83                 psxCpu->Init();
  84         }
  85         psxCpu->ApplyConfig();
  86         psxCpu->Reset();
  87
  88         psxHwReset();
  89         psxBiosInit();
  90
  91         if (!Config.HLE) {
  92                 psxExecuteBios();
  93                 if (psxRegs.pc == 0x80030000 && !Config.SlowBoot) {
  94                         introBypassed = BiosBootBypass();
  95                 }
  96         }
  97         if (Config.HLE || introBypassed)
  98                 psxBiosSetupBootState();
  99
 100 #ifdef EMU_LOG
 101         EMU_LOG("*BIOS END*\n");
 102 #endif
 103         Log = 0;
 104 }
 105
 106 void psxShutdown() {
 107         psxBiosShutdown();
 108
 109         psxCpu->Shutdown();
 110
 111         psxMemShutdown();
 112 }
 113
 114 // cp0 is passed separately for lightrec to be less messy
 115 void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
 116         u32 opcode = intFakeFetch(psxRegs.pc);
 117
 118         if (unlikely(!Config.HLE && (opcode >> 25) == 0x25)) {
 119                 // "hokuto no ken" / "Crash Bandicot 2" ...
 120                 // BIOS does not allow to return to GTE instructions
 121                 // (just skips it, supposedly because it's scheduled already)
 122                 // so we execute it here
 123                 psxCP2Regs *cp2 = (psxCP2Regs *)(cp0 + 1);
 124                 psxRegs.code = opcode;
 125                 psxCP2[opcode & 0x3f](cp2);
 126         }
 127
 128         // Set the Cause
 129         cp0->n.Cause = (bdt << 30) | (cp0->n.Cause & 0x700) | cause;
 130
 131         // Set the EPC & PC
 132         cp0->n.EPC = bdt ? psxRegs.pc - 4 : psxRegs.pc;
 133
 134         if (cp0->n.SR & 0x400000)
 135                 psxRegs.pc = 0xbfc00180;
 136         else
 137                 psxRegs.pc = 0x80000080;
 138
 139         // Set the SR
 140         cp0->n.SR = (cp0->n.SR & ~0x3f) | ((cp0->n.SR & 0x0f) << 2);
 141 }
 142
 143 void psxBranchTest() {
 144         if ((psxRegs.cycle - psxRegs.psxNextsCounter) >= psxRegs.psxNextCounter)
 145                 psxRcntUpdate();
 146
 147         irq_test(&psxRegs.CP0);
 148
 149         if (unlikely(psxRegs.pc == psxRegs.biosBranchCheck))
 150                 psxBiosCheckBranch();
 151 }
 152
 153 void psxJumpTest() {
 154         if (!Config.HLE && Config.PsxOut) {
 155                 u32 call = psxRegs.GPR.n.t1 & 0xff;
 156                 switch (psxRegs.pc & 0x1fffff) {
 157                         case 0xa0:
 158 #ifdef PSXBIOS_LOG
 159                                 if (call != 0x28 && call != 0xe) {
 160                                         PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 161 #endif
 162                                 if (biosA0[call])
 163                                         biosA0[call]();
 164                                 break;
 165                         case 0xb0:
 166 #ifdef PSXBIOS_LOG
 167                                 if (call != 0x17 && call != 0xb) {
 168                                         PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 169 #endif
 170                                 if (biosB0[call])
 171                                         biosB0[call]();
 172                                 break;
 173                         case 0xc0:
 174 #ifdef PSXBIOS_LOG
 175                                 PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
 176 #endif
 177                                 if (biosC0[call])
 178                                         biosC0[call]();
 179                                 break;
 180                 }
 181         }
 182 }
 183
 184 int psxExecuteBiosEnded(void) {
 185         return (psxRegs.pc & 0xff800000) == 0x80000000;
 186 }
 187
 188 void psxExecuteBios() {
 189         int i;
 190         for (i = 0; i < 5000000; i++) {
 191                 psxCpu->ExecuteBlock(&psxRegs, EXEC_CALLER_BOOT);
 192                 if (psxExecuteBiosEnded())
 193                         break;
 194         }
 195         if (psxRegs.pc != 0x80030000)
 196                 SysPrintf("non-standard BIOS detected (%d, %08x)\n", i, psxRegs.pc);
 197 }
 198
 199 // irq10 stuff, very preliminary
 200 static int irq10count;
 201
 202 static void psxScheduleIrq10One(u32 cycles_abs) {
 203         // schedule relative to frame start
 204         u32 c = cycles_abs - rcnts[3].cycleStart;
 205         assert((s32)c >= 0);
 206         psxRegs.interrupt |= 1 << PSXINT_IRQ10;
 207         psxRegs.intCycle[PSXINT_IRQ10].cycle = c;
 208         psxRegs.intCycle[PSXINT_IRQ10].sCycle = rcnts[3].cycleStart;
 209         set_event_raw_abs(PSXINT_IRQ10, cycles_abs);
 210 }
 211
 212 void irq10Interrupt() {
 213         u32 prevc = psxRegs.intCycle[PSXINT_IRQ10].sCycle
 214                 + psxRegs.intCycle[PSXINT_IRQ10].cycle;
 215
 216         psxHu32ref(0x1070) |= SWAPu32(0x400);
 217
 218 #if 0
 219         s32 framec = psxRegs.cycle - rcnts[3].cycleStart;
 220         printf("%d:%03d irq10 #%d %3d m=%d,%d\n", frame_counter,
 221                 (s32)((float)framec / (PSXCLK / 60 / 263.0f)),
 222                 irq10count, psxRegs.cycle - prevc,
 223                 (psxRegs.CP0.n.SR & 0x401) != 0x401, !(psxHu32(0x1074) & 0x400));
 224 #endif
 225         if (--irq10count > 0) {
 226                 u32 cycles_per_line = Config.PsxType
 227                         ? PSXCLK / 50 / 314 : PSXCLK / 60 / 263;
 228                 psxScheduleIrq10One(prevc + cycles_per_line);
 229         }
 230 }
 231
 232 void psxScheduleIrq10(int irq_count, int x_cycles, int y) {
 233         //printf("%s %d, %d, %d\n", __func__, irq_count, x_cycles, y);
 234         u32 cycles_per_frame = Config.PsxType ? PSXCLK / 50 : PSXCLK / 60;
 235         u32 cycles = rcnts[3].cycleStart + cycles_per_frame;
 236         cycles += y * cycles_per_frame / (Config.PsxType ? 314 : 263);
 237         cycles += x_cycles;
 238         psxScheduleIrq10One(cycles);
 239         irq10count = irq_count;
 240 }