libpcsxcore/r3000a.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
   3  *                                                                         *
   4  *   This program is free software; you can redistribute it and/or modify  *
   5  *   it under the terms of the GNU General Public License as published by  *
   6  *   the Free Software Foundation; either version 2 of the License, or     *
   7  *   (at your option) any later version.                                   *
   8  *                                                                         *
   9  *   This program is distributed in the hope that it will be useful,       *
  10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  12  *   GNU General Public License for more details.                          *
  13  *                                                                         *
  14  *   You should have received a copy of the GNU General Public License     *
  15  *   along with this program; if not, write to the                         *
  16  *   Free Software Foundation, Inc.,                                       *
  17  *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
  18  ***************************************************************************/
  19
  20 /*
  21 * R3000A CPU functions.
  22 */
  23
  24 #include "r3000a.h"
  25 #include "cdrom.h"
  26 #include "mdec.h"
  27 #include "gte.h"
  28 #include "psxinterpreter.h"
  29 #include "psxbios.h"
  30 #include "psxevents.h"
  31 #include "../include/compiler_features.h"
  32 #include <stddef.h>
  33 #include <assert.h>
  34
  35 #ifndef ARRAY_SIZE
  36 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
  37 #endif
  38
  39 R3000Acpu *psxCpu = NULL;
  40 #ifdef DRC_DISABLE
  41 psxRegisters psxRegs;
  42 #endif
  43
  44 int psxInit() {
  45         assert(PSXINT_COUNT <= ARRAY_SIZE(psxRegs.intCycle));
  46         assert(ARRAY_SIZE(psxRegs.intCycle) == ARRAY_SIZE(psxRegs.event_cycles));
  47
  48 #ifndef DRC_DISABLE
  49         if (Config.Cpu == CPU_INTERPRETER) {
  50                 psxCpu = &psxInt;
  51         } else psxCpu = &psxRec;
  52 #else
  53         Config.Cpu = CPU_INTERPRETER;
  54         psxCpu = &psxInt;
  55 #endif
  56
  57         if (psxMemInit() == -1) return -1;
  58
  59         return psxCpu->Init();
  60 }
  61
  62 void psxReset() {
  63         boolean introBypassed = FALSE;
  64         boolean oldhle = Config.HLE;
  65
  66         psxMemReset();
  67
  68         memset(&psxRegs, 0, offsetof(psxRegisters, ptrs));
  69
  70         psxRegs.pc = 0xbfc00000; // Start in bootstrap
  71
  72         psxRegs.CP0.n.SR   = 0x10600000; // COP0 enabled | BEV = 1 | TS = 1
  73         psxRegs.CP0.n.PRid = 0x00000002; // PRevID = Revision ID, same as R3000A
  74         if (Config.HLE) {
  75                 psxRegs.CP0.n.SR |= 1u << 30;    // COP2 enabled
  76                 psxRegs.CP0.n.SR &= ~(1u << 22); // RAM exception vector
  77         }
  78
  79         if (Config.HLE != oldhle) {
  80                 // at least ari64 drc compiles differently so hard reset
  81                 psxCpu->Shutdown();
  82                 psxCpu->Init();
  83         }
  84         psxCpu->ApplyConfig();
  85         psxCpu->Reset();
  86
  87         padReset();
  88         psxHwReset();
  89         psxBiosInit();
  90
  91         if (!Config.HLE) {
  92                 psxExecuteBios();
  93                 if (psxRegs.pc == 0x80030000 && !Config.SlowBoot) {
  94                         introBypassed = BiosBootBypass();
  95                 }
  96         }
  97         if (Config.HLE || introBypassed)
  98                 psxBiosSetupBootState();
  99 }
 100
 101 void psxShutdown() {
 102         psxBiosShutdown();
 103
 104         psxCpu->Shutdown();
 105
 106         psxMemShutdown();
 107 }
 108
 109 // cp0 is passed separately for lightrec to be less messy
 110 void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
 111         u32 opcode = intFakeFetch(psxRegs.pc);
 112
 113         if (unlikely(!Config.HLE && (opcode >> 25) == 0x25)) {
 114                 // "hokuto no ken" / "Crash Bandicot 2" ...
 115                 // BIOS does not allow to return to GTE instructions
 116                 // (just skips it, supposedly because it's scheduled already)
 117                 // so we execute it here
 118                 psxCP2Regs *cp2 = (psxCP2Regs *)(cp0 + 1);
 119                 psxRegs.code = opcode;
 120                 psxCP2[opcode & 0x3f](cp2);
 121         }
 122
 123         // Set the Cause
 124         cp0->n.Cause = (bdt << 30) | (cp0->n.Cause & 0x700) | cause;
 125
 126         // Set the EPC & PC
 127         cp0->n.EPC = bdt ? psxRegs.pc - 4 : psxRegs.pc;
 128
 129         if (cp0->n.SR & 0x400000)
 130                 psxRegs.pc = 0xbfc00180;
 131         else
 132                 psxRegs.pc = 0x80000080;
 133
 134         // Set the SR
 135         cp0->n.SR = (cp0->n.SR & ~0x3f) | ((cp0->n.SR & 0x0f) << 2);
 136 }
 137
 138 void psxBranchTest() {
 139         if ((psxRegs.cycle - psxRegs.psxNextsCounter) >= psxRegs.psxNextCounter)
 140                 psxRcntUpdate();
 141
 142         irq_test(&psxRegs.CP0);
 143
 144         if (unlikely(psxRegs.pc == psxRegs.biosBranchCheck))
 145                 psxBiosCheckBranch();
 146 }
 147
 148 void psxJumpTest() {
 149         if (!Config.HLE && Config.PsxOut) {
 150                 u32 call = psxRegs.GPR.n.t1 & 0xff;
 151                 switch (psxRegs.pc & 0x1fffff) {
 152                         case 0xa0:
 153 #ifdef PSXBIOS_LOG
 154                                 if (call != 0x28 && call != 0xe) {
 155                                         PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 156 #endif
 157                                 if (biosA0[call])
 158                                         biosA0[call]();
 159                                 break;
 160                         case 0xb0:
 161 #ifdef PSXBIOS_LOG
 162                                 if (call != 0x17 && call != 0xb) {
 163                                         PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 164 #endif
 165                                 if (biosB0[call])
 166                                         biosB0[call]();
 167                                 break;
 168                         case 0xc0:
 169 #ifdef PSXBIOS_LOG
 170                                 PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
 171 #endif
 172                                 if (biosC0[call])
 173                                         biosC0[call]();
 174                                 break;
 175                 }
 176         }
 177 }
 178
 179 int psxExecuteBiosEnded(void) {
 180         return (psxRegs.pc & 0xff800000) == 0x80000000;
 181 }
 182
 183 void psxExecuteBios() {
 184         int i;
 185         for (i = 0; i < 5000000; i++) {
 186                 psxCpu->ExecuteBlock(&psxRegs, EXEC_CALLER_BOOT);
 187                 if (psxExecuteBiosEnded())
 188                         break;
 189         }
 190         if (psxRegs.pc != 0x80030000)
 191                 SysPrintf("non-standard BIOS detected (%d, %08x)\n", i, psxRegs.pc);
 192 }
 193
 194 // irq10 stuff, very preliminary
 195 static int irq10count;
 196
 197 static void psxScheduleIrq10One(u32 cycles_abs) {
 198         // schedule relative to frame start
 199         u32 c = cycles_abs - rcnts[3].cycleStart;
 200         assert((s32)c >= 0);
 201         psxRegs.interrupt |= 1 << PSXINT_IRQ10;
 202         psxRegs.intCycle[PSXINT_IRQ10].cycle = c;
 203         psxRegs.intCycle[PSXINT_IRQ10].sCycle = rcnts[3].cycleStart;
 204         set_event_raw_abs(PSXINT_IRQ10, cycles_abs);
 205 }
 206
 207 void irq10Interrupt() {
 208         u32 prevc = psxRegs.intCycle[PSXINT_IRQ10].sCycle
 209                 + psxRegs.intCycle[PSXINT_IRQ10].cycle;
 210
 211         psxHu32ref(0x1070) |= SWAPu32(0x400);
 212
 213 #if 0
 214         s32 framec = psxRegs.cycle - rcnts[3].cycleStart;
 215         printf("%d:%03d irq10 #%d %3d m=%d,%d\n", frame_counter,
 216                 (s32)((float)framec / (PSXCLK / 60 / 263.0f)),
 217                 irq10count, psxRegs.cycle - prevc,
 218                 (psxRegs.CP0.n.SR & 0x401) != 0x401, !(psxHu32(0x1074) & 0x400));
 219 #endif
 220         if (--irq10count > 0) {
 221                 u32 cycles_per_line = Config.PsxType
 222                         ? PSXCLK / 50 / 314 : PSXCLK / 60 / 263;
 223                 psxScheduleIrq10One(prevc + cycles_per_line);
 224         }
 225 }
 226
 227 void psxScheduleIrq10(int irq_count, int x_cycles, int y) {
 228         //printf("%s %d, %d, %d\n", __func__, irq_count, x_cycles, y);
 229         u32 cycles_per_frame = Config.PsxType ? PSXCLK / 50 : PSXCLK / 60;
 230         u32 cycles = rcnts[3].cycleStart + cycles_per_frame;
 231         cycles += y * cycles_per_frame / (Config.PsxType ? 314 : 263);
 232         cycles += x_cycles;
 233         psxScheduleIrq10One(cycles);
 234         irq10count = irq_count;
 235 }