13 #include "../psxdma.h"
15 #include "../psxmem.h"
16 #include "../r3000a.h"
17 #include "../psxinterpreter.h"
18 #include "../new_dynarec/events.h"
20 #include "../frontend/main.h"
25 #if (defined(__arm__) || defined(__aarch64__)) && !defined(ALLOW_LIGHTREC_ON_ARM)
26 #error "Lightrec should not be used on ARM (please specify DYNAREC=ari64 to make)"
29 #define ARRAY_SIZE(x) (sizeof(x) ? sizeof(x) / sizeof((x)[0]) : 0)
31 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
32 # define LE32TOH(x) __builtin_bswap32(x)
33 # define HTOLE32(x) __builtin_bswap32(x)
34 # define LE16TOH(x) __builtin_bswap16(x)
35 # define HTOLE16(x) __builtin_bswap16(x)
37 # define LE32TOH(x) (x)
38 # define HTOLE32(x) (x)
39 # define LE16TOH(x) (x)
40 # define HTOLE16(x) (x)
44 # define likely(x) __builtin_expect(!!(x),1)
45 # define unlikely(x) __builtin_expect(!!(x),0)
47 # define likely(x) (x)
48 # define unlikely(x) (x)
56 static struct lightrec_state *lightrec_state;
58 static char *name = "retroarch.exe";
60 static bool use_lightrec_interpreter;
61 static bool use_pcsx_interpreter;
62 static bool block_stepping;
63 static u32 cycle_mult_to_pcsx; // 22.10 fractional
64 static u32 cycle_mult_from_pcsx;
91 static void (*cp2_ops[])(struct psxCP2Regs *) = {
92 [OP_CP2_RTPS] = gteRTPS,
93 [OP_CP2_RTPS] = gteRTPS,
94 [OP_CP2_NCLIP] = gteNCLIP,
96 [OP_CP2_DPCS] = gteDPCS,
97 [OP_CP2_INTPL] = gteINTPL,
98 [OP_CP2_MVMVA] = gteMVMVA,
99 [OP_CP2_NCDS] = gteNCDS,
100 [OP_CP2_CDP] = gteCDP,
101 [OP_CP2_NCDT] = gteNCDT,
102 [OP_CP2_NCCS] = gteNCCS,
104 [OP_CP2_NCS] = gteNCS,
105 [OP_CP2_NCT] = gteNCT,
106 [OP_CP2_SQR] = gteSQR,
107 [OP_CP2_DCPL] = gteDCPL,
108 [OP_CP2_DPCT] = gteDPCT,
109 [OP_CP2_AVSZ3] = gteAVSZ3,
110 [OP_CP2_AVSZ4] = gteAVSZ4,
111 [OP_CP2_RTPT] = gteRTPT,
112 [OP_CP2_GPF] = gteGPF,
113 [OP_CP2_GPL] = gteGPL,
114 [OP_CP2_NCCT] = gteNCCT,
117 static char cache_buf[64 * 1024];
119 static void cop2_op(struct lightrec_state *state, u32 func)
121 struct lightrec_registers *regs = lightrec_get_registers(state);
125 if (unlikely(!cp2_ops[func & 0x3f])) {
126 fprintf(stderr, "Invalid CP2 function %u\n", func);
128 /* This works because regs->cp2c comes right after regs->cp2d,
129 * so it can be cast to a pcsxCP2Regs pointer. */
130 cp2_ops[func & 0x3f]((psxCP2Regs *) regs->cp2d);
134 static bool has_interrupt(void)
136 struct lightrec_registers *regs = lightrec_get_registers(lightrec_state);
138 return ((psxHu32(0x1070) & psxHu32(0x1074)) &&
139 (regs->cp0[12] & 0x401) == 0x401) ||
140 (regs->cp0[12] & regs->cp0[13] & 0x0300);
143 static u32 cycles_pcsx_to_lightrec(u32 c)
145 assert((u64)c * cycle_mult_from_pcsx <= (u32)-1);
146 return c * cycle_mult_from_pcsx >> 10;
149 static void lightrec_tansition_to_pcsx(struct lightrec_state *state)
151 psxRegs.cycle += lightrec_current_cycle_count(state) * cycle_mult_to_pcsx >> 10;
152 lightrec_reset_cycle_count(state, 0);
155 static void lightrec_tansition_from_pcsx(struct lightrec_state *state)
157 s32 cycles_left = next_interupt - psxRegs.cycle;
159 if (block_stepping || cycles_left <= 0 || has_interrupt())
160 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
162 lightrec_set_target_cycle_count(state,
163 cycles_pcsx_to_lightrec(cycles_left));
167 static void hw_write_byte(struct lightrec_state *state,
168 u32 op, void *host, u32 mem, u8 val)
170 lightrec_tansition_to_pcsx(state);
172 psxHwWrite8(mem, val);
174 lightrec_tansition_from_pcsx(state);
177 static void hw_write_half(struct lightrec_state *state,
178 u32 op, void *host, u32 mem, u16 val)
180 lightrec_tansition_to_pcsx(state);
182 psxHwWrite16(mem, val);
184 lightrec_tansition_from_pcsx(state);
187 static void hw_write_word(struct lightrec_state *state,
188 u32 op, void *host, u32 mem, u32 val)
190 lightrec_tansition_to_pcsx(state);
192 psxHwWrite32(mem, val);
194 lightrec_tansition_from_pcsx(state);
197 static u8 hw_read_byte(struct lightrec_state *state, u32 op, void *host, u32 mem)
201 lightrec_tansition_to_pcsx(state);
203 val = psxHwRead8(mem);
205 lightrec_tansition_from_pcsx(state);
210 static u16 hw_read_half(struct lightrec_state *state,
211 u32 op, void *host, u32 mem)
215 lightrec_tansition_to_pcsx(state);
217 val = psxHwRead16(mem);
219 lightrec_tansition_from_pcsx(state);
224 static u32 hw_read_word(struct lightrec_state *state,
225 u32 op, void *host, u32 mem)
229 lightrec_tansition_to_pcsx(state);
231 val = psxHwRead32(mem);
233 lightrec_tansition_from_pcsx(state);
238 static struct lightrec_mem_map_ops hw_regs_ops = {
247 static u32 cache_ctrl;
249 static void cache_ctrl_write_word(struct lightrec_state *state,
250 u32 op, void *host, u32 mem, u32 val)
255 static u32 cache_ctrl_read_word(struct lightrec_state *state,
256 u32 op, void *host, u32 mem)
261 static struct lightrec_mem_map_ops cache_ctrl_ops = {
262 .sw = cache_ctrl_write_word,
263 .lw = cache_ctrl_read_word,
266 static struct lightrec_mem_map lightrec_map[] = {
267 [PSX_MAP_KERNEL_USER_RAM] = {
268 /* Kernel and user memory */
277 [PSX_MAP_SCRATCH_PAD] = {
282 [PSX_MAP_PARALLEL_PORT] = {
287 [PSX_MAP_HW_REGISTERS] = {
288 /* Hardware registers */
293 [PSX_MAP_CACHE_CONTROL] = {
297 .ops = &cache_ctrl_ops,
300 /* Mirrors of the kernel/user memory */
301 [PSX_MAP_MIRROR1] = {
304 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
306 [PSX_MAP_MIRROR2] = {
309 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
311 [PSX_MAP_MIRROR3] = {
314 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
316 [PSX_MAP_CODE_BUFFER] = {
317 .length = CODE_BUFFER_SIZE,
321 static void lightrec_enable_ram(struct lightrec_state *state, bool enable)
324 memcpy(psxM, cache_buf, sizeof(cache_buf));
326 memcpy(cache_buf, psxM, sizeof(cache_buf));
329 static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size)
369 return kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
400 return !is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
405 #if defined(HW_DOL) || defined(HW_RVL)
406 static void lightrec_code_inv(void *ptr, uint32_t len)
408 extern void DCFlushRange(void *ptr, u32 len);
409 extern void ICInvalidateRange(void *ptr, u32 len);
411 DCFlushRange(ptr, len);
412 ICInvalidateRange(ptr, len);
414 #elif defined(HW_WUP)
415 static void lightrec_code_inv(void *ptr, uint32_t len)
417 wiiu_clear_cache(ptr, (void *)((uintptr_t)ptr + len));
421 static const struct lightrec_ops lightrec_ops = {
423 .enable_ram = lightrec_enable_ram,
424 .hw_direct = lightrec_can_hw_direct,
425 #if defined(HW_DOL) || defined(HW_RVL) || defined(HW_WUP)
426 .code_inv = lightrec_code_inv,
430 static int lightrec_plugin_init(void)
432 lightrec_map[PSX_MAP_KERNEL_USER_RAM].address = psxM;
433 lightrec_map[PSX_MAP_BIOS].address = psxR;
434 lightrec_map[PSX_MAP_SCRATCH_PAD].address = psxH;
435 lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000;
436 lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP;
438 if (!LIGHTREC_CUSTOM_MAP) {
439 code_buffer = malloc(CODE_BUFFER_SIZE);
444 if (LIGHTREC_CUSTOM_MAP) {
445 lightrec_map[PSX_MAP_MIRROR1].address = psxM + 0x200000;
446 lightrec_map[PSX_MAP_MIRROR2].address = psxM + 0x400000;
447 lightrec_map[PSX_MAP_MIRROR3].address = psxM + 0x600000;
450 lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
452 use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER");
454 lightrec_state = lightrec_init(name,
455 lightrec_map, ARRAY_SIZE(lightrec_map),
458 // fprintf(stderr, "M=0x%lx, P=0x%lx, R=0x%lx, H=0x%lx\n",
462 // (uintptr_t) psxH);
465 signal(SIGPIPE, exit);
470 static void lightrec_plugin_execute_internal(bool block_only)
472 struct lightrec_registers *regs;
473 u32 flags, cycles_pcsx;
475 regs = lightrec_get_registers(lightrec_state);
476 gen_interupt((psxCP0Regs *)regs->cp0);
477 cycles_pcsx = next_interupt - psxRegs.cycle;
478 assert((s32)cycles_pcsx > 0);
480 // step during early boot so that 0x80030000 fastboot hack works
481 block_stepping = block_only;
485 if (use_pcsx_interpreter) {
488 u32 cycles_lightrec = cycles_pcsx_to_lightrec(cycles_pcsx);
489 if (unlikely(use_lightrec_interpreter)) {
490 psxRegs.pc = lightrec_run_interpreter(lightrec_state,
494 psxRegs.pc = lightrec_execute(lightrec_state,
495 psxRegs.pc, cycles_lightrec);
498 lightrec_tansition_to_pcsx(lightrec_state);
500 flags = lightrec_exit_flags(lightrec_state);
502 if (flags & LIGHTREC_EXIT_SEGFAULT) {
503 fprintf(stderr, "Exiting at cycle 0x%08x\n",
508 if (flags & LIGHTREC_EXIT_SYSCALL)
509 psxException(0x20, 0, (psxCP0Regs *)regs->cp0);
512 if ((regs->cp0[13] & regs->cp0[12] & 0x300) && (regs->cp0[12] & 0x1)) {
513 /* Handle software interrupts */
514 regs->cp0[13] &= ~0x7c;
515 psxException(regs->cp0[13], 0, (psxCP0Regs *)regs->cp0);
519 static void lightrec_plugin_execute(void)
524 lightrec_plugin_execute_internal(false);
527 static void lightrec_plugin_execute_block(enum blockExecCaller caller)
529 lightrec_plugin_execute_internal(true);
532 static void lightrec_plugin_clear(u32 addr, u32 size)
534 if (addr == 0 && size == UINT32_MAX)
535 lightrec_invalidate_all(lightrec_state);
537 /* size * 4: PCSX uses DMA units */
538 lightrec_invalidate(lightrec_state, addr, size * 4);
541 static void lightrec_plugin_sync_regs_to_pcsx(void);
542 static void lightrec_plugin_sync_regs_from_pcsx(void);
544 static void lightrec_plugin_notify(enum R3000Anote note, void *data)
548 case R3000ACPU_NOTIFY_CACHE_ISOLATED:
549 case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
550 /* not used, lightrec calls lightrec_enable_ram() instead */
552 case R3000ACPU_NOTIFY_BEFORE_SAVE:
553 lightrec_plugin_sync_regs_to_pcsx();
555 case R3000ACPU_NOTIFY_AFTER_LOAD:
556 lightrec_plugin_sync_regs_from_pcsx();
561 static void lightrec_plugin_apply_config()
563 u32 cycle_mult = Config.cycle_multiplier_override && Config.cycle_multiplier == CYCLE_MULT_DEFAULT
564 ? Config.cycle_multiplier_override : Config.cycle_multiplier;
566 cycle_mult_to_pcsx = (cycle_mult * 1024 + 199) / 200;
567 cycle_mult_from_pcsx = (200 * 1024 + cycle_mult/2) / cycle_mult;
570 static void lightrec_plugin_shutdown(void)
572 lightrec_destroy(lightrec_state);
574 if (!LIGHTREC_CUSTOM_MAP)
578 static void lightrec_plugin_reset(void)
580 struct lightrec_registers *regs;
582 regs = lightrec_get_registers(lightrec_state);
584 /* Invalidate all blocks */
585 lightrec_invalidate_all(lightrec_state);
587 /* Reset registers */
588 memset(regs, 0, sizeof(*regs));
590 regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
591 regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
594 static void lightrec_plugin_sync_regs_from_pcsx(void)
596 struct lightrec_registers *regs;
598 regs = lightrec_get_registers(lightrec_state);
599 memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c));
600 memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0));
601 memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
603 lightrec_invalidate_all(lightrec_state);
606 static void lightrec_plugin_sync_regs_to_pcsx(void)
608 struct lightrec_registers *regs;
610 regs = lightrec_get_registers(lightrec_state);
611 memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c));
612 memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0));
613 memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
618 lightrec_plugin_init,
619 lightrec_plugin_reset,
620 lightrec_plugin_execute,
621 lightrec_plugin_execute_block,
622 lightrec_plugin_clear,
623 lightrec_plugin_notify,
624 lightrec_plugin_apply_config,
625 lightrec_plugin_shutdown,