17 #include "../psxdma.h"
19 #include "../psxmem.h"
20 #include "../r3000a.h"
21 #include "../psxinterpreter.h"
22 #include "../psxhle.h"
23 #include "../new_dynarec/events.h"
25 #include "../frontend/main.h"
30 #if (defined(__arm__) || defined(__aarch64__)) && !defined(ALLOW_LIGHTREC_ON_ARM)
31 #error "Lightrec should not be used on ARM (please specify DYNAREC=ari64 to make)"
34 #define ARRAY_SIZE(x) (sizeof(x) ? sizeof(x) / sizeof((x)[0]) : 0)
36 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
37 # define LE32TOH(x) __builtin_bswap32(x)
38 # define HTOLE32(x) __builtin_bswap32(x)
39 # define LE16TOH(x) __builtin_bswap16(x)
40 # define HTOLE16(x) __builtin_bswap16(x)
42 # define LE32TOH(x) (x)
43 # define HTOLE32(x) (x)
44 # define LE16TOH(x) (x)
45 # define HTOLE16(x) (x)
49 # define likely(x) __builtin_expect(!!(x),1)
50 # define unlikely(x) __builtin_expect(!!(x),0)
52 # define likely(x) (x)
53 # define unlikely(x) (x)
61 static struct lightrec_state *lightrec_state;
63 static char *name = "retroarch.exe";
65 static bool use_lightrec_interpreter;
66 static bool use_pcsx_interpreter;
67 static bool block_stepping;
69 extern u32 lightrec_hacks;
96 static void (*cp2_ops[])(struct psxCP2Regs *) = {
97 [OP_CP2_RTPS] = gteRTPS,
98 [OP_CP2_RTPS] = gteRTPS,
99 [OP_CP2_NCLIP] = gteNCLIP,
101 [OP_CP2_DPCS] = gteDPCS,
102 [OP_CP2_INTPL] = gteINTPL,
103 [OP_CP2_MVMVA] = gteMVMVA,
104 [OP_CP2_NCDS] = gteNCDS,
105 [OP_CP2_CDP] = gteCDP,
106 [OP_CP2_NCDT] = gteNCDT,
107 [OP_CP2_NCCS] = gteNCCS,
109 [OP_CP2_NCS] = gteNCS,
110 [OP_CP2_NCT] = gteNCT,
111 [OP_CP2_SQR] = gteSQR,
112 [OP_CP2_DCPL] = gteDCPL,
113 [OP_CP2_DPCT] = gteDPCT,
114 [OP_CP2_AVSZ3] = gteAVSZ3,
115 [OP_CP2_AVSZ4] = gteAVSZ4,
116 [OP_CP2_RTPT] = gteRTPT,
117 [OP_CP2_GPF] = gteGPF,
118 [OP_CP2_GPL] = gteGPL,
119 [OP_CP2_NCCT] = gteNCCT,
122 static char cache_buf[64 * 1024];
124 static void cop2_op(struct lightrec_state *state, u32 func)
126 struct lightrec_registers *regs = lightrec_get_registers(state);
130 if (unlikely(!cp2_ops[func & 0x3f])) {
131 fprintf(stderr, "Invalid CP2 function %u\n", func);
133 /* This works because regs->cp2c comes right after regs->cp2d,
134 * so it can be cast to a pcsxCP2Regs pointer. */
135 cp2_ops[func & 0x3f]((psxCP2Regs *) regs->cp2d);
139 static bool has_interrupt(void)
141 struct lightrec_registers *regs = lightrec_get_registers(lightrec_state);
143 return ((psxHu32(0x1070) & psxHu32(0x1074)) &&
144 (regs->cp0[12] & 0x401) == 0x401) ||
145 (regs->cp0[12] & regs->cp0[13] & 0x0300);
148 static void lightrec_tansition_to_pcsx(struct lightrec_state *state)
150 psxRegs.cycle += lightrec_current_cycle_count(state) / 1024;
151 lightrec_reset_cycle_count(state, 0);
154 static void lightrec_tansition_from_pcsx(struct lightrec_state *state)
156 s32 cycles_left = next_interupt - psxRegs.cycle;
158 if (block_stepping || cycles_left <= 0 || has_interrupt())
159 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
161 lightrec_set_target_cycle_count(state, cycles_left * 1024);
165 static void hw_write_byte(struct lightrec_state *state,
166 u32 op, void *host, u32 mem, u8 val)
168 lightrec_tansition_to_pcsx(state);
170 psxHwWrite8(mem, val);
172 lightrec_tansition_from_pcsx(state);
175 static void hw_write_half(struct lightrec_state *state,
176 u32 op, void *host, u32 mem, u16 val)
178 lightrec_tansition_to_pcsx(state);
180 psxHwWrite16(mem, val);
182 lightrec_tansition_from_pcsx(state);
185 static void hw_write_word(struct lightrec_state *state,
186 u32 op, void *host, u32 mem, u32 val)
188 lightrec_tansition_to_pcsx(state);
190 psxHwWrite32(mem, val);
192 lightrec_tansition_from_pcsx(state);
195 static u8 hw_read_byte(struct lightrec_state *state, u32 op, void *host, u32 mem)
199 lightrec_tansition_to_pcsx(state);
201 val = psxHwRead8(mem);
203 lightrec_tansition_from_pcsx(state);
208 static u16 hw_read_half(struct lightrec_state *state,
209 u32 op, void *host, u32 mem)
213 lightrec_tansition_to_pcsx(state);
215 val = psxHwRead16(mem);
217 lightrec_tansition_from_pcsx(state);
222 static u32 hw_read_word(struct lightrec_state *state,
223 u32 op, void *host, u32 mem)
227 lightrec_tansition_to_pcsx(state);
229 val = psxHwRead32(mem);
231 lightrec_tansition_from_pcsx(state);
236 static struct lightrec_mem_map_ops hw_regs_ops = {
245 static u32 cache_ctrl;
247 static void cache_ctrl_write_word(struct lightrec_state *state,
248 u32 op, void *host, u32 mem, u32 val)
253 static u32 cache_ctrl_read_word(struct lightrec_state *state,
254 u32 op, void *host, u32 mem)
259 static struct lightrec_mem_map_ops cache_ctrl_ops = {
260 .sw = cache_ctrl_write_word,
261 .lw = cache_ctrl_read_word,
264 static struct lightrec_mem_map lightrec_map[] = {
265 [PSX_MAP_KERNEL_USER_RAM] = {
266 /* Kernel and user memory */
275 [PSX_MAP_SCRATCH_PAD] = {
280 [PSX_MAP_PARALLEL_PORT] = {
285 [PSX_MAP_HW_REGISTERS] = {
286 /* Hardware registers */
291 [PSX_MAP_CACHE_CONTROL] = {
295 .ops = &cache_ctrl_ops,
298 /* Mirrors of the kernel/user memory */
299 [PSX_MAP_MIRROR1] = {
302 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
304 [PSX_MAP_MIRROR2] = {
307 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
309 [PSX_MAP_MIRROR3] = {
312 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
315 /* Mirror of the parallel port. Only used by the PS2/PS3 BIOS */
316 [PSX_MAP_PPORT_MIRROR] = {
319 .mirror_of = &lightrec_map[PSX_MAP_PARALLEL_PORT],
323 [PSX_MAP_CODE_BUFFER] = {
324 .length = CODE_BUFFER_SIZE,
328 static void lightrec_enable_ram(struct lightrec_state *state, bool enable)
331 memcpy(psxM, cache_buf, sizeof(cache_buf));
333 memcpy(cache_buf, psxM, sizeof(cache_buf));
336 static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size)
376 return kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
407 return !is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
412 #if defined(HW_DOL) || defined(HW_RVL)
413 static void lightrec_code_inv(void *ptr, uint32_t len)
415 extern void DCFlushRange(void *ptr, u32 len);
416 extern void ICInvalidateRange(void *ptr, u32 len);
418 DCFlushRange(ptr, len);
419 ICInvalidateRange(ptr, len);
421 #elif defined(HW_WUP)
422 static void lightrec_code_inv(void *ptr, uint32_t len)
424 wiiu_clear_cache(ptr, (void *)((uintptr_t)ptr + len));
428 static const struct lightrec_ops lightrec_ops = {
430 .enable_ram = lightrec_enable_ram,
431 .hw_direct = lightrec_can_hw_direct,
432 #if defined(HW_DOL) || defined(HW_RVL) || defined(HW_WUP)
433 .code_inv = lightrec_code_inv,
437 static int lightrec_plugin_init(void)
439 lightrec_map[PSX_MAP_KERNEL_USER_RAM].address = psxM;
440 lightrec_map[PSX_MAP_BIOS].address = psxR;
441 lightrec_map[PSX_MAP_SCRATCH_PAD].address = psxH;
442 lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000;
443 lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP;
445 if (!LIGHTREC_CUSTOM_MAP) {
447 code_buffer = mmap(0, CODE_BUFFER_SIZE,
448 PROT_EXEC | PROT_READ | PROT_WRITE,
449 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
450 if (code_buffer == MAP_FAILED)
453 code_buffer = malloc(CODE_BUFFER_SIZE);
459 if (LIGHTREC_CUSTOM_MAP) {
460 lightrec_map[PSX_MAP_MIRROR1].address = psxM + 0x200000;
461 lightrec_map[PSX_MAP_MIRROR2].address = psxM + 0x400000;
462 lightrec_map[PSX_MAP_MIRROR3].address = psxM + 0x600000;
465 lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
467 use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER");
469 lightrec_state = lightrec_init(name,
470 lightrec_map, ARRAY_SIZE(lightrec_map),
473 // fprintf(stderr, "M=0x%lx, P=0x%lx, R=0x%lx, H=0x%lx\n",
477 // (uintptr_t) psxH);
480 signal(SIGPIPE, exit);
485 static void lightrec_plugin_sync_regs_to_pcsx(bool need_cp2);
486 static void lightrec_plugin_sync_regs_from_pcsx(bool need_cp2);
488 static void lightrec_plugin_execute_internal(bool block_only)
490 struct lightrec_registers *regs;
491 u32 flags, cycles_pcsx;
493 regs = lightrec_get_registers(lightrec_state);
494 gen_interupt((psxCP0Regs *)regs->cp0);
495 if (!block_only && stop)
498 cycles_pcsx = next_interupt - psxRegs.cycle;
499 assert((s32)cycles_pcsx > 0);
501 // step during early boot so that 0x80030000 fastboot hack works
502 block_stepping = block_only;
506 if (use_pcsx_interpreter) {
509 u32 cycles_lightrec = cycles_pcsx * 1024;
510 if (unlikely(use_lightrec_interpreter)) {
511 psxRegs.pc = lightrec_run_interpreter(lightrec_state,
515 psxRegs.pc = lightrec_execute(lightrec_state,
516 psxRegs.pc, cycles_lightrec);
519 lightrec_tansition_to_pcsx(lightrec_state);
521 flags = lightrec_exit_flags(lightrec_state);
523 if (flags & LIGHTREC_EXIT_SEGFAULT) {
524 fprintf(stderr, "Exiting at cycle 0x%08x\n",
529 if (flags & LIGHTREC_EXIT_SYSCALL)
530 psxException(R3000E_Syscall << 2, 0, (psxCP0Regs *)regs->cp0);
531 if (flags & LIGHTREC_EXIT_BREAK)
532 psxException(R3000E_Bp << 2, 0, (psxCP0Regs *)regs->cp0);
533 else if (flags & LIGHTREC_EXIT_UNKNOWN_OP) {
534 u32 op = intFakeFetch(psxRegs.pc);
535 u32 hlec = op & 0x03ffffff;
536 if ((op >> 26) == 0x3b && hlec < ARRAY_SIZE(psxHLEt) && Config.HLE) {
537 lightrec_plugin_sync_regs_to_pcsx(0);
539 lightrec_plugin_sync_regs_from_pcsx(0);
542 psxException(R3000E_RI << 2, 0, (psxCP0Regs *)regs->cp0);
546 if ((regs->cp0[13] & regs->cp0[12] & 0x300) && (regs->cp0[12] & 0x1)) {
547 /* Handle software interrupts */
548 regs->cp0[13] &= ~0x7c;
549 psxException(regs->cp0[13], 0, (psxCP0Regs *)regs->cp0);
553 static void lightrec_plugin_execute(void)
556 lightrec_plugin_execute_internal(false);
559 static void lightrec_plugin_execute_block(enum blockExecCaller caller)
561 lightrec_plugin_execute_internal(true);
564 static void lightrec_plugin_clear(u32 addr, u32 size)
566 if (addr == 0 && size == UINT32_MAX)
567 lightrec_invalidate_all(lightrec_state);
569 /* size * 4: PCSX uses DMA units */
570 lightrec_invalidate(lightrec_state, addr, size * 4);
573 static void lightrec_plugin_notify(enum R3000Anote note, void *data)
577 case R3000ACPU_NOTIFY_CACHE_ISOLATED:
578 case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
579 /* not used, lightrec calls lightrec_enable_ram() instead */
581 case R3000ACPU_NOTIFY_BEFORE_SAVE:
582 /* non-null 'data' means this is HLE related sync */
583 lightrec_plugin_sync_regs_to_pcsx(data == NULL);
585 case R3000ACPU_NOTIFY_AFTER_LOAD:
586 lightrec_plugin_sync_regs_from_pcsx(data == NULL);
588 lightrec_invalidate_all(lightrec_state);
593 static void lightrec_plugin_apply_config()
595 u32 cycle_mult = Config.cycle_multiplier_override && Config.cycle_multiplier == CYCLE_MULT_DEFAULT
596 ? Config.cycle_multiplier_override : Config.cycle_multiplier;
599 lightrec_set_cycles_per_opcode(lightrec_state, cycle_mult * 1024 / 100);
602 static void lightrec_plugin_shutdown(void)
604 lightrec_destroy(lightrec_state);
606 if (!LIGHTREC_CUSTOM_MAP) {
608 munmap(code_buffer, CODE_BUFFER_SIZE);
615 static void lightrec_plugin_reset(void)
617 struct lightrec_registers *regs;
619 regs = lightrec_get_registers(lightrec_state);
621 /* Invalidate all blocks */
622 lightrec_invalidate_all(lightrec_state);
624 /* Reset registers */
625 memset(regs, 0, sizeof(*regs));
627 regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
628 regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
630 lightrec_set_unsafe_opt_flags(lightrec_state, lightrec_hacks);
633 static void lightrec_plugin_sync_regs_from_pcsx(bool need_cp2)
635 struct lightrec_registers *regs;
637 regs = lightrec_get_registers(lightrec_state);
638 memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
639 memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0));
641 memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c));
644 static void lightrec_plugin_sync_regs_to_pcsx(bool need_cp2)
646 struct lightrec_registers *regs;
648 regs = lightrec_get_registers(lightrec_state);
649 memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
650 memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0));
652 memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c));
657 lightrec_plugin_init,
658 lightrec_plugin_reset,
659 lightrec_plugin_execute,
660 lightrec_plugin_execute_block,
661 lightrec_plugin_clear,
662 lightrec_plugin_notify,
663 lightrec_plugin_apply_config,
664 lightrec_plugin_shutdown,