1 /***************************************************************************
2 * Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. *
18 ***************************************************************************/
27 #include "psxcommon.h"
29 #include "psxcounters.h"
33 R3000ACPU_NOTIFY_CACHE_ISOLATED = 0,
34 R3000ACPU_NOTIFY_CACHE_UNISOLATED = 1,
35 R3000ACPU_NOTIFY_BEFORE_SAVE,
36 R3000ACPU_NOTIFY_AFTER_LOAD,
42 void (*Execute)(); /* executes up to a break */
43 void (*ExecuteBlock)(); /* executes up to a jump */
44 void (*Clear)(u32 Addr, u32 Size);
45 void (*Notify)(enum R3000Anote note, void *data);
46 void (*ApplyConfig)();
50 extern R3000Acpu *psxCpu;
51 extern R3000Acpu psxInt;
52 extern R3000Acpu psxRec;
55 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
56 struct { u8 h3, h2, h, l; } b;
57 struct { s8 h3, h2, h, l; } sb;
58 struct { u16 h, l; } w;
59 struct { s16 h, l; } sw;
61 struct { u8 l, h, h2, h3; } b;
62 struct { u16 l, h; } w;
63 struct { s8 l, h, h2, h3; } sb;
64 struct { s16 l, h; } sw;
70 u32 r0, at, v0, v1, a0, a1, a2, a3,
71 t0, t1, t2, t3, t4, t5, t6, t7,
72 s0, s1, s2, s3, s4, s5, s6, s7,
73 t8, t9, k0, k1, gp, sp, s8, ra, lo, hi;
75 u32 r[34]; /* Lo, Hi in r[32] and r[33] */
79 typedef union psxCP0Regs_ {
81 u32 Index, Random, EntryLo0, EntryLo1,
82 Context, PageMask, Wired, Reserved0,
83 BadVAddr, Count, EntryHi, Compare,
84 Status, Cause, EPC, PRid,
85 Config, LLAddr, WatchLO, WatchHI,
86 XContext, Reserved1, Reserved2, Reserved3,
87 Reserved4, Reserved5, ECC, CacheErr,
88 TagLo, TagHi, ErrorEPC, Reserved6;
111 unsigned char r, g, b, c;
115 short m11, m12, m13, m21, m22, m23, m31, m32, m33, pad;
120 SVector3D v0, v1, v2;
123 s32 ir0, ir1, ir2, ir3;
124 SVector2D sxy0, sxy1, sxy2, sxyp;
125 SVector2Dz sz0, sz1, sz2, sz3;
126 CBGR rgb0, rgb1, rgb2;
128 s32 mac0, mac1, mac2, mac3;
168 PSXINT_CDRPLAY_OLD, /* unused */
173 typedef struct psxCP2Regs {
174 psxCP2Data CP2D; /* Cop2 data registers */
175 psxCP2Ctrl CP2C; /* Cop2 control registers */
179 // note: some cores like lightrec don't keep their data here,
180 // so use R3000ACPU_NOTIFY_BEFORE_SAVE to sync
181 psxGPRRegs GPR; /* General Purpose Registers */
182 psxCP0Regs CP0; /* Coprocessor0 Registers */
185 psxCP2Data CP2D; /* Cop2 data registers */
186 psxCP2Ctrl CP2C; /* Cop2 control registers */
190 u32 pc; /* Program counter */
191 u32 code; /* The instruction */
194 struct { u32 sCycle, cycle; } intCycle[32];
197 u32 subCycle; /* interpreter cycle counting */
201 // warning: changing anything in psxRegisters requires update of all
202 // asm in libpcsxcore/new_dynarec/
205 extern psxRegisters psxRegs;
207 /* new_dynarec stuff */
208 extern u32 event_cycles[PSXINT_COUNT];
209 extern u32 next_interupt;
211 void new_dyna_freeze(void *f, int mode);
213 #define new_dyna_set_event_abs(e, abs) { \
215 s32 di_ = next_interupt - abs_; \
216 event_cycles[e] = abs_; \
218 /*printf("%u: next_interupt %u -> %u\n", psxRegs.cycle, next_interupt, abs_);*/ \
219 next_interupt = abs_; \
223 #define new_dyna_set_event(e, c) \
224 new_dyna_set_event_abs(e, psxRegs.cycle + (c))
229 void psxException(u32 code, u32 bd, psxCP0Regs *cp0);
230 void psxBranchTest();
231 void psxExecuteBios();