1 /* FCE Ultra - NES/Famicom Emulator
3 * Copyright notice for this file:
4 * Copyright (C) 2002 Ben Parnell
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 extern uint32 PC_prev, OP_prev;
35 extern uint8 dreads[4];
36 extern uint32 dwrites_c[2];
37 extern int dread_count_c, dwrite_count_c;
38 extern int mapirq_cyc_c;
39 extern void (*MapIRQHook)(int a);
40 #define DummyRdMem(...)
42 #define DummyRdMem RdMem
43 void FP_FASTAPASS(1) (*MapIRQHook)(int a);
56 //#define _PZ X.PZ // unused?
58 #define _count X.count
59 #define _tcount X.tcount
60 #define _IRQlow X.IRQlow
61 #define _jammed X.jammed
64 static INLINE uint8 RdMem(unsigned int A)
67 /*if (A >= 0x2000)*/ _DB=_DB1;
69 //printf("a == %x, pc == %x\n", A, _PC);
70 if (A >= 0x2000 && A != _PC && A != _PC - 1 && A != _PC + 1) {
71 dreads[dread_count_c++] = _DB1;
72 if (dread_count_c > 4) { printf("dread_count out of range\n"); exit(1); }
78 static INLINE void WrMem(unsigned int A, uint8 V)
80 //printf("w [%04x] %02x\n", A, V);
81 if ((A&0xe000) == 0) { // RAM area (always 0-0x1fff)
87 dwrites_c[dwrite_count_c++] = (A<<8)|V;
88 if (dwrite_count_c > 2) { printf("dwrite_count_c out of range\n"); exit(1); }
92 static INLINE uint8 RdRAM(unsigned int A)
94 //return((_DB=RAM[A]));
98 static INLINE void WrRAM(unsigned int A, uint8 V)
103 static INLINE void ADDCYC(int x)
110 void FASTAPASS(1) X6502_AddCycles_c(int x)
115 static INLINE void PUSH(uint8 V)
121 static INLINE uint8 POP(void)
124 return(RdRAM(0x100+_S));
128 static uint8 ZNTable[256] = {
129 Z_FLAG,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
130 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
131 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
132 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
133 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
134 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
135 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
136 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
137 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
138 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
139 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
140 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
141 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
142 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
143 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
144 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG
147 /* Some of these operations will only make sense if you know what the flag
149 //#define X_ZN(zort) _P&=~(Z_FLAG|N_FLAG);_P|=ZNTable[zort]
150 //#define X_ZNT(zort) _P|=ZNTable[zort]
151 #define X_ZN(zort) _P&=~(Z_FLAG|N_FLAG);if(!zort) _P|=Z_FLAG;else _P|=zort&N_FLAG
152 #define X_ZNT(zort) if(!zort) _P|=Z_FLAG;else _P|=(zort&N_FLAG)
154 /* Care must be taken if you want to turn this into a macro. Use { and }. */
163 if((tmp^_PC)&0x100) \
167 #define LDA _A=x;X_ZN(_A)
168 #define LDX _X=x;X_ZN(_X)
169 #define LDY _Y=x;X_ZN(_Y)
171 /* All of the freaky arithmetic operations. */
172 #define AND _A&=x;X_ZN(_A)
173 //#define BIT _P&=~(Z_FLAG|V_FLAG|N_FLAG);_P|=ZNTable[x&_A]&Z_FLAG;_P|=x&(V_FLAG|N_FLAG)
174 #define BIT _P&=~(Z_FLAG|V_FLAG|N_FLAG);if(!(x&_A)) _P|=Z_FLAG;_P|=x&(V_FLAG|N_FLAG)
175 #define EOR _A^=x;X_ZN(_A)
176 #define ORA _A|=x;X_ZN(_A)
179 uint32 l=_A+x+(_P&1); \
180 _P&=~(Z_FLAG|C_FLAG|N_FLAG|V_FLAG); \
181 _P|=((((_A^x)&0x80)^0x80) & ((_A^l)&0x80))>>1; \
187 uint32 l=_A-x-((_P&1)^1); \
188 _P&=~(Z_FLAG|C_FLAG|N_FLAG|V_FLAG); \
189 _P|=((_A^l)&(_A^x)&0x80)>>1; \
190 _P|=((l>>8)&C_FLAG)^C_FLAG; \
195 #define CMPL(a1,a2) { \
199 _P|=((t>>8)&C_FLAG)^C_FLAG; \
202 /* Special undocumented operation. Very similar to CMP. */
204 uint32 t=(_A&_X)-x; \
207 _P|=((t>>8)&C_FLAG)^C_FLAG; \
211 #define CMP CMPL(_A,x)
212 #define CPX CMPL(_X,x)
213 #define CPY CMPL(_Y,x)
215 /* The following operations modify the byte being worked on. */
216 #define DEC x--;X_ZN(x)
217 #define INC x++;X_ZN(x)
219 #define ASL _P&=~C_FLAG;_P|=x>>7;x<<=1;X_ZN(x)
220 #define LSR _P&=~(C_FLAG|N_FLAG|Z_FLAG);_P|=x&1;x>>=1;X_ZNT(x)
222 /* For undocumented instructions, maybe for other things later... */
223 #define LSRA _P&=~(C_FLAG|N_FLAG|Z_FLAG);_P|=_A&1;_A>>=1;X_ZNT(_A)
229 _P&=~(Z_FLAG|N_FLAG|C_FLAG); \
237 _P&=~(Z_FLAG|N_FLAG|C_FLAG); \
242 /* Icky icky thing for some undocumented instructions. Can easily be
243 broken if names of local variables are changed.
247 #define GetAB(target) \
249 target=RdMem(_PC++); \
250 target|=RdMem(_PC++)<<8; \
253 /* Absolute Indexed(for reads) */
254 #define GetABIRD(target, i) \
260 if((target^tmp)&0x100) \
263 DummyRdMem(target^0x100); \
268 /* Absolute Indexed(for writes and rmws) */
269 #define GetABIWR(target, i) \
276 DummyRdMem((target&0x00FF)|(rt&0xFF00)); \
280 #define GetZP(target) \
282 target=RdMem(_PC++); \
285 /* Zero Page Indexed */
286 #define GetZPI(target,i) \
288 target=i+RdMem(_PC++); \
291 /* Indexed Indirect */
292 #define GetIX(target) \
297 target=RdRAM(tmp++); \
298 target|=RdRAM(tmp)<<8; \
301 /* Indirect Indexed(for reads) */
302 #define GetIYRD(target) \
311 if((target^rt)&0x100) \
314 DummyRdMem(target^0x100); \
319 /* Indirect Indexed(for writes and rmws) */
320 #define GetIYWR(target) \
329 DummyRdMem((target&0x00FF)|(rt&0xFF00)); \
332 /* Now come the macros to wrap up all of the above stuff addressing mode functions
333 and operation macros. Note that operation macros will always operate(redundant
334 redundant) on the variable "x".
337 #define RMW_A(op) {uint8 x=_A; op; _A=x; break; } /* Meh... */
338 #define RMW_AB(op) {unsigned int A; uint8 x; GetAB(A); x=RdMem(A); WrMem(A,x); op; WrMem(A,x); break; }
339 #define RMW_ABI(reg,op) {unsigned int A; uint8 x; GetABIWR(A,reg); x=RdMem(A); WrMem(A,x); op; WrMem(A,x); break; }
340 #define RMW_ABX(op) RMW_ABI(_X,op)
341 #define RMW_ABY(op) RMW_ABI(_Y,op)
342 #define RMW_IX(op) {unsigned int A; uint8 x; GetIX(A); x=RdMem(A); WrMem(A,x); op; WrMem(A,x); break; }
343 #define RMW_IY(op) {unsigned int A; uint8 x; GetIYWR(A); x=RdMem(A); WrMem(A,x); op; WrMem(A,x); break; }
344 #define RMW_ZP(op) {uint8 A; uint8 x; GetZP(A); x=RdRAM(A); op; WrRAM(A,x); break; }
345 #define RMW_ZPX(op) {uint8 A; uint8 x; GetZPI(A,_X); x=RdRAM(A); op; WrRAM(A,x); break;}
347 #define LD_IM(op) {uint8 x; x=RdMem(_PC++); op; break;}
348 #define LD_ZP(op) {uint8 A; uint8 x; GetZP(A); x=RdRAM(A); op; break;}
349 #define LD_ZPX(op) {uint8 A; uint8 x; GetZPI(A,_X); x=RdRAM(A); op; break;}
350 #define LD_ZPY(op) {uint8 A; uint8 x; GetZPI(A,_Y); x=RdRAM(A); op; break;}
351 #define LD_AB(op) {unsigned int A; uint8 x; GetAB(A); x=RdMem(A); op; break; }
352 #define LD_ABI(reg,op) {unsigned int A; uint8 x; GetABIRD(A,reg); x=RdMem(A); op; break;}
353 #define LD_ABX(op) LD_ABI(_X,op)
354 #define LD_ABY(op) LD_ABI(_Y,op)
355 #define LD_IX(op) {unsigned int A; uint8 x; GetIX(A); x=RdMem(A); op; break;}
356 #define LD_IY(op) {unsigned int A; uint8 x; GetIYRD(A); x=RdMem(A); op; break;}
358 #define ST_ZP(r) {uint8 A; GetZP(A); WrRAM(A,r); break;}
359 #define ST_ZPX(r) {uint8 A; GetZPI(A,_X); WrRAM(A,r); break;}
360 #define ST_ZPY(r) {uint8 A; GetZPI(A,_Y); WrRAM(A,r); break;}
361 #define ST_AB(r) {unsigned int A; GetAB(A); WrMem(A,r); break;}
362 #define ST_ABI(reg,r) {unsigned int A; GetABIWR(A,reg); WrMem(A,r); break; }
363 #define ST_ABX(r) ST_ABI(_X,r)
364 #define ST_ABY(r) ST_ABI(_Y,r)
365 #define ST_IX(r) {unsigned int A; GetIX(A); WrMem(A,r); break; }
366 #define ST_IY(r) {unsigned int A; GetIYWR(A); WrMem(A,r); break; }
368 static uint8 CycTable[256] =
370 /*0x00*/ 7,6,2,8,3,3,5,5,3,2,2,2,4,4,6,6,
371 /*0x10*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
372 /*0x20*/ 6,6,2,8,3,3,5,5,4,2,2,2,4,4,6,6,
373 /*0x30*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
374 /*0x40*/ 6,6,2,8,3,3,5,5,3,2,2,2,3,4,6,6,
375 /*0x50*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
376 /*0x60*/ 6,6,2,8,3,3,5,5,4,2,2,2,5,4,6,6,
377 /*0x70*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
378 /*0x80*/ 2,6,2,6,3,3,3,3,2,2,2,2,4,4,4,4,
379 /*0x90*/ 2,6,2,6,4,4,4,4,2,5,2,5,5,5,5,5,
380 /*0xA0*/ 2,6,2,6,3,3,3,3,2,2,2,2,4,4,4,4,
381 /*0xB0*/ 2,5,2,5,4,4,4,4,2,4,2,4,4,4,4,4,
382 /*0xC0*/ 2,6,2,8,3,3,5,5,2,2,2,2,4,4,6,6,
383 /*0xD0*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
384 /*0xE0*/ 2,6,3,8,3,3,5,5,2,2,2,2,4,4,6,6,
385 /*0xF0*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
388 void FASTAPASS(1) X6502_IRQBegin_c(int w)
390 dprintf("IRQB %02x",w);
394 void FASTAPASS(1) X6502_IRQEnd_c(int w)
396 dprintf("IRQE %02x",w);
400 void TriggerIRQ_c(void) /* This function should probably be phased out. */
402 _IRQlow|=FCEU_IQTEMP;
405 void TriggerNMINSF_c(void)
410 PUSH((_P&~B_FLAG)|(U_FLAG));
414 void TriggerNMI_c(void)
419 static void TriggerNMIReal(void)
430 _PC|=RdMem(0xFFFB)<<8;
431 #ifdef DEBUG_ASM_6502
438 void TriggerIRQReal(void)
440 if(!(_PI&I_FLAG) && !_jammed)
450 _PC|=RdMem(0xFFFF)<<8;
451 #ifdef DEBUG_ASM_6502
458 void X6502_Reset_c(void)
461 _PC|=RdMem(0xFFFD)<<8;
466 void X6502_Power_c(void)
468 memset((void *)&X,0,sizeof(X));
475 void X6502_Run_c(void/*int32 cycles*/)
479 cycles*=15; // 15*4=60
481 cycles*=16; // 16*4=64
485 // if (_count <= 0) asdc++;
494 if(_IRQlow&FCEU_IQNMI)
499 _IRQlow&=~(FCEU_IQTEMP|FCEU_IQNMI);
502 #ifdef DEBUG_ASM_6502
503 if(MapIRQHook) mapirq_cyc_c = _tcount;
507 return; /* Should increase accuracy without a major speed hit. */
512 ADDCYC(CycTable[b1]);
530 if((PSG[0x10]&0x80) && !(PSG[0x10]&0x40))
532 extern uint8 SIRQStat;
534 X6502_IRQBegin_c(FCEU_IQDPCM);
539 #ifdef DEBUG_ASM_6502
543 //printf("$%04x:$%02x\n",_PC,b1);
545 //printf("$%02x\n",b1);
552 temp=_tcount; /* Gradius II (J) glitches if _tcount is not used */
556 #ifdef DEBUG_ASM_6502
562 #ifdef DEBUG_ASM_6502